NEC ELETRONICS CORPORATION Patent applications |
Patent application number | Title | Published |
20090288052 | METHOD AND APPARATUS FOR ANALYZING CIRCUIT - In a circuit analyzing method, coordinate points of nodes in an analysis target circuit are detected from layout data of the analysis target circuit to store in a storage unit, and a minimum area from among areas is specified by referring to a storage unit to read out the coordinate points of the nodes and by defining the areas containing all the nodes based on the read coordinate points of the nodes. A distance parameter prescribing a size of the minimum area is calculated, a variation coefficient is specified by using the distance parameter. Thus, a delay time in the analysis target circuit is calculated by using the variation coefficient. | 11-19-2009 |
20080214002 | Cleaning solution and manufacturing method for semiconductor device - A method of manufacturing a semiconductor device forms an interlayer insulating film on a nickel silicide layer formed on a substrate, and forms a through hole by performing dry etching using a resist pattern, formed on the interlayer insulating film, as a mask and then removing the resist pattern by ashing. A wafer after an ashing process is cleaned using a cleaning solution comprised of aqueous solution having a content of the fluorine-containing compound of 1.0 to 5.0 mass %, a content of chelating agent of 0.2 to 5.0 mass %, and a content of the organic acid salt of 0.1 to 3.0 mass %. | 09-04-2008 |