| MSTAR SOFTWARE R&D (SHENZHEN) LTD. Patent applications |
| Patent application number | Title | Published |
|---|
| 20120003972 | Low-Cost Multimode GSM Monitoring from TD-SCDMA - Embodiments of techniques for low-cost multimode operation in wireless communications involving the Time Division Synchronous Code Division Multiple Access (TD-SCDMA) standard and the Global System for Mobile telecommunications (GSM) standard are described. In one aspect, a method of multimode operation in a mobile telecommunication device renders wireless communications based on the TD-SCDMA standard using either or both of first and second frequency synthesizers of the mobile telecommunication device. The method also receives signals based on the GSM standard using either or both of the first and second frequency synthesizers of the mobile telecommunication device. Techniques for performing baton handover as well as signal reception for multimedia broadcast and multicast services (MBMS) using two frequency synthesizers are also provided. | 01-05-2012 |
| 20110316595 | VCO FREQUENCY TEMPERATURE COMPENSATION SYSTEM FOR PLLS - The present invention discloses a continuous voltage controlled oscillator (VCO) frequency temperature compensation apparatus for a phase locked loop (PLL) and a continuous VCO frequency temperature compensation method for a PLL. The system utilizes a VCO with one digital coarse tuning input, a first analog fine tuning input, and a second analog fine tuning input. The system uses the second analog fine tuning inputs to compensate the VCO for frequency shifts due to temperature fluctuation. When the PLL transitions to the fine lock (FL) mode, the system starts driving the second fine tuning input with a differential amplifier. The differential amplifier compares the first fine tuning input with a reference voltage, and drives the second fine tuning input to compensate the first fine tuning input. | 12-29-2011 |
| 20110304365 | FAST PHASE LOCKING SYSTEM FOR AUTOMATICALLY CALIBRATED FRACTIONAL-N PLL - The current invention provides a second feedback loop around the existing FLL, which forces the signal on the route of N-divider (NDIV), PFD, CP, and LPF to essentially reach their desired lock conditions before the FLL is switched off and the system enters PLL mode. This loop works by comparing the output voltage of the FLL DAC to the LPF output voltage, and then using this value to modulate the divider's dividing value. After the secondary feedback loop settles, output voltage from the LPF will be equal to the value that can drive the VCO to the desired lock frequency, and the phase error at the input side of the PFD produces a zero-average current to the charge pump. When this condition is set, the loop is essentially already in phase lock and the lock transient from the FLL mode to the PLL mode will be minimal. | 12-15-2011 |
| 20110211661 | Metrics Calculations Utilizing Pre-Stored Values - A trellis processing technique for estimating a transmitted signal from a received signal acquired through a channel achieves a reduced computational structure when implementing a DDFSE-like branch metrics calculation by pre-storing computed values, which can be re-used. The technique involves storing differences between a received symbol and different products, each of which is a product of a channel coefficient corresponding to a least time delay and a different possible transmitted symbol. A summation of products is calculated, each product being a product of a possible transmitted signal symbol and a channel coefficient other than the channel coefficient corresponding to the least time delay, the summation being specific to a branch-start state in a trellis. The summation is combined with different stored differences in a calculation of branch metrics leading to different branch-end states in the trellis. | 09-01-2011 |
| 20110181464 | Method of Position Determination in a Global Navigation Satellite System (GNSS) Receiver - A method of determining coordinates of a mobile Global Navigation Satellite System (GNSS) receiver includes processing signals from space vehicles including performing measurements of pseudoranges and Doppler shift, extracting ephemeris data, and determining GNSS receiver coordinates from said measurements. | 07-28-2011 |
| 20100265133 | Method for suppressing multipath errors in a satellite navigation receiver - A method of multipath error suppression in a satellite navigation receiver, including steps of navigation satellites signals searching, receiving and processing complex signals from each satellite, tracking found signals with a following-up open loop and determining coordinates, receiver velocity and exact time based on measurements of direct and reflected signal delay and Doppler frequency, the method including: forming, on the basis of navigation parameters, a two-dimensional accumulated power grid, calculating single-path signal corrections using the centered accumulated power grid determining, whether a multipath is presented, and performing, in case of positive result of this determination, improvement of corrections using weights, wherein, performing improvement of corrections using weights is carried out by forming a likelihood function on the basis of a centered accumulated powers vector, and correction is performed according to the found likelihood function global maximum. | 10-21-2010 |
| 20090055656 | Method of Maintaining Software Integrity - A method of maintaining the integrity of software stored in memory, the method comprising: storing an indicator associated with the memory; calculating a reference value from the stored indicator; storing the reference value; modifying the indicator when the software in the memory is modified; storing the modified indicator; recalculating the reference value from the modified indicator; storing the recalculated reference value; and verifying the integrity of the software by: retrieving the modified indicator; calculating an expected value from the modified indicator; and comparing the expected value with the recalculated reference value. Preferably the integrity of the software is verified without calculating an expected value from the software. The reference and expected values are typically calculated in accordance with a secret key. | 02-26-2009 |
