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MELLANOX TECHNOLOGIES LTD.

MELLANOX TECHNOLOGIES LTD. Patent applications
Patent application numberTitlePublished
20120082164Cell-Based Link-Level Retry Scheme - A method for communication includes receiving a packet at a first node for transmission over a link to a second node. The data in the packet is divided into a sequence of cells of a predetermined data size. The cells have respective sequence numbers. The cells are transmitted in sequence over the link, while storing the transmitted cells in a buffer at the first node. The first node receives acknowledgments indicating the respective sequence numbers of the transmitted cells that were received at the second node. Upon receiving an indication at the first node that a transmitted cell having a given sequence number was not properly received at the second node, the stored cells are retransmitted from the buffer starting from the cell with the given sequence number.04-05-2012
20120071011ADAPTER FOR HIGH-SPEED ETHERNET - An adapter includes a mechanical frame, which is configured to be inserted into a SFP-type receptacle and contains a socket for receiving a plug of a twisted-pair-type cable. First electrical terminals, held by the mechanical frame, are configured to mate with a connector in the receptacle. Second electrical terminals, held within the socket, are configured to mate with electrical connections of the plug. Circuitry connects the first and second electrical terminals so as to enable interoperation of the plug with the receptacle.03-22-2012
20110286451METHOD, APPARATUS AND COMPUTER PRODUCT FOR SENDING OR RECEIVING DATA OVER MULTIPLE NETWORKS - A substantially transparent failover communication protocol comprises a sender sending data packets to one or more recipients. The sender and recipients may be connectable through two or more networks. The sender sends in some cases duplicate data packets, each addressed differently, such that a recipient may receive one copy. Both the recipients and the sender may perform predetermined actions in response to a network becoming unavailable, such that the data packets may still be received by the recipients.11-24-2011
20110270917NETWORK ADAPTER WITH SHARED DATABASE FOR MESSAGE CONTEXT INFORMATION - A network interface adapter includes a network interface and a client interface, for coupling to a client device so as to receive from the client device work requests to send messages over the network using a plurality of transport service instances. Message processing circuitry, coupled between the network interface and the client interface, includes an execution unit, which generates the messages in response to the work requests and passes the messages to the network interface to be sent over the network. A memory stores records of the messages that have been generated by the execution unit in respective lists according to the transport service instances with which the messages are associated. A completion unit receives the records from the memory and, responsive thereto, reports to the client device upon completion of the messages.11-03-2011
20110264968CABLE WITH FIELD-WRITEABLE MEMORY - A method includes monitoring a use of a cable assembly that includes a communication cable terminated by a termination module. Data indicative of the use is written to a writeable non-volatile memory in the termination module. The use of the cable assembly is acted upon by reading the data from the non-volatile memory.10-27-2011
20110173352Power Reduction on Idle Communication Lanes - A method for communication includes establishing a full-duplex communication link between first and second nodes. The link includes multiple first lanes for conveying first communication traffic in a first link direction and multiple second lanes for conveying second communication traffic in a second link direction. Signals are exchanged between the first and second nodes to indicate a requested change in lane activity in the first link direction. Responsively to the signals, a number of the first lanes that are active is changed so that the first node conveys the first communication traffic to the second node over a first number of the first lanes, while the second node conveys the second communication traffic to the first node over a second number of the second lanes, which is different from the first number.07-14-2011
20110119673CROSS-CHANNEL NETWORK OPERATION OFFLOADING FOR COLLECTIVE OPERATIONS - A Network Interface (NI) includes a host interface, which is configured to receive from a host processor of a node one or more cross-channel work requests that are derived from an operation to be executed by the node. The NI includes a plurality of work queues for carrying out transport channels to one or more peer nodes over a network. The NI further includes control circuitry, which is configured to accept the cross-channel work requests via the host interface, and to execute the cross-channel work requests using the work queues by controlling an advance of at least a given work queue according to an advancing condition, which depends on a completion status of one or more other work queues, so as to carry out the operation.05-19-2011
20110116512Dynamically-Connected Transport Service - A method of communication includes receiving, in a network interface device, first and second requests from an initiator process running on an initiator host to transmit, respectively, first and second data to first and second target processes running on one or more target nodes, via a packet network. A single dynamically-connected initiator context is allocated for serving both the first and second requests. A first connect packet referencing the dynamically-connected (DC) initiator context is directed to the first target process so as to open a first dynamic connection with the first target process, followed by transmission of the first data over the first dynamic connection. The first dynamic connection is closed after the transmission of the first data, and a second connect packet is transmitted so as to open a second dynamic connection with the second target process, followed by transmission of the second data.05-19-2011
20110096668HIGH-PERFORMANCE ADAPTIVE ROUTING - A method for communication includes routing a first packet, which belongs to a given packet flow, over a first routing path through a communication network. A second packet, which follows the first packet in the given packet flow, is routed using a time-bounded Adaptive Routing (AR) mode, by evaluating a time gap between the first and second packets, routing the second packet over the first routing path if the time gap does not exceed a predefined threshold, and, if the time gap exceeds the predefined threshold, selecting a second routing path through the communication network that is potentially different from the first routing path, and routing the second packet over the second routing path.04-28-2011
20110083064PROCESSING OF BLOCK AND TRANSACTION SIGNATURES - A network communication device includes a host interface, which is coupled to communicate with a host processor, having a host memory, so as to receive a work request to execute a transaction in which a plurality of data blocks are to be transferred over a packet network. Processing circuitry is configured to process multiple data packets so as to execute the transaction, each data packet in the transaction containing a portion of the data blocks, and the multiple data packets including at least first and last packets, which respectively contain the first and last data blocks of the transaction. The processing circuitry is configured to compute a transaction signature over the data blocks while processing the data packets so that at least the first data block passes out of the network communication device through one of the interfaces before computation of the transaction signature is completed.04-07-2011
20110081807ADAPTER FOR PLUGGABLE MODULE - An adapter includes a mechanical frame, which is configured to be inserted into a four-channel Small Form-Factor Pluggable (SFP) receptacle and to receive inside the frame a single-channel SFP cable connector. First electrical terminals, held by the mechanical frame, are configured to mate with respective first pins of the receptacle. Second electrical terminals, held within the mechanical frame, are configured to mate with respective second pins of the connector. Circuitry couples the first and second electrical terminals so as to enable communication between the connector and one channel of the receptacle while terminating the remaining channels of the receptacle.04-07-2011
20110058571DATA SWITCH WITH SHARED PORT BUFFERS - A communication apparatus includes a plurality of switch ports, each switch port including one or more port buffers for buffering data that traverses the switch port. A switch fabric is coupled to transfer the data between the switch ports. A switch control unit is configured to reassign at least one port buffer of a given switch port to buffer a part of the data that does not enter or exit the apparatus via the given switch port, and to cause the switch fabric to forward the part of the data to a destination switch port via the at least one reassigned port buffer.03-10-2011
20110029847PROCESSING OF DATA INTEGRITY FIELD - A network communication device includes a host interface, which is coupled to communicate with a host processor, having a memory, so as to receive a work request to convey one or more data blocks over a network. The work request specifies a memory region of a given data size, and at least one data integrity field (DIF), having a given field size, is associated with the data blocks. Network interface circuitry is configured to execute an input/output (I/O) data transfer operation responsively to the work request so as to transfer to or from the memory a quantity of data that differs from the data size of the memory region by a multiple of the field size, while adding the at least one DIF to the transferred data or removing the at least one DIF from the transferred data.02-03-2011
20110010557CONTROL MESSAGE SIGNATURE FOR DEVICE CONTROL - A method of controlling a peripheral device includes generating, in a host processor, a control message for transmission to the peripheral device, and calculating a signature for the control message. The control message and the signature are written to an address in a system memory of the host processor, and the peripheral device is notified of the address, so as to cause the device to read the control message and the signature from the system memory.01-13-2011
20100274876NETWORK INTERFACE DEVICE WITH MEMORY MANAGEMENT CAPABILITIES - An input/output (I/O) device includes a host interface for connection to a host device having a memory and a network interface, which is configured to receive, over a network, data packets associated with I/O operations directed to specified virtual addresses in the memory. Packet processing hardware is configured to translate the virtual addresses into physical addresses and to perform the I/O operations using the physical addresses, and upon an occurrence of a page fault in translating one of the virtual addresses, to transmit a response packet over the network to a source of the data packets so as to cause the source to refrain from transmitting further data packets while the page fault is serviced.10-28-2010
20100189206Precise Clock Synchronization - A method for clock synchronization includes computing an offset value between a local clock time of a real-time clock circuit and a reference clock time, and loading the offset value into a register that is associated with the real-time clock circuit. The local clock time is then summed with the value in the register so as to give an adjusted value of the local clock time that is synchronized with the reference clock.07-29-2010
20100188140Accurate Global Reference Voltage Distribution System With Local Reference Voltages Referred To Local Ground And Locally Supplied Voltage - A system and method for accurately distributing a master reference voltage to a plurality of local circuits within a system. A central master reference voltage is distributed to a plurality of local circuits as a difference in the voltage of a pair of conductors oriented substantially spatially parallel. Local reference voltages are generated based on the master reference voltage and a local voltage source.07-29-2010
20100138840SYSTEM AND METHOD FOR ACCELERATING INPUT/OUTPUT ACCESS OPERATION ON A VIRTUAL MACHINE - A system and method for accelerating input/output (IO) access operation on a virtual machine, The method comprises providing a smart IO device that includes an unrestricted command queue (CQ) and a plurality of restricted CQs and allowing a guest domain to directly configure and control IO resources through a respective restricted CQ, the IO resources allocated to the guest domain. In preferred embodiments, the allocation of IO resources to each guest domain is performed by a privileged virtual switching element. In some embodiments, the smart IO device is a HCA and the privileged virtual switching element is a Hypervisor.06-03-2010
20100088437INFINIBAND ADAPTIVE CONGESTION CONTROL ADAPTIVE MARKING RATE - A device and a method for optimizing data transfer rate in an InfiniBand fabric is provided where a various number of transmitting devices aim data packets to a single receiving device or through a common link. The method which is implemented in an InfiniBand switch includes marking of packets in a rate corresponding to centrally configured marking rate, determination of the current number of data flows between the input ports and the output port of the switch and marking the data packet with Forward Explicit Congestion Notification according to an adaptive value of marking rate which depends on the initial value of the marking rate and is inversely proportional to the number of data flows.04-08-2010
20090302923TERMINATED INPUT BUFFER WITH OFFSET CANCELLATION CIRCUIT - A system and method for compensation of offset voltage in a digital differential input buffer driven by a terminated transmission line. Offset compensation currents are injected at the output of the first stage of the input buffer, which has a higher impedance than the terminated transmission line at the input of the buffer. The compensation current is determined by a network of MOS transistors, which saves die space compared to resistors. A pair of voltage multiplexers provides for compensation currents to correct offsets of either polarity. Offset correction currents are determined anew each time the system is powered up, compensating for component aging. The offset correction can also be performed while the input buffer is operating, during periods when the input is quiescent, and/or by adjusting the offset correction according to the duty cycle of the detected input.12-10-2009
20090201926FIBRE CHANNEL PROCESSING BY A HOST CHANNEL ADAPTER - A method for data storage includes mapping a queue pair (QP) of a channel adapter to a specified Fibre Channel (FC) exchange for communication with a storage device. Upon receiving at the channel adapter from a host computer a storage command directed to the storage device, the storage command is executed by transmitting data packets over a switched network from the channel adapter to the storage device using the specified exchange and performing a remote direct memory access (RDMA) operation on the channel adapter using the mapped QP.08-13-2009
20090182900NETWORK ADAPTER WITH SHARED DATABASE FOR MESSAGE CONTEXT INFORMATION - A network interface adapter includes a network interface and a client interface, for coupling to a client device so as to receive from the client device work requests to send messages over the network using a plurality of transport service instances. Message processing circuitry, coupled between the network interface and the client interface, includes an execution unit, which generates the messages in response to the work requests and passes the messages to the network interface to be sent over the network. A memory stores records of the messages that have been generated by the execution unit in respective lists according to the transport service instances with which the messages are associated. A completion unit receives the records from the memory and, responsive thereto, reports to the client device upon completion of the messages.07-16-2009
20090129392MULTIPLE QUEUE PAIR ACCESS WITH A SINGLE DOORBELL - A method for controlling access by processes running on a host device to a communication network includes assigning to each of the processes a respective doorbell address on a network interface adapter that couples the host device to the network and allocating instances of a communication service on the network, to be provided via the adapter, to the processes. Upon receiving a request submitted by a given one of the processes to its respective doorbell address to access one of the allocated service instances, the adapter conveys the data over the network using the specified instance of the service, subject to verifying, based on the doorbell address to which the request was submitted, that the specified instance was allocated to the given process.05-21-2009
20090006655NETWORK ADAPTER WITH SHARED DATABASE FOR MESSAGE CONTEXT INFORMATION - A network interface adapter includes a network interface and a client interface, for coupling to a client device so as to receive from the client device work requests to send messages over the network using a plurality of transport service instances. Message processing circuitry, coupled between the network interface and the client interface, includes an execution unit, which generates the messages in response to the work requests and passes the messages to the network interface to be sent over the network. A memory stores records of the messages that have been generated by the execution unit in respective lists according to the transport service instances with which the messages are associated. A completion unit receives the records from the memory and, responsive thereto, reports to the client device upon completion of the messages.01-01-2009
20080219150AUTO-NEGOTIATION BY NODES ON AN INFINIBAND FABRIC - A method and system for digital communication wherein nodes exchange messages at a first data rate in order to coordinate testing at a second, higher data rate. After testing is completed, the nodes exchange test results at the first data rate, and if conditions are satisfactory for operation at the second data rate user data are transmitted at the second data rate. Otherwise, user data are transmitted at the first data rate.09-11-2008

Patent applications by MELLANOX TECHNOLOGIES LTD.