| Maxchip Electronics Corp. Patent applications |
| Patent application number | Title | Published |
|---|
| 20120008364 | ONE TIME PROGRAMMABLE MEMORY AND THE MANUFACTURING METHOD AND OPERATION METHOD THEREOF - A one time programmable memory having a memory cell formed on a substrate is provided. The memory cell has a transistor and an anti-fuse structure. The anti-fuse structure is consisted of a doping region, and a dielectric layer and a conductive layer is formed in the top edge corner region of an isolation structure. The upper surface of the isolation structure is lower than the surface of the substrate so as to expose the top edge corner region. The conductive layer is formed on the isolation structure and covers the top edge corner region. The dielectric layer is formed on the top edge corner region and between the doping region and the conductive layer. The memory cell stores the digital data depending on whether the dielectric layer breaks down or not. | 01-12-2012 |
| 20110169106 | MICRO ELECTRONIC MECHANICAL SYSTEM STRUCTURE AND MANUFACTURING METHOD THEREOF - A micro electronic mechanical system structure and a manufacturing method thereof are provided. A substrate has a plurality of conductive regions is provided. A dielectric layer is formed on the substrate. A plurality of openings and recesses are formed in the dielectric layer, wherein the openings expose the conductive regions. The recesses are located between the openings. A conductive layer is formed on the dielectric layer and the openings and the recesses are filled with the conductive layer. The conductive layer is patterned to form a plurality of strips of the first conductive patterns on the dielectric layer and a second conductive pattern on the sidewall and the bottom of each recess, wherein the first conductive patterns are connected with each other through the second conductive patterns. The dielectric layer is removed. The second conductive patterns between the first conductive patterns are removed. | 07-14-2011 |
| 20110140188 | NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - A non-volatile memory device including a substrate, a dielectric layer, a floating gate, source and drain regions, a channel region, and a doped layer is provided. The substrate includes a first region and a second region, and the substrate has an uneven surface in the second region. The dielectric layer is located on the substrate in the first region and in the second region to cover the uneven surface. The floating gate is located on the dielectric layer in the first region and is continuously extended to the second region. The source and drain regions are located in the substrate at opposite sides of the floating gate in the first region. The channel region is located in the substrate between the source and drain regions. The doped layer is located on the uneven surface or in the substrate in the second region to serve as a control gate. | 06-16-2011 |
| 20110108728 | AMBIT LIGHT SENSOR WITH FUNCTION OF IR SENSING - An ambit light sensor with a function of IR sensing and a method of fabricating the same are provided. The ambit light sensor includes a substrate, an ambit light sensing structure, an infrared ray (IR) sensing structure, and a dielectric layer. The ambit light sensing structure is located over the substrate for sensing and filtering visible light. The IR sensing structure is located in the substrate under the ambit light sensing structure for sensing IR. The dielectric layer is located between the ambit light sensing structure and the IR sensing structure. | 05-12-2011 |
| 20100149535 | METHOD OF MEASURING NUMERICAL APERTURE OF EXPOSURE MACHINE, CONTROL WAFER, PHOTOMASK, AND METHOD OF MONITORING NUMERICAL APERTURE OF EXPOSURE MACHINE - A method of measuring a numerical aperture of an exposure machine is described. A control wafer having vernier marks thereon and an aberration mask having pinholes therein are provided, wherein each pinhole corresponds to a vernier mark in position. A lithography process using the exposure machine and the aberration mask is performed to the control wafer, so as to form over each vernier mark a photoresist pattern having the same shape of the illumination pattern of the light source of the exposure machine. The numerical aperture of the exposure machine is then derived from a graduation of the vernier mark corresponding to an outer edge of the photoresist pattern. | 06-17-2010 |
