Magma Design Automation, Inc.
|Magma Design Automation, Inc. Patent applications|
|Patent application number||Title||Published|
|20080301594||Method For Optimized Automatic Clock Gating - A method of optimizing clock-gated circuitry in an integrated circuit (IC) design is provided. A plurality of signals which feed into enable inputs of a plurality of clock gates is determined, where the clock gates gate a plurality of sequential elements in the IC design. Combinational logic which is shared among the plurality of signals is identified. The clock-gated circuitry is transformed into multiple levels of clock-gating circuitry based on the shared combinational logic.||12-04-2008|
|20080301593||Method For Automatic Clock Gating To Save Power - A power optimization method of deriving gated circuitry in a synthesized netlist of an integrated circuit (IC) design is provided. A block in the synthesized netlist is identified as an idle candidate block. Sub-blocks on the chip are clustered into a cluster. For the cluster, a clock gating structure optimized for power savings is determined, based on the idle candidate block. One or more inflexible clock gates are inserted in the netlist according to the clock gate structure.||12-04-2008|
Patent applications by Magma Design Automation, Inc.