| LINEAR TECHNOLOGY CORPORATION Patent applications |
| Patent application number | Title | Published |
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| 20120026027 | A/D CONVERTER USING ISOLATION SWITCHES - In an A/D converter, isolation switches are used between the capacitors and the conversion switches. The conversion switches are those switches used to selectively couple the plates of the binary weighted capacitors to either Vref or 0 volts during the A/D conversion process. During sampling of the input voltage signal, the isolation switches are opened to isolate the conversion switches from the wide range of possible input voltages at the bottom plates of the capacitors. Therefore, the voltage across the conversion switches is substantially limited to Vref. Hence, the conversion switches can be very fast low voltage switches. After sampling of the input voltage, when the sampled input voltage is locked in, the conversion switches operate normally to selectively connect the capacitor plates to either Vref or 0 volts for successively approximating the input voltage, whereby a digital code representing the sampled input voltage is generated. | 02-02-2012 |
| 20120019228 | SYNCHRONOUS RECTIFIER CONTROL FOR SYNCHRONOUS BOOST CONVERTER - A synchronous boost DC/DC conversion system comprises an input for receiving a DC input voltage, an output for producing a DC output voltage, a power switch controllable to adjust an output signal of the conversion system, and an inductor coupled to the input. A synchronous rectifier is configurable to create a conduction path between the inductor and the output to provide the inductor discharge. A control circuit is provided for controlling the synchronous rectifier as the input voltage approaches the output voltage, so as to adjust average impedance of the conduction path over a discharge period of the inductor. | 01-26-2012 |
| 20120013389 | Capacitively Coupled Switched Current Source - In the preferred embodiment, a current source is switchable between two precisely defined output currents. A terminal of a coupling capacitor is coupled to the gate of an output MOSFET. The other terminal of the capacitor is switched between two reference voltages to toggle the MOSFET to output the selected one of the two currents. A switchable bias voltage source is coupled to the gate only during the on state of the MOSFET to set the gate voltage of the MOSFET. The current output of the current source is quickly and accurately changed. A reference MOSFET is not directly coupled to the output MOSFET, so there are no slow settling components coupled to the gate of the output MOSFET. | 01-19-2012 |
| 20120007649 | METHOD FOR CLAMPING A SEMICONDUCTOR REGION AT OR NEAR GROUND - A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is received by the first bipolar transistor, and the second current is received by the second bipolar transistor. The difference between the base-emitter junction voltages of the first and second bipolar transistors, in part, defines the voltage at which the n-type region is clamped. To start-up the circuit properly, current is withdrawn from the base/gate terminals of the transistors disposed in the current mirror. The circuit optionally includes a pair of cross-coupled transistors to reduce the output impedance and improve the power supply rejection ratio. | 01-12-2012 |
| 20120001649 | LEADFRAME CURRENT SENSOR - A current sensor is disclosed. The current sensor includes a leadframe having a die paddle, a portion of the die paddle being configured as a resistive element through which current can flow, and an integrated circuit (IC) die attached and thermally coupled to the die paddle. The IC die includes a current sensing module configured to measure a voltage drop across the resistive element and convert the voltage drop measurement to a current measurement signal and a temperature compensation module electrically coupled to the current sensing module. The temperature compensation module is configured to adjust the current measurement signal to compensate for temperature-dependent changes in the resistive element. The temperature compensation module includes a temperature-sensitive element, with a portion of the temperature-sensitive element located directly over a portion of the resistive element. | 01-05-2012 |
| 20110299304 | DC/DC CONVERTER WITH MAGNETIC FLUX DENSITY LIMITS - A DC/DC converter may include a power stage circuit, a pulse generator circuit, a flux density monitor, and power control logic. The power stage circuit includes an input, an output, and a transformer with a core. The power stage circuit may be configured to operate in a power transfer mode during which power is transferred from the input to the output and a reset mode during which flux density in the core of the transformer is reduced. The pulse generator circuit may be configured to generate pulses that regulate the output of the power stage circuit. The flux density monitor circuit may be configured to generate flux density information indicative of the flux density of the core of the transformer during both the power transfer mode and the reset mode. The power stage control logic may be configured to regulate the output of the power stage circuit based on the pulses and to prevent the core of the transformer from saturating based on the flux density information. | 12-08-2011 |
| 20110298473 | DYNAMIC COMPENSATION OF AGING DRIFT IN CURRENT SENSE RESISTOR - A current sense resistor circuit may include a primary current sense resistor that drifts with age. A secondary current sense resistor may drift with age in substantial unison with the primary current sense resistor. A calibration resistor may not drift with age in substantial unison with the primary current sense resistor. A compensation circuit may compensate for aging drift in the resistance of the primary current sense resistor based on a comparison of the calibration resistor with the secondary current sense resistor. The secondary current sense resistor may be in parallel with the primary current sense resistor, except when the compensation circuit is comparing the calibration resistor with the secondary current sense resistor. | 12-08-2011 |
| 20110285569 | A/D Converter with Compressed Full-Scale Range - An embodiment of an analog-to-digital converter system is described wherein an analog voltage signal Vin(t) is provided by an input amplifier. The analog signal Vin(t) has a predetermined full-scale range that is less wide than a reference voltage (Vref) range used by a downstream ADC to derive a first digital (numerical) representation D | 11-24-2011 |
| 20110241772 | ERROR AMPLIFIER FOR REGULATING SINGLE FEEDBACK INPUT AT MULTIPLE LEVELS - An error amplifier may be part of a voltage regulator and may include a single feedback input configured to receive a feedback signal. A single error output may be configured to provide an error output signal indicative of error in the feedback signal. A comparison circuit may be configured to provide an error signal to the single error output which is indicative of a difference between the feedback signal and whichever one of a set of reference signals is closest to the feedback signal. One or more of these reference signals may each be derived from an offset from a ground reference. One or more of the other reference signals may each be derived from an offset from a non-ground reference, such as a source of power for the error amplifier. The error amplifier may be on a single integrated circuit along with an associated driver circuit. | 10-06-2011 |
| 20110187573 | TIME-MULTIPLEXED RESIDUE AMPLIFIER - A system is configured and a method is provided for receiving an input ratio represented by a first input signal and a second input signal, and producing an output ratio represented by a first output signal and a second output signal. The system is constructed and the method is provided for alternately operating in at least two time periods, wherein in one time period the first input signal, a low accuracy amplifier, and the first output signal are selectively coupled, and in another time period the input signal, the low accuracy amplifier, a high accuracy attenuator, and the second output signal are selectively coupled so as to maintain the output ratio proportional to the input ratio. | 08-04-2011 |
| 20110156687 | EFFICIENCY MEASURING CIRCUIT FOR DC-DC CONVERTER WHICH CALCULATES INTERNAL RESISTANCE OF SWITCHING INDUCTOR BASED ON DUTY CYCLE - An efficiency measuring circuit may measure the efficiency of a DC-DC converter having a switching inductor with an internal DC resistance and a plurality of electronic switches that control current through the inductor. A duty cycle circuit may measure the duty cycle of current flowing through one of the electronic switches. A current sense circuit may measure the current flowing through one of the electronic switches. An inductor voltage sensor circuit may measure the voltage across the inductor. A computation circuit may compute the internal DC resistance of the switching inductor based in part on the duty cycle measured by the duty cycle circuit and the current measured by the current sense circuit. The computation circuit may also compute the efficiency of the DC-DC converter. | 06-30-2011 |
| 20110148379 | CLEAN TRANSITION BETWEEN CCM AND DCM IN VALLEY CURRENT MODE CONTROL OF DC-TO-DC CONVERTER - A valley current mode DC-to-DC converter may include an electronic control system configured to cause the DC-to-DC converter to operate under a continuous current mode and a discontinuous current mode. The electronic control system may include a current sensing system configured to sense current traveling through an inductance, a dual threshold generator configured to generate a first and a different second threshold, and a comparator system configured to compare current sensed by the current sensing system with the first threshold when the DC-to-DC converter is operating in the continuous current mode and with the second threshold when the DC-to-DC converter is operating in the discontinuous current mode. | 06-23-2011 |
| 20110148373 | CONTINUOUSLY SWITCHING BUCK-BOOST CONTROL - A buck-boost converter with a switch controller may cause switches A, B, C, and/or D to cyclically close such that switches B and C are closed during at least one interval of each cycle during both the buck and boost modes of operation. The switch controller may in addition or instead cause switches A, B, C, and/or D to cyclically close based on a control signal such that switches A and D are closed during an interval of each cycle and such that these intervals are never both simultaneously modulated by a small change in the control signal during any mode of operation. | 06-23-2011 |
| 20110101937 | Voltage Regulator with Virtual Remote Sensing - An automatic voltage compensation circuit in a voltage regulator compensates the output voltage for a voltage drop along lines leading to a remote load. A load capacitor is connected across the load for providing a low impedance across the load during a test phase of the regulator. In one embodiment, during the test phase, the load current is changed up or down a small percentage (e.g., 10%). As a result, the regulator voltage changes due only to the line resistance since the load is bypassed by the load capacitor. The voltage drop at full load current is then derived by detecting the change in regulator output voltage (a fractional voltage drop) and multiplying it. The normal mode is resumed, and the derived voltage drop is added to the regulator output by either compensating the feedback loop or by adding the voltage drop to the output of the regulator. | 05-05-2011 |
| 20110063760 | DC/DC Converter Overcurrent Protection - A DC/DC converter and a method protect a MOSFET driven by the converter from overcurrent conditions. No extra pins are required to sense the current, which saves IC package area and cost. | 03-17-2011 |
| 20110062932 | DC/DC CONVERTER HAVING A FAST AND ACCURATE AVERAGE CURRENT LIMIT - In order to overcome the three main obstacles to obtaining a fast and accurate average current limit in a DC/DC converter, three distinct improvements are provided which can work in concert to achieve the goal. Each of the three parts comprises significant new improvements, and their use together to create an average current limit is also believed to be novel. The first improvement relates to providing a bias signal control configured to apply a variable DC bias signal to the compensation ramp signal generated in the DC/DC converter so that the compensating ramp signal is biased to zero at the end of each ON-time for each cycle so that the peak current limit is independent of the duty cycle of the pulse width modulation signal during current limit conditions. A second improvement relates to modulating the clamp voltage that establishes the peak current limit as a function of ripple of the inductor current for each cycle of the pulse width modulation signal so as to reduce or cancel the effect of the inductor ripple current on the average output current during current limit conditions. The third improvement relates to adjusting the frequency of the pulse width modulation signal during current limit conditions as a function of both the input voltage and the output voltage of the DC/DC converter. | 03-17-2011 |
| 20110062929 | FEEDBACK CONTROL OF A DC/DC POWER CONVERTER - A current mode power conversion system and method are described that provide a stable output voltage and a maximum-limited output current to a load. The system comprises:
| 03-17-2011 |
| 20110042792 | FLEXIBLE CONTACTLESS WIRE BONDING STRUCTURE AND METHODOLOGY FOR SEMICONDUCTOR DEVICE - A semiconductor device such as a field-effect transistor, improved to reduce device resistance, comprises a leadframe which includes a die paddle integral with a first set of leads and a second set of leads that is electrically isolated from the first set, a semiconductor die having its lower surface positioned on, and electrically connected to, the die paddle, and a conductive layer on the upper surface of the die. At least one electrically conductive wire, preferably plural wires, extend laterally across the second surface of the semiconductor die, are in electrical contact with the conductive layer, and interconnect corresponding second leads on opposite sides of the die. The plural wires may be welded to leads in succession by alternate ball and wedge bonds on each lead. The conductive layer may be an aluminized layer on which is formed a thin layer a solderable material, such as tin. A solder is deposited on the tin layer, enmeshing the wires. The wires, which preferably are made of copper, then may be bonded to the electrically conductive layer by melting the solder paste, preferably by heating the leadframe, allowing the solder to reflow and wet the wires, and then cool to produce a low resistance mass between the leads. | 02-24-2011 |
| 20100301923 | MONOLITHIC VOLTAGE REFERENCE DEVICE WITH INTERNAL, MULTI-TEMPERATURE DRIFT DATA AND RELATED TESTING PROCEDURES - A testing procedure may determine whether a monolithic voltage reference device meets a temperature drift specification. A first non-room temperature output voltage of the monolithic voltage reference device may be measured while the monolithic voltage reference device is at a first non-room temperature which is substantially different than room temperature. First non-room temperature information may be stored in a memory within the monolithic voltage reference device which is a function of the first non-room temperature output voltage. A second non-room temperature output voltage of the monolithic voltage reference device may be measured while the monolithic voltage reference device is at a second non-room temperature which is substantially different than the room temperature and the first non-room temperature. Second non-room temperature information may be stored in the memory without destroying the first non-room temperature information which is a function of the second non-room temperature output voltage. A determination may be made whether the monolithic voltage reference device meets the temperature drift specification based on a computation that is a function of both the first non-room temperature information and the second non-room temperature information. | 12-02-2010 |
| 20100289547 | PULSE-WIDTH MODULATION (PWM) WITH INDEPENDENTLY ADJUSTABLE DUTY CYCLE AND FREQUENCY USING TWO ADJUSTABLE DELAYS - A pulse width modulation circuit may generate an adjustable output signal that periodically transitions between a first and a second state with an adjustable duty cycle. A first pulse generator circuit may be configured to generate a first pulse signal that periodically transitions at an adjustable delay with respect to a periodic reference signal. A second pulse generator circuit may be configured to generate a second pulse signal that periodically transitions at an adjustable delay with respect to the periodic reference signal. A logic circuit may be configured to generate the adjustable output signal based on both the first and the second pulse signals. | 11-18-2010 |
| 20100271245 | COMPLEX-ADMITTANCE DIGITAL-TO-ANALOG CONVERTER - A circuit includes a digital-to-analog converter configured to produce an analog output signal (1) proportional to a reference signal and (2) as a function of a digital input signal. The converter comprises a plurality of non-trivially complex admittances configured so that each non-trivially complex admittance can be selectively switched as a function of the digital input signal so as to be coupled between a reference terminal configured to receive a reference signal and an output terminal. The method comprises selectively switching non-trivially complex admittances as a function of the digital signal between a reference terminal and an output terminal. | 10-28-2010 |
| 20100264890 | Voltage and Current Regulators with Switched Output Capacitors For Multiple Regulation States - A device and method of providing any one of a plurality of desired levels of a regulated signal output to a load is described, wherein each desired level is a function of a corresponding reference signal. The device is configured and the method is designed to (1) store each desired level of the regulated signal output on a switchable storage device; and (2) selectively switch the correct storage device to the output when switching from one regulated state to another so as to establish the desired level of regulated signal output. | 10-21-2010 |
| 20100259192 | BUCK-MODE BOOST CONVERTER WITH REGULATED OUTPUT CURRENT - An LED driver circuit that includes a buck-mode boost converter that provides a regulated output current and that requires only a single connection to each channel of LEDs. The buck-mode boost controller may include a current regulator that includes an integrator. The current regulator may be configured to integrate a difference between a reference signal that is representative of the desired level of the average current through the electronic power switch and a detected signal that is representative of the actual current that is being delivered to the buck-mode boost circuit through the electronic power switch. The reference signal to the integrator may not change during operation of the buck-mode converter. The current regulator may be configured to deactivate the integrator and/or to disconnect the detected signal from the integrator while the electronic power switch is off. | 10-14-2010 |
| 20100244793 | AVERAGE INDUCTOR CURRENT MODE SWITCHING CONVERTERS - An average current mode switching converter is described for providing a regulated output current independent of load conditions, and a regulated output voltage as a function of the load connected to the converter. The converter comprises: an inductor; a modulator configured to provide a regulated current through the inductor; a feed back loop coupled between the inductor and the modulator for regulating the current through the inductor; and a precharger configured and arranged so as to provide and maintain a preset minimum current through the inductor independent of the load so as to improve the recovery time of the converter from a step in the desired regulated output current. Also disclosed is a method of providing a regulated output current independent of load conditions at the output of an average current mode switching converter, and a regulated output voltage as a function of the load connected to the output of converter. The method comprises: providing a regulated current through an inductor; and regulating the current through the inductor independent of the load so that a minimum current flows through the inductor so as to improve the recovery time of the converter from a step in the desired regulated output current. | 09-30-2010 |
| 20100225294 | INRUSH CURRENT CONTROL SYSTEM WITH SOFT START CIRCUIT AND METHOD - A method of and system for controlling the inrush current generated in a MOSFET of an inrush current control system, wherein the MOSFET includes a source, gate and drain. The dV/dt at the drain of the MOSFET is controlled so as to set the inrush current level as a function of dV/dt, independent of current limit without requiring a separate capacitor connected between the gate and drain of the MOSFET so that the MOSFET can turn on and off more quickly. | 09-09-2010 |
| 20100171475 | SWITCHING MODE CONVERTERS - A switch mode converter is configured to convert an input DC voltage applied at one level at the converter input to an output DC voltage at a second level at the converter output. The converter comprises: a switch configured to switch the input DC voltage on and off during each cycle of a plurality of cycles; energy storage configured to temporarily store energy from the input source voltage when the switch is on, and release energy when the switch is off during each cycle, wherein the input energy stored is equal to the energy released with each cycle and achieves equilibrium when the converter is operating into normal loads; and a reset mechanism configured to provide additional reset voltage during each cycle to achieve equilibrium when the converter is operating in a fault condition. | 07-08-2010 |
| 20100164597 | Bootstrap Transistor Circuit - A switch circuit is described, where a switch to be controlled is formed of two NMOS transistors having their source terminals connected together and their gate terminals connected together. Their drain terminals are the input and output terminals of the switch. A driver circuit controls a bootstrap circuit that is formed of a latching circuit and a capacitor. When the switch is in an off state, the driver circuit connects the capacitor to a charging voltage source for charging the capacitor to a bootstrap voltage, and applies a non-zero voltage across the latching circuit. When the driver circuit is controlled to turn on the switch, the driver circuit disconnects the capacitor from the charging voltage source, and the latching circuit becomes conductive and effectively connects the capacitor across the gate and source terminals of the switch to turn it on with the bootstrap voltage. The bootstrap voltage across the capacitor maintains the latching circuit in a latched conductive state. | 07-01-2010 |
| 20100141178 | DIMMER CONTROL LEAKAGE PULL DOWN USING MAIN POWER DEVICE IN FLYBACK CONVERTER - A flyback controller-may include a dimmer input configured to receive a chopped and rectified AC voltage. Each cycle of the signal may have an off period which is substantially attenuated but not always zero due to leakage of a dimmer control from which the chopped AC voltage originates, and an on period which substantially tracks the AC voltage. The ratio of the off period to the on period may be dependent upon a setting of the dimmer control. The flyback controller may include a control circuit configured to generate a switching signal based on the signal from the dimmer input. The switching signal may controllably oscillate between its on and off states during the on periods of the chopped and rectified AC voltage so as to controllably regulate current that is delivered by a secondary winding of a transformer in a flyback converter. The switching signal may be in the on state during the off periods of the chopped and rectified AC voltage, thereby preventing a voltage build up from the dimmer control leakage. | 06-10-2010 |
| 20100141177 | DIMMER-CONTROLLED LEDS USING FLYBACK CONVERTER WITH HIGH POWER FACTOR - A flyback controller generates a switching signal for controlling delivery of current into a primary winding of a transformer in a flyback converter. The controller may include an output current monitoring circuit configured to generate a signal representative of an average output current in a secondary winding of the transformer based on a peak input current in the primary winding and a duty cycle of current in the secondary winding. The flyback controller may generate a switching signal that causes a chopped AC voltage from a dimmer control to be converted by the flyback converter into an average output current from a secondary winding of the transformer that is DC isolated from the chopped AC voltage and that varies as a function of the setting of the dimmer control. The flyback controller may not utilize a signal from an opto-isolator. | 06-10-2010 |
| 20100141174 | CURRENT RIPPLE REDUCTION CIRCUIT FOR LEDS - A powered LED circuit may include a power supply configured to generate and deliver an output current at a controllable average value with a substantial ripple component, one or more LEDs connected together, and a ripple reduction circuit connected to the power supply and to the one or more LEDs. The ripple reduction circuit may have a current regulator connected in series with the one or more LEDs which is configured to substantially reduce fluctuations in the current which flows through the one or more LEDs due to the ripple component of the output current, but not fluctuations in the current which flows through the one or more LEDs due to changes in the average value of the output current. | 06-10-2010 |
| 20100141173 | LINEARITY IN LED DIMMER CONTROL - A flyback controller may generate a switching signal for controlling the delivery of input current into a primary winding of a transformer in a flyback converter that has a secondary winding in the transformer and that is driven by AC output from a dimmer control that is chopped at a phase angle based on a setting of the dimmer control. The flyback controller may include a tracking input configured to receive a dimmer output tracking signal that is representative of the instantaneous magnitude of the output from the dimmer control. The flyback controller may include an averaging circuit configured to average the dimmer output tracking signal so as to generate an average dimmer output signal that is representative of a time-averaged value of the dimmer output tracking signal. The flyback controller may be configured to cause the average output current in the secondary winding of the transformer to vary as a function of the average dimmer output signal when the phase angle exceeds a threshold. The flyback controller may be configured to generate the switching signal with a duty cycle that causes the luminance level of light produced by one or more LEDs to vary when the phase angle exceeds a threshold by what appears to the human eye to be a more linear function of the phase angle than if the luminance level actually varied as a linear function of the phase angle. | 06-10-2010 |
| 20100127755 | POWER MEASUREMENT CIRCUIT - A power measurement circuit and method are described. The circuit comprises: a transconductance rectifier arrangement including an input and configured to receive a periodically varying input voltage signal having an approximate 50% duty cycle; and an averaging filter for producing a time averaged DC output signal proportional to the mean square of the voltage at the input of the transconductance rectifier arrangement and representative of the average power of the input voltage signal within a range of voltages at the input. | 05-27-2010 |
| 20100127754 | POWER MEASUREMENT CIRCUIT - A power measurement circuit comprises: a transconductance rectifier arrangement including an input and configured to receive a sinusoidal input voltage signal; and an averaging filter for producing a time averaged DC output signal proportional to the mean square of the voltage at the input of the transconductance rectifier arrangement and representative of the average power of the input voltage signal within a range of voltages at the input. | 05-27-2010 |
| 20100123444 | ACCELERATED RESPONSE TO LOAD TRANSIENTS IN PFM DC-TO-DC CONVERTERS - A pulse generator circuit in a DC-to-DC converter may be configured to generate pulses that have a frequency that increases in response to increases in the load on the DC-to-DC converter. The pulse generator circuit may be configured to cause each pulse to have a constant width. When the pulse reaches the end of the constant width and the magnitude of the current through an inductance in the converter is less than a threshold value, however, the pulse generator may be configured to extend the pulse until the magnitude of the current through the inductance reaches the threshold value. The pulse generator circuit may be configured to prematurely terminate each pulse if and at such time as the load voltage exceeds a target value by approximately half of the peak-to-peak voltage of the ripple component plus the noise component margin. | 05-20-2010 |
| 20090322575 | SINGLE PASS INL TRIM ALGORITHM FOR NETWORKS - A single-pass method of trimming a network, and a network manufactured according to the method, uses the assumption that the peak INL value is minimized by trimming all the structures in the network to a same target value based upon the boundary conditions of the discretely adjustable elements that make up the structures. Using this assumption, the number of targets that need to be simulated, can be greatly reduced making estimation of peak INL possible in a reasonable amount of testing or manufacturing time. The trim algorithm produces results that are optimum or substantially close to optimum and is guaranteed not to deteriorate the Peak INL compared to the untrimmed Peak INL. An auto-calibration system using the trim method is also provided so that the method can be used in a product in real time if desired. | 12-31-2009 |
| 20090121770 | METHOD FOR CLAMPING A SEMICONDUCTOR REGION AT OR NEAR GROUND - A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is received by the first bipolar transistor, and the second current is received by the second bipolar transistor. The difference between the base-emitter junction voltages of the first and second bipolar transistors, in part, defines the voltage at which the n-type region is clamped. To start-up the circuit properly, current is withdrawn from the base/gate terminals of the transistors disposed in the current mirror. The circuit optionally includes a pair of cross-coupled transistors to reduce the output impedance and improve the power supply rejection ratio. | 05-14-2009 |
| 20090058380 | MULTIPLE OUTPUT AMPLIFIERS AND COMPARATORS - An amplifier/comparator includes a multitude of output stages all sharing the same input stage. One or more of the output stages are amplification stages and have compensated output signals. A number of other output stages are not compensated and provide comparison signals. Each uncompensated output stage is adapted to switch to a first state if it detects a first input signal as being greater than a second signal, and further to switch to a second state if it detects the first input signal as being smaller than the second signal. By varying the channel-width (W) to channel-length (L) ratio (W/L) of the transistors disposed in the output stages, the trip points of the comparators and/or the electrical characteristics of the amplifiers are selectively varied. | 03-05-2009 |
