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Lam Research Corporation

Lam Research Corporation Patent applications
Patent application numberTitlePublished
20120132532ALUMINUM-PLATED COMPONENTS OF SEMICONDUCTOR MATERIAL PROCESSING APPARATUSES AND METHODS OF MANUFACTURING THE COMPONENTS - Aluminum-plated components of semiconductor material processing apparatuses are disclosed. The components include a substrate and an optional intermediate layer formed on at least one surface of the substrate. The intermediate layer includes at least one surface. An aluminum plating is formed on the substrate, or on the optional intermediate layer. The surface on which the aluminum plating is formed is electrically-conductive. An anodized layer can optionally be formed on the aluminum plating. The aluminum plating or optional the anodized layer comprises a process-exposed surface of the component. Semiconductor material processing apparatuses including one or more aluminum-plated components, methods of processing substrates, and methods of making the aluminum-plated components are also disclosed.05-31-2012
20120132235Apparatus for Application of Two-Phase Contaminant Removal Medium - An apparatus is provided that includes a substrate support assembly for holding the semiconductor substrate and a dispense head for applying a cleaning material to clean the contaminants from the substrate surface. The dispense head extends across a length of the semiconductor substrate and is positioned proximate to the substrate surface at a distance of between about 0.1 mm and about 4.5 mm. The proximate position enables application of a force to the cleaning material as it is applied to the substrate surface as a film, and the cleaning material provided through the dispense head contains a cleaning liquid, a plurality of solid components, and polymers of a polymeric compound, each of the plurality of solid components and polymers being greater than zero and less than 3% of the cleaning material, the plurality of solid components and the polymers are dispersed for application through the dispense head.05-31-2012
20120132229Methods for Application of Two-Phase Contaminant Removal Medium - A method is provided for receiving the wafer on a support, the support being configured for movement along a direction. While moving the wafer, dispensing a cleaning material to clean contaminants from the surface of the wafer, the dispensing applied as a film over a diameter length of the wafer. The cleaning material contains a cleaning liquid, a plurality of solid components, and polymers of a polymeric compound. Each of the plurality of solid components and polymers being greater than zero and less than 3% of the cleaning material, and wherein the polymers become soluble in the cleaning liquid and the solubilized polymers having long polymer chains that capture and entrap solid components and contaminants in the cleaning liquid. Then, rinsing the film off of the wafer with a rinsing meniscus. The rinsing meniscus applied along the diameter length of the wafer and the film is rinsed after the dispensing.05-31-2012
20120125375Method and Apparatus for Removing Contaminants from Substrate - A cleaning material is applied to a surface of a substrate. The cleaning material includes one or more polymeric materials for entrapping contaminants present on the surface of the substrate. A rinsing fluid is applied to the surface of the substrate at a controlled velocity to effect removal of the cleaning material and contaminants entrapped within the cleaning material from the surface of the substrate. The controlled velocity of the rinsing fluid is set to cause the cleaning material to behave in an elastic manner when impacted by the rinsing fluid, thereby improving contaminant removal from the surface of the substrate.05-24-2012
20120118320Methods for Isolated Bevel Edge Clean - Methods for cleaning an edge of a semiconductor substrate include providing a brush in a housing, the housing provides a volume for holding the brush. A cleaning fluid is inserted into the housing to at least partially fill the volume holding the brush, with the cleaning fluid. The cleaning fluid is removed from the volume of the housing while the cleaning fluid is being inserted. The brush is rotated within the housing while the cleaning fluid is inserted and removed. The edge of the semiconductor substrate is inserted into a slot of the housing. The edge of the semiconductor substrate inserted into the slot is maintained at a distance and for a period of time. The distance is configured such that the brush contacts the edge of the semiconductor substrate but continues to enable rotation of the brush within the housing.05-17-2012
20120115332Method of Post Etch Polymer Residue Removal - A method for processing a substrate includes etching a surface of the substrate using an etching chemistry in a plasma chamber, the etching configured to define one or more features on the surface of the substrate. The features have some etch polymer residues as a result of the etching. The etching is terminated. A dry flash chemistry is applied into the plasma chamber. The plasma chamber is powered for a period of time between about 5 seconds and about 10 seconds to perform a dry flash etch. During the dry flash etch, the chamber is set to a low pressure of between about 5 mTorr and about 40 mTorr. The dry flash etch acts to weaken adhesion of the etch polymer residues to the features. The substrate is moved from plasma chamber and into a wet clean chamber for cleaning which removes the etch polymer residues during fluid cleaning.05-10-2012
20120115254HEATING PLATE WITH PLANAR HEATER ZONES FOR SEMICONDUCTOR PROCESSING - A heating plate for a substrate support assembly in a semiconductor plasma processing apparatus, comprises multiple independently controllable planar heater zones arranged in a scalable multiplexing layout, and electronics to independently control and power the planar heater zones. Each planar heater zone includes one or more heater elements made of an insulator-conductor composite. A substrate support assembly in which the heating plate is incorporated includes an electrostatic clamping electrode and a temperature controlled base plate. Methods for manufacturing the heating plate include bonding together ceramic sheets having planar heater zones, power supply lines, power return lines and vias.05-10-2012
20120108152Electrode Securing Platens And Electrode Polishing Assemblies Incorporating The Same - In one embodiment, an electrode polishing assembly may include an electrode securing platen, a plurality of electrode locating fasteners, and an electrode. Each of the electrode locating fasteners may include an electrode spacing shoulder, a variance cancelling shoulder extending from the electrode spacing shoulder, a threaded platen clamping portion extending from the variance cancelling shoulder, and a threaded nut that engages the threaded platen clamping portion. The electrode locating fasteners clamp the electrode securing platen between the threaded nut and the electrode spacing shoulder. The variance cancelling shoulder is at least partially within one of a plurality of variance cancelling passages of the electrode securing platen. A minimum position stack-up is equal to a minimum passage size minus a maximum shoulder size. A maximum position stack-up is equal to a maximum passage size minus a minimum shoulder size. The maximum position stack-up is greater than the minimum position stack-up.05-03-2012
20120101633Dual Sensing End Effector with Single Sensor - Systems, methods, and computer programs are presented for an end effector with a dual optical sensor. One end effector includes an arm, a mapping sensor, and a load sensor. The arm has one end connected to a pivoting joint, and a light signal is routed around the arm through a single light path. The mapping sensor is used for identifying the presence of the wafer when the wafer is not loaded on the end effector. The load sensor is used for identifying presence of the wafer on the end effector when the wafer is loaded on the end effector. The load sensor is defined by a second segment in the single light path such that the wafer intersects the second segment and interferes with the single light path when the wafer is loaded. A control module determines if an interruption in the single light path corresponds to an interruption of the single light path in the mapping sensor or the load sensor. As a result, one single light sensor is used to sense for two different conditions in the end effector.04-26-2012
20120100720SILICON ETCH WITH PASSIVATION USING PLASMA ENHANCED OXIDATION - A method of etching a silicon layer through a patterned mask is provided. The method uses an etch chamber in which the silicon layer is placed. The method includes (a) providing the silicon layer having the patterned mask formed thereon, (b) providing an etch gas comprising a fluorine containing gas and an oxygen and hydrogen containing gas into the etch chamber in which the silicon layer has been placed, (c) generating a plasma from the etch gas, (d) etching features into the silicon layer through the patterned mask using the plasma, and (e) stopping the etch gas. The oxygen and hydrogen containing gas contains water vapor.04-26-2012
20120097661METHODS OF FAULT DETECTION FOR MULTIPLEXED HEATER ARRAY - Described herein is a method of detecting fault conditions in a multiplexed multi-heater-zone heating plate for a substrate support assembly used to support a semiconductor substrate in a semiconductor processing apparatus.04-26-2012
20120088370Substrate Processing System with Multiple Processing Devices Deployed in Shared Ambient Environment and Associated Methods - A plurality of substrate processing devices are disposed in a separated manner within a shared ambient environment. A conveyance device is disposed within the shared ambient environment and is defined to move a substrate through and between each of the substrate processing devices in a continuous manner. Some substrate processing devices are defined to perform dry substrate processing operations in which an energized reactive environment is created in exposure to the substrate in an absence of liquid material. Some substrate processing devices are defined to perform wet substrate processing operations in which at least one material in a liquid state is applied to the substrate. In one embodiment, a complementary pair of dry and wet substrate processing devices are disposed in the shared ambient environment in a sequential manner relative to movement of the substrate by the conveyance device.04-12-2012
20120079698Carrier for Reducing Entrance and/or Exit Marks Left by a Substrate-Processing Meniscus - A carrier for supporting a substrate during processing by a meniscus fowled by upper and lower proximity heads is described. The carrier includes a frame having an opening sized for receiving a substrate and a plurality of support pins for supporting the substrate within the opening. The opening is slightly larger than the substrate such that a gap exists between the substrate and the opening Means for reducing a size and frequency of entrance and/or exit marks on substrates is provided, the means aiding and encouraging liquid from the meniscus to evacuate the gap. A method for reducing the size and frequency of entrance and exit marks is also provided.04-05-2012
20120074099Methods for Controlling Bevel Edge Etching in a Plasma Chamber - Methods for bevel edge etching are provided. One example method is for etching a film on a bevel edge of a substrate in a plasma etching chamber. The method includes providing the substrate on a substrate support in the plasma etching chamber. The plasma etching chamber has a top edge electrode and a bottom edge electrode disposed to surround the substrate support. Then flowing an etching process gas through a plurality of edge gas feeds disposed along a periphery of the gas delivery plate. The periphery of the gas deliver plate is oriented above the substrate support and the bevel edge of the substrate, and the flowing is further directed to a space between the top edge electrode and bottom edge electrode. And, flowing a tuning gas through a center gas feed of the gas delivery plate.03-29-2012
20120073754PLASMA CONFINEMENT RING ASSEMBLY FOR PLASMA PROCESSING CHAMBERS - A plasma confinement ring assembly with a single movable lower ring can be used for controlling wafer area pressure in a capacitively coupled plasma reaction chamber wherein a wafer is supported on a lower electrode assembly and process gas is introduced into the chamber by an upper showerhead electrode assembly. The assembly includes an upper ring, the lower ring, hangers, hanger caps, spacer sleeves and washers. The lower ring is supported by the hangers and is movable towards the upper ring when the washers come into contact with the lower electrode assembly during adjustment of the gap between the upper and lower electrodes. The hanger caps engage upper ends of the hangers and fit in upper portions of hanger bores in the upper ring. The spacer sleeves surround lower sections of the hangers and fit within lower portions of the hanger bores. The washers fit between enlarged heads of the hangers and a lower surface of the lower ring. The spacer sleeves are dimensioned to avoid rubbing against the inner surfaces of the hanger bores during lifting of the lower ring.03-29-2012
20120070997GAS SWITCHING SECTION INCLUDING VALVES HAVING DIFFERENT FLOW COEFFICIENT'S FOR GAS DISTRIBUTION SYSTEM - A gas switching system for a gas distribution system for supplying different gas compositions to a chamber, such as a plasma processing chamber of a plasma processing apparatus, is provided. The chamber can include multiple zones, and the gas switching section can supply different gases to the multiple zones. The switching section can switch the flows of one or more gases, such that one gas can be supplied to the chamber while another gas can be supplied to a by-pass line, and then switch the gas flows.03-22-2012
20120070914TEMPERATURE CONTROL MODULE USING GAS PRESSURE TO CONTROL THERMAL CONDUCTANCE BETWEEN LIQUID COOLANT AND COMPONENT BODY - A temperature control module for a semiconductor processing chamber comprises a thermally conductive component body, one or more channels in the component body and one or more tubes concentric therewith, such that gas filled spaces surround the tubes. By flowing a heat transfer liquid in the tubes and adjusting the gas pressure in the spaces, localized temperature of the component body can be precisely controlled. One or more heating elements can be arranged in each zone and a heat transfer liquid can be passed through the tubes to effect heating or cooling of each zone by activating the heating elements and/or varying pressure of the gas in the spaces.03-22-2012
20120061350Methods for Controlling Plasma Constituent Flux and Deposition During Semiconductor Fabrication and Apparatus for Implementing the Same - A time-dependent substrate temperature to be applied during a plasma process is determined. The time-dependent substrate temperature at any given time is determined based on control of a sticking coefficient of a plasma constituent at the given time. A time-dependent temperature differential between an upper plasma boundary and a substrate to be applied during the plasma process is also determined. The time-dependent temperature differential at any given time is determined based on control of a flux of the plasma constituent directed toward the substrate at the given time. The time-dependent substrate temperature and time-dependent temperature differential are stored in a digital format suitable for use by a temperature control device defined and connected to direct temperature control of the upper plasma boundary and the substrate. A system is also provided for implementing upper plasma boundary and substrate temperature control during the plasma process.03-15-2012
20120058634METHOD OF FABRICATING COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) DEVICE - A method of fabricating a CMOS device having high-k dielectric layer and metal gate electrode is provided. First, an isolation structure is formed in a substrate to define a first-type and a second-type MOS regions; an interfacial layer and a high-k dielectric layer are sequentially formed over the substrate; a first and a second cover layers are respectively formed over a portion of the high-k dielectric layer at the first-type MOS region and another portion of the high-k dielectric layer at the second-type MOS region; afterwards, an in-situ etching step is performed to sequentially etch the first and second cover layers using a first etching solution and to etch both the high-k dielectric layer and the interfacial layer using a second etching solution until the substrate is exposed. Wherein, the second etching solution is a mixed etching solution containing the first etching solution.03-08-2012
20120055632SHOWERHEAD ELECTRODE - A showerhead electrode, a gasket set and an assembly thereof in plasma reaction chamber for etching semiconductor substrates are provided with improved a gas injection hole pattern, positioning accuracy and reduced warping, which leads to enhanced uniformity of plasma processing rate. A method of assembling the inner electrode and gasket set to a supporting member includes simultaneous engagement of cam locks.03-08-2012
20120045902SHOWERHEAD ELECTRODES AND SHOWERHEAD ELECTRODE ASSEMBLIES HAVING LOW-PARTICLE PERFORMANCE FOR SEMICONDUCTOR MATERIAL PROCESSING APPARATUSES - Showerhead electrodes for a semiconductor material processing apparatus are disclosed. An embodiment of the showerhead electrodes includes top and bottom electrodes bonded to each other. The top electrode includes one or more plenums. The bottom electrode includes a plasma-exposed bottom surface and a plurality of gas holes in fluid communication with the plenum. Showerhead electrode assemblies including a showerhead electrode flexibly suspended from a top plate are also disclosed. The showerhead electrode assemblies can be in fluid communication with temperature-control elements spatially separated from the showerhead electrode to control the showerhead electrode temperature. Methods of processing substrates in plasma processing chambers including the showerhead electrode assemblies are also disclosed.02-23-2012
20120045897Wafer Electroless Plating System and Associated Methods - A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone to perform the drying operations. The system also includes a lower zone for electroless plating operations. The lower zone includes an electroless plating apparatus that implements a wafer submersion by fluid upwelling method. The upper and lower zones of the system are enclosed by a dual-walled chamber, wherein the inner wall is a chemically inert plastic and the outer wall is a structural metal. The system interfaces with a fluid handling system which provides the necessary chemistry supply and control for the system. The system is ambient controlled. Also, the system interfaces with an ambient controlled managed transfer module (MTM).02-23-2012
20120034786Plasma Processing Chamber with Dual Axial Gas Injection and Exhaust - An electrode is exposed to a plasma generation volume and is defined to transmit radiofrequency power to the plasma generation volume, and includes an upper surface for holding a substrate in exposure to the plasma generation volume. A gas distribution unit is disposed above the plasma generation volume and in a substantially parallel orientation to the electrode. The gas distribution unit includes an arrangement of gas supply ports for directing an input flow of a plasma process gas into the plasma generation volume in a direction substantially perpendicular to the upper surface of the electrode. The gas distribution unit also includes an arrangement of through-holes that each extend through the gas distribution unit to fluidly connect the plasma generation volume to an exhaust region. Each of the through-holes directs an exhaust flow from the plasma generation volume in a direction substantially perpendicular to the upper surface of the electrode.02-09-2012
20120031559Dual Plasma Volume Processing Apparatus for Neutral/Ion Flux Control - A semiconductor wafer processing apparatus includes a first electrode exposed to a first plasma generation volume, a second electrode exposed to a second plasma generation volume, and a gas distribution unit disposed between the first and second plasma generation volumes. The first electrode is defined to transmit radiofrequency (RF) power to the first plasma generation volume, and distribute a first plasma process gas to the first plasma generation volume. The second electrode is defined to transmit RF power to the second plasma generation volume, and hold a substrate in exposure to the second plasma generation volume. The gas distribution unit includes an arrangement of through-holes defined to fluidly connect the first plasma generation volume to the second plasma generation volume. The gas distribution unit also includes an arrangement of gas supply ports defined to distribute a second plasma process gas to the second plasma generation volume.02-09-2012
20120031427Methods For Stabilizing Contact Surfaces of Electrostatic Chucks - Methods for stabilizing a ceramic contact surface of an electrostatic chuck, wherein the electrostatic chuck can be disposed within a reaction chamber of a semiconductor wafer processing assembly including a radio frequency source and a coolant gas supply are described herein. The method may include: clamping electrostatically a conditioning wafer to the ceramic contact surface of the electrostatic chuck; and cycling an output power of the radio frequency source and an output pressure of the coolant gas supply for multiple hot/cold cycles. Each of the hot/cold cycles includes a hot abrasion state and a cold abrasion state. At the hot abrasion state, the output power of the radio frequency source is relatively high and the output pressure of the coolant gas supply is relatively low to yield a relatively hot conditioning wafer. At the cold abrasion state, the output power of the radio frequency source is relatively low and the output pressure of the coolant gas supply is relatively high to yield a relatively cool conditioning wafer.02-09-2012
20120031426Methods For Preventing Corrosion of Plasma-Exposed Yttria-Coated Constituents - In accordance with one embodiment of the present disclosure, a method for preventing corrosion of a plasma-exposed yttria-coated constituent from ambient acidic hydrolysis wherein the plasma-exposed yttria-coated constituent includes a hydrolysable acid precursor is disclosed. The method may include: removing the plasma-exposed yttria-coated constituent from a semiconductor processing assembly; binding the plasma-exposed yttria-coated constituent with flexible moisture wicking material; hydrolyzing the hydrolysable acid precursor with an overwhelming aqueous admixture to form a vitiated acidic compound, wherein the flexible moisture wicking material pulls the vitiated acidic compound away from the plasma-exposed yttria-coated constituent with capillary action; dehydrating the plasma-exposed yttria-coated constituent with additional flexible moisture wicking material to pull a latent amount of the vitiated acidic compound away from the plasma-exposed yttria-coated constituent; and isolating the plasma-exposed yttria-coated constituent from ambient moisture in a moisture obstructing enclosure.02-09-2012
20120028379METHODS AND APPARATUSES FOR CONTROLLING GAS FLOW CONDUCTANCE IN A CAPACITIVELY-COUPLED PLASMA PROCESSING CHAMBER - Apparatuses are provided for controlling flow conductance of plasma formed in a plasma processing apparatus that includes an upper electrode opposite a lower electrode to form a gap therebetween. The lower electrode is adapted to support a substrate and coupled to a RF power supply. Process gas injected into the gap is excited into the plasma state during operation. The apparatus includes a ground ring that concentrically surrounds the lower electrode and has a set of slots formed therein, and a mechanism for controlling gas flow through the slots.02-02-2012
20120024449PARASITIC PLASMA PREVENTION IN PLASMA PROCESSING CHAMBERS - Parasitic plasma in voids in a component of a plasma processing chamber can be eliminated by covering electrically conductive surfaces in an interior of the voids with a sleeve. The voids can be gas holes, lift pin holes, helium passages, conduits and/or plenums in chamber components such as an upper electrode and a substrate support.02-02-2012
20120018411APPARATUS FOR SPATIAL AND TEMPORAL CONTROL OF TEMPERATURE ON A SUBSTRATE - An apparatus for control of a temperature of a substrate has a temperature-controlled base, a heater, a metal plate, a layer of dielectric material. The heater is thermally coupled to an underside of the metal plate while being electrically insulated from the metal plate. A first layer of adhesive material bonds the metal plate and the heater to the top surface of the temperature controlled base. This adhesive layer is mechanically flexible, and possesses physical properties designed to balance the thermal energy of the heaters and an external process to provide a desired temperature pattern on the surface of the apparatus. A second layer of adhesive material bonds the layer of dielectric material to a top surface of the metal plate. This second adhesive layer possesses physical properties designed to transfer the desired temperature pattern to the surface of the apparatus.01-26-2012
20120017950METHOD AND APPARATUS FOR CLEANING A SUBSTRATE USING NON-NEWTONIAN FLUIDS - A method for cleaning a substrate is provided. In this method, a flow of non-Newtonian fluid is provided where at least a portion of the flow exhibits plug flow. To remove particles from a surface of the substrate, the surface of the substrate is placed in contact with the portion of the flow that exhibits plug flow such that the portion of the flow exhibiting plug flow moves over the surface of the substrate. Additional methods and apparatuses for cleaning a substrate also are described.01-26-2012
20120013242BACKSIDE MOUNTED ELECTRODE CARRIERS AND ASSEMBLIES INCORPORATING THE SAME - A carrier assembly is provided comprising a backside mounted electrode carrier and electrode mounting hardware. The backside mounted electrode carrier comprises an electrode accommodating aperture, which in turn comprises a sidewall structure that is configured to limit lateral movement of an electrode positioned in the aperture. The electrode accommodating aperture further comprises one or more sidewall projections that support the weight of an electrode positioned in the aperture. The electrode mounting hardware is configured to engage an electrode positioned in the electrode accommodating aperture from the backside of the carrier and urge the electrode against the sidewall projections so as to limit axial movement of the electrode in the electrode accommodating aperture. Additional embodiments of broader and narrower scope are contemplated.01-19-2012
20120006486METHOD AND APPARATUS FOR REMOVING PHOTORESIST - A method and apparatus remove photoresist from a wafer. A process gas containing sulfur (S), oxygen (O), and hydrogen (H) is provided, and a plasma is generated from the process gas in a first chamber. A radical-rich ion-poor reaction medium is flown from the first chamber to a second chamber where the wafer is placed. The patterned photoresist layer on the wafer is removed using the reaction medium, and then the reaction medium flowing into the second chamber is stopped. Water vapor may be introduced in a solvation zone provided in a passage of the reaction medium flowing down from the plasma such that the water vapor solvates the reaction medium to form solvated clusters of species before the reaction medium reaches the wafer. The photoresist is removed using the solvated reaction medium.01-12-2012
20120003836MOVABLE GROUND RING FOR A PLASMA PROCESSING CHAMBER - A movable ground ring of a movable substrate support assembly is described. The movable ground ring is configured to fit around and provide an RF return path to a fixed ground ring of the movable substrate support assembly in an adjustable gap capacitively-coupled plasma processing chamber wherein a semiconductor substrate supported in the substrate support assembly undergoes plasma processing.01-05-2012
20120000608C-SHAPED CONFINEMENT RING FOR A PLASMA PROCESSING CHAMBER - Described herein is a confinement ring useful as a component of a capacitively-coupled plasma processing chamber. Inner surfaces of the confinement ring provide an extended plasma confinement zone surrounding a gap between an upper electrode and a lower electrode on which a semiconductor substrate is supported during plasma processing in the chamber.01-05-2012
20120000605CONSUMABLE ISOLATION RING FOR MOVABLE SUBSTRATE SUPPORT ASSEMBLY OF A PLASMA PROCESSING CHAMBER - A consumable isolation ring of a movable substrate support assembly is described. The consumable isolation ring is configured to be supported on a step of a movable ground ring fit around a fixed ground ring. The consumable isolation ring is configured to electrically isolate the movable ground ring from a dielectric ring of the movable substrate support assembly.01-05-2012
20110308732Electrode Carrier Assemblies - In accordance with one embodiment of the present disclosure, an electrode carrier assembly is provided including an electrode carrying annulus and a plurality of electrode mounting members. The electrode carrying annulus includes an electrode containment sidewall that forms an inner or outer radius of the electrode carrying annulus. The electrode carrying annulus further includes a plurality of radial sidewall projections that project radially away from the electrode containment sidewall. The radial sidewall projections each include an upward-facing tapered spacer including an upward-facing micro-mesa. The electrode mounting members each include a downward-facing tapered spacer including a downward-facing micro-mesa. The electrode mounting members are rotatably engaged with the electrode carrying annulus, and are configured to rotate between a free position and a bracketed position.12-22-2011
20110306213OZONE PLENUM AS UV SHUTTER OR TUNABLE UV FILTER FOR CLEANING SEMICONDUCTOR SUBSTRATES - A quartz window with an interior plenum is operable as a shutter or UV filter in a degas chamber by supplying the plenum with an ozone-containing gas. Pressure in the plenum can be adjusted to block UV light transmission into the degas chamber or adjust transmittance of UV light through the window. When the plenum is evacuated, the plenum allows maximum transmission of UV light into the degas chamber.12-15-2011
20110306203INTERCONNECT STRUCTURE AND METHOD OF MANUFACTURING A DAMASCENE STRUCTURE - An interconnect structure is provided, including a layer of dielectric material having at least one opening and a first barrier layer on sidewalls defining the opening. A ruthenium-containing second barrier layer overlays the first barrier layer, the second barrier layer having a ruthenium zone, a ruthenium oxide zone, and a ruthenium-rich zone. The ruthenium zone is interposed between the first barrier layer and the ruthenium oxide zone. The ruthenium oxide zone is interposed between the ruthenium zone and the ruthenium-rich zone.12-15-2011
20110300714PLASMA PROCESSING CHAMBER COMPONENT HAVING ADAPTIVE THERMAL CONDUCTOR - An assembly comprises a component of a plasma process chamber, a thermal source and a polymer composite therebetween exhibiting a phase transition between a high-thermal conductivity phase and a low-thermal conductivity phase. The temperature-induced phase change polymer can be used to maintain the temperature of the component at a high or low temperature during multi-step plasma etching processes.12-08-2011
20110294301Method of Preventing Premature Drying - A method for processing a substrate includes receiving a substrate and processing the substrate using a first fluid meniscus and a second fluid meniscus. The first fluid meniscus and the second fluid meniscus are applied to a surface of the substrate such that the first fluid meniscus is spaced apart from the second fluid meniscus by a transition region. A saturated gas chemistry is applied to the surface of the substrate at the transition region. The saturated gas chemistry is configured to maintain moisture in the transition region so as to prevent drying of the surface of the substrate in the transition region, before the second fluid meniscus is applied to the surface of the substrate.12-01-2011
20110294299METHOD AND APPARATUS FOR SILICON OXIDE RESIDUE REMOVAL - A method for removing silicon oxide based residue from a stack with a doped silicon oxide layer with features with diameters less than 100 nm is provided. A wet clean solution of between 25% to 60% by weight of NH12-01-2011
20110287632MOVABLE CHAMBER LINER PLASMA CONFINEMENT SCREEN COMBINATION FOR PLASMA PROCESSING APPARATUSES - A movable symmetric chamber liner in a plasma reaction chamber, for protecting the plasma reaction chamber, enhancing the plasma density and uniformity, and reducing process gas consumption, comprising a cylindrical wall, a bottom wall with a plurality of openings, a raised inner rim with an embedded heater, heater contacts, and RF ground return contacts. The chamber liner is moved by actuators between an upper position at which substrates can be transferred into and out of the chamber, and a lower position at which substrate are processed in the chamber. The actuators also provide electrical connection to the heater and RF ground return contacts.11-24-2011
20110284505APPARATUS AND METHOD FOR TEMPERATURE CONTROL OF A SEMICONDUCTOR SUBSTRATE SUPPORT - A recirculation system of a substrate support on which a semiconductor substrate is subjected to a multistep process in a vacuum chamber, the system comprising a substrate support having at least one liquid flow passage in a base plate thereof, an inlet and an outlet in fluid communication with the flow passage, a supply line in fluid communication with the inlet, and a return line in fluid communication with the outlet; a first recirculator providing liquid at temperature T11-24-2011
20110281438PULSED BIAS PLASMA PROCESS TO CONTROL MICROLOADING - A method for etching a conductive layer through a mask with wider and narrower features is provided. A steady state etch gas is flowed. A steady state RF power is provided to form a plasma from the etch gas. A pulsed bias voltage is provided during the steady state etch gas flow, wherein the pulsed bias voltage has a frequency between 1 to 10,000 Hz. Wider and narrower features are etched into the conductive layer using the plasma formed from the etch gas.11-17-2011
20110281435FAST GAS SWITCHING PLASMA PROCESSING APPARATUS - A plasma chamber with a plasma confinement zone with an electrode is provided. A gas distribution system for providing a first gas and a second gas is connected to the plasma chamber, wherein the gas distribution system can substantially replace one gas in the plasma zone with the other gas within a period of less than 1 s. A first frequency tuned RF power source for providing power to the electrode in a first frequency range is electrically connected to the at least one electrode wherein the first frequency tuned RF power source is able to minimize a reflected RF power. A second frequency tuned RF power source for providing power to the plasma chamber in a second frequency range outside of the first frequency range wherein the second frequency tuned RF power source is able to minimize a reflected RF power.11-17-2011
20110277784Methods for Plasma Cleaning an Internal Peripheral Region of a Plasma Processing Chamber - Methods for operating a plasma processing chamber for a cleaning operation of an internal region of the plasma processing chamber are disclosed. The method is performed when a semiconductor wafer is not present in the plasma processing chamber. The plasma processing chamber has a bottom electrode assembly that includes an inner bottom electrode and an outer bottom electrode, and the inner bottom electrode and outer bottom electrode are electrically isolated by a dielectric ring. The method includes configuring the inner bottom electrode to be set at a floating potential and supplying a process gas into the plasma processing chamber. And, supplying RF power to the outer bottom electrode. The supplying of RF power to the outer bottom electrode is conducted while maintaining the inner bottom electrode at the floating potential and is isolated by the dielectric ring. The RF power produces a plasma that is generated substantially outside of the inner bottom electrode and over the outer bottom electrode. The inner bottom electrode defines a region for holding the semiconductor wafer.11-17-2011
20110275219HIGH PRESSURE BEVEL ETCH PROCESS - A method of bevel edge processing a semiconductor in a bevel plasma processing chamber in which the semiconductor substrate is supported on a semiconductor substrate support is provided. The method comprises evacuating the bevel etcher to a pressure of 3 to 100 Torr and maintaining RF voltage under a threshold value; flowing a process gas into the bevel plasma processing chamber; energizing the process gas into a plasma at a periphery of the semiconductor substrate; and bevel processing the semiconductor substrate with the plasma.11-10-2011
20110271905Methods and System for Processing a Microelectronic Topography - Methods and systems are provided which are adapted to process a microelectronic topography, particularly in association with an electroless deposition process. In general, the methods may include loading the topography into a chamber, closing the chamber to form an enclosed area, and supplying fluids to the enclosed area. In some embodiments, the fluids may fill the enclosed area. In addition or alternatively, a second enclosed area may be formed about the topography. As such, the provided system may be adapted to form different enclosed areas about a substrate holder. In some cases, the method may include agitating a solution to minimize the accumulation of bubbles upon a wafer during an electroless deposition process. As such, the system provided herein may include a means for agitating a solution in some embodiments. Such a means for agitation may be distinct from the inlet/s used to supply the solution to the chamber.11-10-2011
20110262315SUBSTRATE SUPPORT HAVING DYNAMIC TEMPERATURE CONTROL - A substrate support useful for a plasma processing apparatus includes a metallic heat transfer member and an overlying electrostatic chuck having a substrate support surface. The heat transfer member includes one or more passage through which a liquid is circulated to heat and/or cool the heat transfer member. The heat transfer member has a low thermal mass and can be rapidly heated and/or cooled to a desired temperature by the liquid, so as to rapidly change the substrate temperature during plasma processing.10-27-2011
20110259519COATING METHOD FOR GAS DELIVERY SYSTEM - A method of coating the inner surfaces of gas passages of a gas delivery system for a plasma process system such as a plasma etching system includes (a) flowing a fluidic precursor of a corrosion-resistant material through the gas passages and depositing a layer of the fluidic precursor to completely coat the inner surfaces of the gas passages; (b) removing excess fluidic precursor from the inner surfaces; (c) curing the deposited layer of the fluidic precursor to form a corrosion-resistant material coating.10-27-2011
20110253673PLASMA PROCESSING METHOD AND APPARATUS WITH CONTROL OF PLASMA EXCITATION POWER - The amount of RF power supplied to a plasma in a vacuum plasma processing chamber is gradually changed on a preprogrammed basis in response to signals stored in a computer memory. The computer memory stores signals so that other processing chamber parameters (pressure, gas species and gas flow rates) remain constant while the gradual change occurs. The stored signals enable rounded corners, instead of sharp edges, to be etched, e.g., at an intersection of a trench wall and base.10-20-2011
20110244686INORGANIC RAPID ALTERNATING PROCESS FOR SILICON ETCH - A method for etching features into a silicon substrate disposed below a mask in a plasma processing chamber is provided. The silicon substrate is etched through the mask comprising a plurality of cycles, wherein each cycle comprises a sidewall deposition phase and an etch phase. The sidewall deposition phase comprises providing a flow of sidewall inorganic deposition phase gas comprising a silicon containing compound gas and at least one of oxygen, nitrogen or NO10-06-2011
20110244600METHOD FOR TUNABLY REPAIRING LOW-K DIELECTRIC DAMAGE - A method for providing a tuned repair for damage to a silicon based low-k dielectric layer with organic compounds, where damage replaces a methyl attached to silicon with a hydroxyl attached to silicon is provided. A precursor gas is provided, comprising a first repair agent represented as Si—(R)10-06-2011
20110241706NON-CONTACT DETECTION OF SURFACE FLUID DROPLETS - A system for detecting fluid on a substrate is provided. The system includes, but is not limited to, a sensor board, a first capacitive sensor, and a platform upon which the substrate is to be placed. The first capacitive sensor is mounted on the sensor board. The first capacitive sensor has a transmit sensor pad for transmitting a signal, a receive sensor pad for receiving the signal, and an analog-to-digital convertor connected with the receive sensor pad for analyzing the received signal. The platform is a first distance from the transmit and receive sensor pads.10-06-2011
20110236159REDUCTION OF PARTICLE CONTAMINATION PRODUCED BY MOVING MECHANISMS IN A PROCESS TOOL - In various exemplary embodiments described herein, a system and related method to reduce particle contamination on substrates is disclosed. The system includes a substrate traverser mechanism having tracks to transport substrate carriers with one or more traverser ducts arranged to surround, at least partially, the tracks. The one or more ducts have slits along at least a substantial portion of a length of the tracks. A traverser exhaust fan is coupled to one end of each of the one or more traverser ducts. The fan provides sufficient volumetric airflow such that a velocity of the volumetric airflow through the slits is greater than a terminal settling velocity of a predetermined particle size. The fan draws particles less than approximately the predetermined particle size generated by the substrate traverser mechanism into the one or more traverser ducts.09-29-2011
20110232771AIRFLOW MANAGEMENT FOR LOW PARTICULATE COUNT IN A PROCESS TOOL - In various exemplary embodiments described herein, a system and related method to provide airflow management system in a substrate production tool includes a housing to couple the substrate production tool to a fan filter unit to provide filtered air to the housing, a facility connection to couple the substrate production tool to a reduced pressure exhaust mechanism, a substrate transfer section coupled below the housing and in airflow communication with the facility connection, and a substrate process area coupled to the substrate transfer section by one or more substrate transfer slots. A chamber substantially containing the substrate transfer section and the substrate process area is coupled to the housing to receive the filtered air and to the facility connection to provide an exhaust for excess gas flow. The chamber maintains a low pressure in the substrate process area relative to the substrate transfer section.09-29-2011
20110232678EXTENDING STORAGE TIME OF REMOVED PLASMA CHAMBER COMPONENTS PRIOR TO CLEANING THEREOF - A method of extending storage time prior to cleaning a component of a plasma chamber is provided. The method comprises removing the component from the chamber, covering a thermal spray coating on the component while the surface is exposed to atmospheric air, storing the component, optionally removing the covering, and optionally wet cleaning reaction by-products from the thermal spray coating. Alternatively, instead of, or in addition to covering a thermal spray coating on the component, the component can be placed into a desiccator or dry-box.09-29-2011
20110230040INDUCTIVELY COUPLED DUAL ZONE PROCESSING CHAMBER WITH SINGLE PLANAR ANTENNA - A dual zone plasma processing chamber is provided. The plasma processing chamber includes a first substrate support having a first support surface adapted to support a first substrate within the processing chamber and a second substrate support having a second support surface adapted to support a second substrate within the processing chamber. One or more gas sources in fluid communication with one or more gas distribution members supply process gas to a first zone adjacent to the first substrate support and a second zone adjacent to the second substrate support. A radio-frequency (RF) antenna adapted to inductively couple RF energy into the interior of the processing chamber and energize the process gas into a plasma state in the first and second zones. The antenna is located between the first substrate support and the second substrate support.09-22-2011
20110223770NITRIDE PLASMA ETCH WITH HIGHLY TUNABLE SELECTIVITY TO OXIDE - A method for selectively etching a nitride layer with respect to a silicon oxide based layer over a substrate is provided. The substrate is placed in a plasma processing chamber. The nitride layer is etched, comprising the steps of flowing a nitride etch gas comprising a hydrocarbon species, an oxygen containing species and a fluorocarbon or hydrofluorocarbon species into the plasma chamber, forming a plasma from the nitride etch gas, and using the plasma from the nitride etch gas to selectively etch the nitride layer with respect to the silicon oxide based layer.09-15-2011
20110214688CLEANING SOLUTION FOR SIDEWALL POLYMER OF DAMASCENE PROCESSES - An aqueous cleaning solution and a method of use of the cleaning solution are described herein for removing sidewall polymer of a damascene process on a wafer without damaging any low-k material and interconnect material on the wafer.09-08-2011
20110214687CONFIGURABLE BEVEL ETCHER - A device for cleaning a bevel edge of a semiconductor substrate. The device includes: a lower support having a cylindrical top portion; a lower plasma-exclusion-zone (PEZ) ring surrounding the outer edge of the top portion and adapted to support the substrate; an upper dielectric component opposing the lower support and having a cylindrical bottom portion; an upper PEZ ring surrounding the outer edge of the bottom portion and opposing the lower PEZ ring; and at least one radiofrequency (RF) power source operative to energize process gas into plasma in an annular space defined by the upper and lower PEZ rings, wherein the annular space encloses the bevel edge.09-08-2011
20110206833EXTENSION ELECTRODE OF PLASMA BEVEL ETCHING APPARATUS AND METHOD OF MANUFACTURE THEREOF - An extension electrode with enhanced durability and etching rate for plasma bevel etchers. The extension electrode comprises a plasma exposed truncated conical surface on an annular aluminum body. The aluminum body can roughened prior to anodization and coated with a ceramic material such as yttria.08-25-2011
20110206479FLUSH MOUNTED FASTENER FOR PLASMA PROCESSING APPARATUS - A fastener assembly for parts of a plasma chamber. The fastener assembly includes a bolt with a tool engaging socket and a spring-loaded pin which fits in a through hole of the bolt. When installed, the spring-loaded pin substantially fills the space in the socket and thus prevents parasitic plasma from forming in spaces between opposed surfaces of the pin and bolt. When a tool such as a hex key is inserted into the socket, the spring-loaded pin retracts and the tool rotates the bolt to attach an upper part to a lower part by engaging threads of the bolt with a threaded hole in the lower part.08-25-2011
20110200415SUBSTRATE LOAD AND UNLOAD MECHANISMS FOR HIGH THROUGHPUT - In various exemplary embodiments described herein, a system includes a plurality of carrier arms each having concentrically mounted midpoints between opposing ends of the carrier arms with a wafer carrier mounted on each of the opposing ends of the carrier arms. A hub includes a plurality of concentrically mounted drives where each of the plurality of drives is coupled near the midpoint of a respective one of the plurality of carrier arms. Each of the plurality of drives is configured to be controlled independently of the remaining plurality of concentrically mounted drives. A respective motor is coupled to each of the concentrically mounted drives and is configured to move the coupled carrier arm in a rotary manner. A linear wafer transport mechanism moves wafers to or from select ones of the wafer carriers on the plurality of carrier arms to an easy handoff location for a load/unload robot.08-18-2011
20110197928Carrier for Reducing Entrance and/or Exit Marks Left by a Substrate-Processing Meniscus - A carrier for supporting a substrate during processing by a meniscus formed by upper and lower proximity heads is described. The carrier includes a frame having an opening sized for receiving a substrate and a plurality of support pins for supporting the substrate within the opening. The opening is slightly larger than the substrate such that a gap exists between the substrate and the opening. Means for reducing a size and frequency of entrance and/or exit marks on substrates is provided, the means aiding and encouraging liquid from the meniscus to evacuate the gap. A method for reducing the size and frequency of entrance and exit marks is also provided.08-18-2011
20110189858METHOD FOR REDUCING PATTERN COLLAPSE IN HIGH ASPECT RATIO NANOSTRUCTURES - A method is provided for treating the surface of high aspect ratio nanostructures to help protect the delicate nanostructures during some of the rigorous processing involved in fabrication of semiconductor devices. A wafer containing high aspect ratio nanostructures is treated to make the surfaces of the nanostructures more hydrophobic. The treatment may include the application of a primer that chemically alters the surfaces of the nanostructures preventing them from getting damaged during subsequent wet clean processes. The wafer may then be further processed, for example a wet cleaning process followed by a drying process. The increased hydrophobicity of the nanostructures helps to reduce or prevent collapse of the nanostructures.08-04-2011
20110186227PLASMA CHAMBER FOR WAFER BEVEL EDGE PROCESSING - The embodiments provide structures and mechanisms for removal of etch byproducts, dielectric films and metal films on and near the substrate bevel edge, and chamber interior to avoid the accumulation of polymer byproduct and deposited films and to improve process yield. In one example, a chamber for wafer bevel edge cleaning is provided. The chamber includes a bottom electrode having a bottom electrode surface for supporting the wafer when present. Also included is a top edge electrode surrounding an insulating plate. The insulator plate is opposing the bottom electrode. The top edge electrode is electrically grounded and has a down-facing L shape. Further included in the chamber is a bottom edge electrode that is electrically grounded and spaced apart from the bottom electrode. The bottom edge electrode is disposed to encircle the bottom electrode. The bottom edge electrode is oriented to oppose the down-facing L shape of the top edge electrode.08-04-2011
20110183522METHOD AND APPARATUS FOR PATTERN COLLAPSE FREE WET PROCESSING OF SEMICONDUCTOR DEVICES - A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse.07-28-2011
20110180117METHODS AND APPARATUS FOR WET CLEANING ELECTRODE ASSEMBLIES FOR PLASMA PROCESSING APPARATUSES - Methods of cleaning backing plates of electrode assemblies, or electrode assemblies including a backing plate and an electrode plate are provided. The methods can be used to clean backing plates and electrode plates made of various materials, such as silicon electrode plates and graphite and aluminum backing plates. The backing plates and electrode assemblies can be new, used or refurbished. A flushing fixture that can be used in the cleaning methods is also provided.07-28-2011
20110163420ASPECT RATIO ADJUSTMENT OF MASK PATTERN USING TRIMMING TO ALTER GEOMETRY OF PHOTORESIST FEATURES - A method for adjusting the geometry of photomask patterns is provided. Such adjusted pattern can be employed to achieve pattern doubling in subsequent layers. A patterned photoresist mask is provided over an underlayer. A polymer layer is placed over the mask. The mask is selectively trimmed to generate individual mask features having an increased aspect ratio. Subsequent pattern layers can be formed on the trimmed mask pattern to generate a hard mask having increased pattern density. The hard mask is selectively etched and the material of the trimmed mask pattern is removed. The underlayer is then etched to achieve pattern transfer from the hard mask to the underlayer to achieve a final double density pattern.07-07-2011
20110151670METHOD OF CONTROLLING ETCH MICROLOADING FOR A TUNGSTEN-CONTAINING LAYER - A method for etching features of different aspect ratios in a tungsten containing layer is provided. An etch gas is provided containing a tungsten etch component and a deposition component. A plasma is formed from the provided etch gas. A tungsten containing layer patterned with wide and narrow features is etched with the provided plasma.06-23-2011
20110146909METHODS FOR WET CLEANING QUARTZ SURFACES OF COMPONENTS FOR PLASMA PROCESSING CHAMBERS - Methods for wet cleaning quartz surfaces of components for plasma processing chambers in which semiconductor substrates are processed, such as etch chambers and resist stripping chambers, include contacting the quartz surface with at least one organic solvent, a basic solution and different acid solutions, so as to remove organic and metallic contaminants from the quartz surface. The quartz surface is preferably contacted with one of the acid solutions at least two times.06-23-2011
20110146705UV LAMP ASSEMBLY OF DEGAS CHAMBER HAVING ROTARY SHUTTERS - A UV lamp assembly having rotary shutters. Each rotary shutter has a concave wall with a reflective concave surface. The rotary shutters can be collectively rotated between an open position and an closed position. At the open position, the rotary shutters do not block UV light of UV lamps from leaving the UV lamp assembly while at the closed position the rotary shutters block UV light from leaving the UV lamp assembly.06-23-2011
20110146704METHODOLOGY FOR CLEANING OF SURFACE METAL CONTAMINATION FROM AN UPPER ELECTRODE USED IN A PLASMA CHAMBER - A method for cleaning metallic contaminants from an upper electrode used in a plasma chamber. The method comprises a step of soaking the upper electrode in a cleaning solution of concentrated ammonium hydroxide, hydrogen peroxide and water. The cleaning solution is free of hydrofluoric acid and hydrochloric acid. The method further comprises an optional step of soaking the upper electrode in dilute nitric acid and rinsing the cleaned upper electrode.06-23-2011
20110146703METHOD AND APPARATUS FOR PROCESSING BEVEL EDGE - A method and apparatus for processing a bevel edge is provided. A substrate is placed in a bevel processing chamber and a passivation layer is formed on the substrate only around a bevel region of the substrate using a passivation plasma confined in a peripheral region of the bevel processing chamber. The substrate may undergo a subsequent semiconductor process, during which the bevel edge region of the substrate is protected by the passivation layer. Alternatively, the passivation layer may be patterned using a patterning plasma formed in an outer peripheral region of the processing chamber, the patterning plasma being confined by increasing plasma confinement. The passivation layer on outer edge portion of the bevel region is removed, while the passivation layer on an inner portion of the bevel region is maintained. The bevel edge of the substrate may be cleaned using the patterned passivation layer as a protective mask.06-23-2011
20110143553INTEGRATED TOOL SETS AND PROCESS TO KEEP SUBSTRATE SURFACE WET DURING PLATING AND CLEAN IN FABRICATION OF ADVANCED NANO-ELECTRONIC DEVICES - Methods and systems for handling a substrate through processes including an integrated electroless deposition process includes processing a surface of the substrate in an electroless deposition module to deposit a layer over conductive features of the substrate using a deposition fluid. The surface of the substrate is then rinsed in the electroless deposition module with a rinsing fluid. The rinsing is controlled to prevent de-wetting of the surface so that a transfer film defined from the rinsing fluid remains coated over the surface of the substrate. The substrate is removed from the electroless deposition module while maintaining the transfer film over the surface of the substrate. The transfer film over the surface of the substrate prevents drying of the surface of the substrate so that the removing is wet. The substrate, once removed from the electroless deposition module, is moved into a post-deposition module while maintaining the transfer film over the surface of the substrate.06-16-2011
20110143462ADJUSTING SUBSTRATE TEMPERATURE TO IMPROVE CD UNIFORMITY - A plasma etching system having a substrate support assembly with multiple independently controllable heater zones. The plasma etching system is configured to control etching temperature of predetermined locations so that pre-etch and/or post-etch non-uniformity of critical device parameters can be compensated for.06-16-2011
20110140715METHODS FOR MEASURING DIELECTRIC PROPERTIES OF PARTS - A method is disclosed for calibrating a capacitance of an apparatus for measuring dielectric properties of a part. The apparatus includes an electrically grounded chamber, a lower electrode disposed within the chamber and connected to a radiofrequency (RF) transmission rod, an electrically grounded upper electrode disposed within the chamber above the lower electrode, and a variable capacitor connected to control transmission of RF power through the RF transmission rod to the lower electrode. A method is also disclosed for determining a capacitance of a part through use of the apparatus. A method is also disclosed for determining a dielectric constant of a part through use of the apparatus. A method is also disclosed for determining a loss tangent of a part through use of the apparatus.06-16-2011
20110132400Method and System for Uniformly Applying a Multi-Phase Cleaning Solution to a Substrate - An apparatus used to supply a force onto a cleaning solution for processing a substrate for cleaning surface contaminants is disclosed. The apparatus includes a force applicator and a gate. The force applicator is configured to be adjusted to a first height to off the surface of the substrate. The gate is positioned adjacent to a trailing point of the force applicator and is configured to be adjusted to a second height off of the surface of the substrate to enable planarization of the cleaning solution as the solution moves to the trailing point.06-09-2011
20110126984EDGE RING ASSEMBLY FOR PLASMA ETCHING CHAMBERS - An edge ring assembly used in a plasma etching chamber includes a dielectric coupling ring and a conductive edge ring. In one embodiment, the dielectric coupling ring has an annular projection extending axially upward from its inner periphery. The dielectric coupling ring is adapted to surround a substrate support in a plasma etching chamber. The conductive edge ring is adapted to surround the annular projection of the dielectric coupling ring. A substrate supported on the substrate support overhangs the substrate support and overlies the annular projection of the dielectric coupling ring and a portion of the conductive edge ring. In another embodiment, the dielectric coupling ring has a rectangular cross section. The dielectric coupling ring and the conductive edge ring are adapted to surround a substrate support in a plasma etching chamber. A substrate supported on the substrate support overhangs the substrate support and overlies a portion of the conductive edge ring.06-02-2011
20110126852ELECTROSTATIC CHUCK WITH AN ANGLED SIDEWALL - A substrate support for a plasma processing chamber has an angled sidewall at an upper periphery thereof. The substrate is surrounded by an edge ring which underlies a substrate supported on an upper substrate support surface of the substrate support during plasma processing. The angled sidewall is the only surface of the substrate support exposed and subject to byproduct deposition during plasma processing. The angled sidewall enhances sputtering rate of the byproduct deposition during an in situ chamber clean process wherein a cleaning gas supplied to the chamber is energized into a plasma state for cleaning the byproduct deposition.06-02-2011
20110120653ANTENNA FOR PLASMA PROCESSOR AND APPARATUS - An antenna includes excitation terminals responsive to an RF source to supply an RF electromagnetic field to a plasma that processes a workpiece in a vacuum chamber. The coil includes a transformer having a primary winding coupled to the excitation terminals and a multi-turn plasma excitation secondary winding connected in series with a capacitor.05-26-2011
20110117749METHOD FOR REDUCING LINE WIDTH ROUGHNESS WITH PLASMA PRE-ETCH TREATMENT ON PHOTORESIST - A method for reducing line width roughness (LWR) of a feature in an etch layer below a patterned photoresist mask having mask features is provided. The method includes (a) non-etching plasma pre-etch treatment of the photoresist mask, and (b) etching of a feature in the etch layer through the pre-treated photoresist mask using an etching gas. The non-etching plasma pre-etch treatment includes (a1) providing a treatment gas containing H05-19-2011
20110104884HOT EDGE RING WITH SLOPED UPPER SURFACE - A hot edge ring with extended lifetime comprises an annular body having a sloped upper surface. The hot edge ring includes a step underlying an outer edge of a semiconductor substrate supported in a plasma processing chamber wherein plasma is used to process the substrate. The step includes a vertical surface which surrounds the outer edge of the substrate and the sloped upper surface extends upwardly and outwardly from the upper periphery of the vertical surface.05-05-2011
20110104616LINE WIDTH ROUGHNESS IMPROVEMENT WITH NOBLE GAS PLASMA - A method for forming a photoresist mask may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a substrate, ionizing the UV producing gas to produce UV rays to irradiate the substrate, and etching features into the substrate through the photoresist mask.05-05-2011
20110100399IN SITU MORPHOLOGICAL CHARACTERIZATION OF FOAM FOR A PROXIMITY HEAD - In an example embodiment, a wet system delivers a flow of cleaning foam through a channel in a proximity head to a meniscus interfacing with a semiconductor wafer. The wet system diverts a sample of the flow from the channel through a transparent cell that is connected to the channel by an input passage that leads from the channel to the transparent cell and by an output passage that leads from the transparent cell back to the channel. The wet system illuminates the sample in the transparent cell with an LED from the top or the back and captures an image of the illuminated sample with a CCD camera. The image shows a morphological attribute of the cleaning foam such as bubble diameter or spacing. The wet system generates a statistical characterization from the morphological attribute and adjusts other attributes of the cleaning foam based on the statistical characterization.05-05-2011
20110097904METHOD FOR REPAIRING LOW-K DIELECTRIC DAMAGE - A method for repairing damage to a silicon based low-k dielectric layer with organic compounds, where damage replaces a methyl attached to silicon with a hydroxyl attached to silicon is provided. A repair gas comprising CH04-28-2011
20110097902METHOD AND APPARATUS OF HALOGEN REMOVAL - A wafer is provided into an entrance load lock chamber. A vacuum is created in the entrance load lock chamber. The wafer is transported to a processing tool. The wafer is processed in a process chamber to provide a processed wafer, wherein the processing forms halogen residue. A degas step is provided in the process chamber after processing the wafer. The processed wafer is transferred into a degas chamber. The processed wafer is treated in the degas chamber with UV light and a flow of gas comprising at least one of ozone, oxygen, or H04-28-2011
20110097900QUARTZ WINDOW FOR A DEGAS CHAMBER - A five-sided quartz window configured to be mounted on a degas chamber as a UV-transmissive window. The quartz window is made of synthetic quartz and has a uniform thickness. The shape of the quartz window is defined by an upper surface, a lower surface and a sidewall therebetween. The sidewall has five straight sections interconnected by five arcuate sections. The quartz window has four arcuate recesses extending into the sidewall.04-28-2011
20110097821METHOD FOR TUNABLY REPAIRING LOW-K DIELECTRIC DAMAGE - A method for providing a tuned repair for damage to a silicon based low-k dielectric layer with organic compounds, where damage replaces a methyl attached to silicon with a hydroxyl attached to silicon is provided. A precursor gas is provided, comprising a first repair agent represented as Si—(R)04-28-2011
20110097477Methods and Apparatus Configurations for Affecting Movement of Fluids Within a Microelectronic Topography Processing Chamber and a Method for Passivating Hardware Within a Microelectronic Topography Processing Chamber - An apparatus for processing microelectronic topographies, a method of use of such an apparatus, and a method for passivating hardware of microelectronic processing chambers are provided. The apparatus includes a substrate holder configured to support a microelectronic topography and a rotatable case with sidewalls arranged on opposing sides of the substrate holder. The method of using such an apparatus includes positioning a microelectronic topography upon a substrate holder of a processing chamber, exposing the microelectronic topography to a fluid within the processing chamber, and rotating a case of the processing chamber. The rotation is sufficient to affect movement of the fluid relative to the surface of the microelectronic topography. A method for passivating hardware of a microelectronic processing chamber includes exposing the hardware to an organic compound and subsequently exposing the hardware to an agent configured to form polar bonds with the organic compound.04-28-2011
20110095207METHOD AND APPARATUS OF HALOGEN REMOVAL USING OPTIMAL OZONE AND UV EXPOSURE - A method and apparatus for removing halogen residue from a processed wafer is provided. A wafer is transferred into a processing tool where it is processed in a manner that leaves halogen residue on the wafer. The processed wafer is then moved into a degas chamber where it is treated with UV light and a gas mixture containing at least one of ozone and oxygen to remove the halogen residue. Once treated, the wafer is transferred into an isolation station where it is isolated from the unprocessed wafers for a period of time to allow any remaining residue to dissipate before it is returned to the cassette where it started.04-28-2011
20110092072HEATING PLATE WITH PLANAR HEATING ZONES FOR SEMICONDUCTOR PROCESSING - A heating plate for a substrate support assembly in a semiconductor plasma processing apparatus, comprises multiple independently controllable planar heater zones arranged in a scalable multiplexing layout, and electronics to independently control and power the planar heater zones. A substrate support assembly in which the heating plate is incorporated includes an electrostatic clamping electrode and a temperature controlled base plate. Methods for manufacturing the heating plate include bonding together ceramic or polymer sheets having planar heater zones, power supply lines, power return lines and vias.04-21-2011
20110086513UPPER ELECTRODE BACKING MEMBER WITH PARTICLE REDUCING FEATURES - Components of a plasma processing apparatus includes a backing member with gas passages attached to an upper electrode with gas passages. To compensate for the differences in coefficient of thermal expansion between the metallic backing member and upper electrode, the gas passages are positioned and sized such that they are misaligned at ambient temperature and substantially concentric at an elevated processing temperature. Non-uniform shear stresses can be generated in the elastomeric bonding material, due to the thermal expansion. Shear stresses can either be accommodated by applying an elastomeric bonding material of varying thickness or using a backing member comprising of multiple pieces.04-14-2011
20110083809EDGE-CLAMPED AND MECHANICALLY FASTENED INNER ELECTRODE OF SHOWERHEAD ELECTRODE ASSEMBLY - An inner electrode of a showerhead electrode assembly useful for plasma etching includes features providing improved positioning accuracy and reduced warping, which leads to enhanced uniformity of plasma processing rate. The assembly can include a thermal gasket set and fasteners such as bolts or cam locks located on a radius of ¼ to ½ the radius of the inner electrode. A method of assembling the inner electrode and gasket set to a supporting member is also provided.04-14-2011
20110081783SHOWERHEAD ELECTRODE ASSEMBLIES FOR PLASMA PROCESSING APPARATUSES - Showerhead electrode assemblies are disclosed, which include a showerhead electrode adapted to be mounted in an interior of a vacuum chamber; an optional backing plate attached to the showerhead electrode; a thermal control plate attached to the backing plate or to the showerhead electrode at multiple contact points across the backing plate; and at least one thermally and electrically conductive gasket separating the backing plate and the thermal control plate, or the backing plate and showerhead electrode, at the contact points. Methods of processing semiconductor substrates using the showerhead electrode assemblies are also disclosed.04-07-2011
20110081779Method and Apparatus for Material Deposition - Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source.04-07-2011
20110070740CLAMPED MONOLITHIC SHOWERHEAD ELECTRODE - An electrode assembly for a plasma reaction chamber used in semiconductor substrate processing. The assembly includes an upper showerhead electrode which is mechanically attached to a backing plate by a series of spaced apart cam locks. A guard ring surrounds the backing plate and is movable to positions at which openings in the guard ring align with openings in the backing plate so that the cam locks can be rotated with a tool to release locking pins extending from the upper face of the showerhead electrode.03-24-2011
20110067814MULTI-PART ELECTRODE FOR A SEMICONDUCTOR PROCESSING PLASMA REACTOR AND METHOD OF REPLACING A PORTION OF A MULTI-PART ELECTRODE - An improved upper electrode system has a multi-part electrode in which a central portion of the electrode having high wear is replaceable independent of an outer peripheral portion of the electrode. The upper electrode can be used in plasma processing systems for processing semiconductor substrates, such as by etching or CVD. The multi-part upper electrode system is particularly useful for large size wafer processing chambers, such as 300 mm wafer processing chambers for which monolithic electrodes are unavailable or costly.03-24-2011
20110065273Methods of Fabricating a Barrier Layer Over Interconnect Structures in Atomic Deposition Environments - Methods of depositing a barrier layer on an interconnect structure in an atomic deposition environment are provided. One method includes depositing a barrier layer on the interconnect structure with a first nitrogen concentration during a first phase of deposition in the atomic deposition environment, The interconnect structure is formed in a dielectric layer. Then, continuing the deposition of the barrier layer on the interconnect structure with a second nitrogen concentration during a second phase deposition in the atomic deposition environment. The nitrogen concentration step-wisely decreases from the first nitrogen concentration in the first phase of the barrier layer to the second nitrogen concentration in the second phase of the barrier layer, and the first nitrogen concentration is highest where the barrier layer is in contact with the dielectric layer. A copper layer is then formed over the barrier layer, such that a nitrogen concentration in the barrier layer is lowest where the barrier layer is in contact with the copper layer.03-17-2011
20110063772METHOD OF DETERMINING A TARGET MESA CONFIGURATION OF AN ELECTROSTATIC CHUCK - A method of modifying the heat transfer coefficient profile of an electrostatic chuck by configuring the areal density of a mesa configuration of an insulating layer of the chuck is provided. A method of modifying the capacitance profile of an electrostatic chuck by adjustment or initial fabrication of the height of a mesa configuration of an insulating layer of the chuck is further provided. The heat transfer coefficient at a given site can be measured by use of a heat flux probe, whereas the capacitance at a given site can be measured by use of a capacitance probe. The probes are placed on the insulating surface of the chuck and may include a plurality of mesas in a single measurement. A plurality of measurements made across the chuck provide a heat transfer coefficient profile or a capacitance profile, from which a target mesa areal density and a target mesa height are determined. The target density and height are achieved mechanically; the target density by mechanically adjusting the areal density of existing mesas; and the target height by creating or deepening low areas surrounding planned or existing mesas, respectively. This can be accomplished using any of known techniques for controlled material removal such as laser machining or grit blast machining on an X-Y table.03-17-2011
20110061687Apparatus for Contained Chemical Surface Treatment - Apparatuses for preparing a surface of a substrate using a proximity head includes a carrier to hold and move the substrate along an axis and a proximity head having a head surface with a plurality of outlet ports defined thereon. The proximity head is defined to be positioned proximate and over the carrier and the surface of the substrate. A length of the head surface of the proximity head is defined to be greater than a diameter of the substrate and at least partially overlapping over the carrier when the substrate is present. The proximity head includes a first set of outlet ports in a first region defining a first applicator that is configured to apply a non-Newtonian fluid between a surface of the carrier and the head surface of the proximity head. A second set of outlet ports in a second region of the proximity head defines a second applicator that is configured to apply a first chemistry to the surface of the substrate when present. The second region is adjacent to the first region. A third set of outlet ports in a third region of the proximity head defines a third applicator that is configured to apply the non-Newtonian fluid between the head surface of the proximity head and the surface of the substrate when present. The third region is defined adjacent to the second region. A fourth set of outlet ports is defined in the second region of the proximity head to substantially remove the first chemistry from the surface of the substrate when present.03-17-2011
20110059615HYBRID RF CAPACITIVELY AND INDUCTIVELY COUPLED PLASMA SOURCE USING MULTIFREQUENCY RF POWERS AND METHODS OF USE THEREOF - A device for inductively confining capacitively coupled RF plasma formed in a plasma processing apparatus. The apparatus includes an upper electrode and a lower electrode that is adapted to support a substrate and to generate the plasma between the substrate and the upper electrode. The device includes a dielectric support ring that concentrically surrounds the upper electrode and a plurality of coil units mounted on the dielectric support ring. Each coil unit includes a ferromagnetic core positioned along a radial direction of the dielectric support ring and at least one coil wound around each ferromagnetic core. The coil units generate, upon receiving RF power from an RF power source, electric and magnetic fields that reduce the number of charged particles of the plasma diffusing away from the plasma.03-10-2011
20110056626REPLACEABLE UPPER CHAMBER PARTS OF PLASMA PROCESSING APPARATUS - An upper chamber section of a plasma reaction chamber includes a ceramic window with blind bores in an upper surface for receipt of a thermal couple and a resistance temperature detector, a top chamber interface which comprises an upper surface which vacuum seals against the bottom of the window and a gas injection system comprising 8 side injectors mounted in the sidewall of the top chamber interface and a gas delivery system comprising tubing which provides symmetric gas flow to the 8 injectors from a single gas feed connection.03-10-2011
20110053379PROFILE CONTROL IN DIELECTRIC ETCH - A method for etching a dielectric layer is provided. The dielectric layer is disposed over a substrate and below a patterned mask having a line-space pattern. The method includes (a) providing an etchant gas comprising CF4, COS, and an oxygen containing gas, (b) forming a plasma from the etchant gas, and (c) etching the dielectric layer into the line-space pattern through the mask with the plasma from the etchant gas. The gas flow rate of CF4 may have a ratio greater than 50% of a total gas flow rate of all reactive gas components. The gas flow rate of COS may be between 1% and 50%. The method reduces bowing in etching of the dielectric layer by adding COS to the etchant gas.03-03-2011
20110049099HARDMASK TRIM METHOD - A method for forming features in a polysilicon layer is provided. A hardmask layer is formed over the polysilicon layer. A photoresist mask is formed over the hardmask layer. The hardmask layer is etched through the photoresist mask to form a patterned hardmask. The patterned hardmask is trimmed by providing a non-carbon containing trim gas comprising oxygen and a fluorine containing compound, forming a plasma from the trim gas, and trimming the hardmask. Features are etched into the polysilicon layer through the hardmask.03-03-2011
20110048467Apparatus and System for Cleaning Substrate - An upper processing head includes a topside module defined to apply a cleaning material to a top surface of a substrate and then expose the substrate to a topside rinsing meniscus. The topside module is defined to flow a rinsing material through the topside rinsing meniscus in a substantially uni-directional manner towards the cleaning material and opposite a direction of movement of the substrate. A lower processing head includes a bottomside module defined to apply a bottomside rinsing meniscus to the substrate so as to balance a force applied to the substrate by the topside rinsing meniscus. The bottomside module is defined to provide a drain channel for collecting and draining the cleaning material dispensed from the upper processing head when the substrate is not present between the upper and lower processing heads. The upper and lower processing heads can include multiple instantiations of the topside and bottomside modules, respectively.03-03-2011
20110042879CAM LOCK ELECTRODE CLAMP - A cam lock clamp comprises a stud having a substantially cylindrical body with a first end including a head area and a second end arranged to support one or more disc springs concentrically about the stud. A socket is arranged to mechanically couple concentrically around the stud with the head area of the stud being exposed above an uppermost portion of the socket. The socket is configured to be firmly attached to a consumable material. A camshaft has a substantially cylindrical body and is configured to mount within a bore of a backing plate. The camshaft further comprises an eccentric cutout area located in a central portion of the camshaft body. The camshaft is configured to engage and lock the head area of the stud when the consumable material and the backing plate are proximate to one another.02-24-2011
20110039410Apparatus and Method for Substrate Electroless Plating - A substrate is secured on a chuck that maintains a top surface of the substrate in a substantially level orientation. The chuck is positioned within a cavity of a vessel such that a body portion of the chuck is maintained in a spaced apart relationship with a surface of the cavity. An electroless plating solution is disposed in a region between the body portion of the chuck and the surface of the cavity such that an upper surface of the electroless plating solution is at a level lower than the substrate. The chuck is lowered within the cavity to cause the electroless plating solution to be displaced upward and flow over the top surface of the substrate in a substantially uniform manner from a periphery of the substrate to a center of the substrate. The chuck is then raised such that the electroless plating solution flows off of the substrate.02-17-2011
20110030895MASK TRIMMING - A method for etching a dielectric layer is provided. A patterned mask with mask features is formed over a dielectric layer. The mask has isolated areas and dense areas of the mask features. The mask is trimmed by a plurality of cycles, where each cycle includes depositing a deposition layer, and selectively etching the deposition layer and the patterned mask. The selective etching selectively trims the isolated areas of the mask with respect to the dense areas of the mask. The dielectric layer is etched using the thus trimmed mask. The mask is removed.02-10-2011
20110024046Apparatus and Method for Controlling Plasma Potential - An apparatus is provided for semiconductor wafer plasma processing. The apparatus includes a chamber having a lower electrode and an upper electrode disposed therein. The lower electrode is defined to transmit a radiofrequency current through the chamber to generate a plasma within the chamber. The lower electrode is also defined to support a semiconductor wafer in exposure to the plasma. The upper electrode is disposed above and in a spaced apart relationship with the lower electrode. The upper electrode is defined by a doped semiconductor material. A doping concentration within the upper electrode varies radially from a center to a periphery of the upper electrode. The electric potential of the upper electrode influences an electric potential of the plasma within the chamber.02-03-2011
20110024045Apparatus and Method for Controlling Plasma Potential - A chamber includes a lower electrode and an upper electrode. The lower electrode is defined to transmit a radiofrequency current through the chamber and to support a semiconductor wafer in exposure to a plasma within the chamber. The upper electrode is disposed above and in a spaced apart relationship with the lower electrode. The upper electrode is electrically isolated from the chamber and is defined by a central section and one or more annular sections disposed concentrically outside the central section. Adjacent sections of the upper electrode are electrically separated from each other by a dielectric material. Multiple voltage sources are respectively connected to the upper electrode sections. Each voltage source is defined to control an electric potential of the upper electrode section to which it is connected, relative to the chamber. The electric potential of each upper electrode section influences an electric potential of the plasma within the chamber.02-03-2011
20110023779Variable Volume Plasma Processing Chamber and Associated Methods - A plasma processing chamber includes a substrate support having a top surface defined to support a substrate in a substantially horizontal orientation within the chamber. The plasma processing chamber also includes a number of telescopic members disposed within the chamber outside a periphery of the substrate support. The number of telescopic members are also disposed in a concentric manner with regard to a center of the top surface of the substrate support. Each of the number of telescopic members is defined to be independently moved in a substantially vertical direction so as to enable adjustment of an open volume above the top surface of the substrate support, and thereby enable adjustment of a plasma condition within the open volume above the top surface of the substrate support.02-03-2011
20110022215APPARATUS TO DETECT FAULT CONDITIONS OF A PLASMA PROCESSING REACTOR - A method of fault detection for use in a plasma processing chamber is provided. The method comprises monitoring plasma parameters within a plasma chamber and analyzing the resulting information. Such analysis enables detection of failures and the diagnosis of failure modes in a plasma processing reactor during the course of wafer processing. The method comprises measuring the plasma parameters as a function of time and analyzing the resulting data. The data can be observed, characterized, compared with reference data, digitized, processed, or analyzed in any way to reveal a specific fault. Monitoring can be done with a detector such as a probe, which is preferably maintained within the plasma chamber substantively coplanar with a surface within the chamber, and directly measures net ion flux and other plasma parameters. The detector is preferably positioned at a grounded surface within the reactor such as a grounded showerhead electrode, and can be of a planar ion flux probe (PIF) type or a non-capacitive type. Chamber faults that can be detected include a build-up of process by-products in the process chamber, a helium leak, a match re-tuning event, a poor stabilization rate, and a loss of plasma confinement. If the detector is a probe, the probe can be embedded in a part of a plasma processing chamber and can comprises one or more gas feed-through holes.01-27-2011
20110021030REDUCING TWISTING IN ULTRA-HIGH ASPECT RATIO DIELECTRIC ETCH - An apparatus for etching a dielectric layer contained by a substrate is provided. An etch reactor comprises a top electrode and a bottom electrode. An etch gas source supplies an etch gas into the etch reactor. A first Radio Frequency (RF) source generates a first RF power with a first frequency and supplies the first RF power into the etch reactor, whereas the first frequency is between 100 kilo Hertz (kHz) and 600 kHz. A second RF source generates a second RF power with a second frequency and supplies the second RF power into the etch reactor, whereas the second frequency is at least 10 mega Hertz (MHz).01-27-2011
20110021029PLASMA ETCH METHOD TO REDUCE MICRO-LOADING - A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.01-27-2011
20110014489Method for Strengthening Adhesion Between Dielectric Layers Formed Adjacent to Metal Layers - A method is provided which includes forming a metal layer and converting at least a portion of the metal layer to a hydrated metal oxide layer. Another method is provided which includes selectively depositing a dielectric layer upon another dielectric layer and selectively depositing a metal layer adjacent to the dielectric layer. Consequently, a microelectronic topography is formed which includes a metal feature and an adjacent dielectric portion comprising lower and upper layers of hydrophilic and hydrophobic material, respectively. A topography including a metal feature having a single layer with at least four elements lining a lower surface and sidewalls of the metal feature is also provided herein. The fluid/s used to form such a single layer may be analyzed by test equipment configured to measure the concentration of all four elements. In some cases, the composition of the fluid/s may be adjusted based upon the analysis.01-20-2011
20110007303OPTICAL SYSTEM AND METHODS FOR MONITORING EROSION OF ELECTROSTATIC CHUCK EDGE BEAD MATERIALS - A disclosed device comprises an edge bonding seal configured to be mounted to an edge bead of the electrostatic chuck. The edge bonding seal includes a monitoring layer comprised of a first material configured to emit a species capable of being optically monitored. The edge bonding seal further includes an edge bonding layer configured to be interspersed at least between the monitoring layer and the plasma environment. The edge bonding layer is comprised of a second material susceptible to erosion due to reaction with the plasma environment and configured to expose the monitoring layer to the plasma environment upon sufficient exposure to the plasma environment.01-13-2011
20110005601GAS TRANSPORT DELAY RESOLUTION FOR SHORT ETCH RECIPES - In one embodiment, an apparatus for providing a gas mixture of a plurality of gases, may have a plurality of mass flow controllers (MFCs), a mixing manifold in fluid connection with each plurality of MFCs, a plurality of mixing manifold exits positioned on the mixing manifold; and an isolation device in fluid connection with each of the plurality of mixing manifold exits.01-13-2011
20100331226Damage-Free High Efficiency Particle Removal Clean - A system, method and an apparatus to remove contaminants from a semiconductor substrate surface includes application of a cleaning material. The cleaning material includes a cleaning solution and a plurality of micron-sized dry polyvinyl particles dispersed in the cleaning solution. The cleaning solution is a single phase polymeric compound that is made of long polymeric chains and exhibits distinct viscoelastic properties. The plurality of micron-sized dry polyvinyl alcohol particles absorb the liquid in the cleaning solution and become uniformly suspended within the cleaning material. The suspended polyvinyl alcohol particles interact with at least some of contaminants on the semiconductor substrate surface to release and remove the contaminants from the substrate surface. The released contaminants are entrapped within the cleaning material and removed with the cleaning material leaving behind a substantially clean substrate surface.12-30-2010
20100327413HARDMASK OPEN AND ETCH PROFILE CONTROL WITH HARDMASK OPEN - A method for opening a carbon-based hardmask layer formed on an etch layer over a substrate is provided. The hardmask layer is disposed below a patterned mask. The substrate is placed in a plasma processing chamber. The hardmask layer is opened by flowing a hardmask opening gas including a COS component into the plasma chamber, forming a plasma from the hardmask opening gas, and stopping the flow of the hardmask opening gas. The hardmask layer may be made of amorphous carbon, or made of spun-on carbon, and the hardmask opening gas may further include O12-30-2010
20100327085Gas injection system for plasma processing - A plasma processing system for plasma processing of substrates such as semiconductor wafers. The system includes a plasma processing chamber, a substrate support for supporting a substrate within the processing chamber, a dielectric member having an interior surface facing the substrate support, the dielectric member forming a wall of the processing chamber, a gas injector fixed to, part of or removably mounted in an opening in the dielectric window, the gas injector including a plurality of gas outlets supplying process gas into the chamber, and an RF energy source such as a planar or non-planar spiral coil which inductively couples RF energy through the dielectric member and into the chamber to energize the process gas into a plasma state. The arrangement permits modification of gas delivery arrangements to meet the needs of a particular processing regime. In addition, compared to consumable showerhead arrangements, the use of a removably mounted gas injector can be replaced more easily and economically.12-30-2010
20100326554FLEXIBLE MANIFOLD FOR INTEGRATED GAS SYSTEM GAS PANELS - A flexible gas delivery apparatus having a gas panel with a first extension block having a first section and second section, the first section positioned between a mixing valve and the substrate having an exit port in fluid communication with a pump/purge manifold, and a second extension block having a first section and a second section, the first section positioned between a purge valve and the substrate having a discharge port in fluid communication with a mixing manifold, wherein the second portion of the first and second extension blocks extend outwardly from the gas panel.12-30-2010
20100323525CD BIAS LOADING CONTROL WITH ARC LAYER OPEN - A method for etching a line pattern in an etch layer disposed below an antireflective coating (ARC) layer below a patterned mask is provided. The method includes opening the ARC layer, in which an ARC opening gas comprising CF3I, a fluorocarbon (including hydrofluorocarbon) containing gas, and an oxygen containing gas are provided, a plasma is formed from the ARC opening gas to open the ARC layer, and providing the ARC opening gas is stopped. Line pattern features are etched into the etch layer through the opened ARC layer.12-23-2010
20100319813BARE ALUMINUM BAFFLES FOR RESIST STRIPPING CHAMBERS - Bare aluminum baffles are adapted for resist stripping chambers and include an outer aluminum oxide layer, which can be a native aluminum oxide layer or a layer formed by chemically treating a new or used bare aluminum baffle to form a thin outer aluminum oxide layer.12-23-2010
20100317556Two-Phase Substrate Cleaning Material - A cleaning compound is disclosed for removing particulate contaminants from a semiconductor substrate surface. The cleaning compound includes a liquid and carboxylic acid solid components dispersed in a substantially uniform manner in the liquid. A concentration of the carboxylic acid solid components in the liquid exceeds a solubility limit of the carboxylic acid solid components in the liquid. In one embodiment, a concentration of the carboxylic acid solid components in the liquid is within a range extending from about 3 percent by weight to about 5 percent by weight. In one embodiment, the carboxylic acid solid components are defined by a carbon number of at least four. The carboxylic acid solid components are defined to interact with the particulate contaminants on the semiconductor substrate surface to remove the particulate contaminants from the semiconductor substrate surface. The cleaning compound is viscous and may be formed as a gel.12-16-2010
20100313918Apparatus for Cleaning Contaminants from Substrate - A substrate holder is defined to support a substrate. A rotating mechanism is defined to rotate the substrate holder. An applicator is defined to extend over the substrate holder to dispense a cleaning material onto a surface of the substrate when present on the substrate holder. The applicator is defined to apply a downward force to the cleaning material on the surface of the substrate. In one embodiment the cleaning material is gelatinous.12-16-2010
20100309604Method and Apparatus for Chuck Thermal Calibration - Wafer temperature is measured as a function of time following removal of a heat source to which the wafer is exposed. During the wafer temperature measurements, a gas is supplied at a substantially constant pressure at an interface between the wafer and a chuck upon which the wafer is supported. A chuck thermal characterization parameter value corresponding to the applied gas pressure is determined from the measured wafer temperature as a function of time. Wafer temperatures are measured for a number of applied gas pressures to generate a set of chuck thermal characterization parameter values as a function of gas pressure. A thermal calibration curve for the chuck is generated from the set of measured chuck thermal characterization parameter values and the corresponding gas pressures. The thermal calibration curve for the chuck can be used to tune the gas pressure to obtain a particular wafer temperature during a fabrication process.12-09-2010
20100308018EDM ELECTRODE GUIDE - In accordance with one embodiment of the present disclosure, an electrical discharge machine is provided comprising an EDM electrode, an electrode holder, and an electrode guide. The electrode guide comprises an internal passage profile that transitions along the machining axis from a substantially circular cross section comprising a diameter d2 to an apexed cross section. The EDM electrode extends from the electrode holder through the electrode entrance aperture of the electrode guide and out of the electrode exit aperture of the electrode guide. The apexed cross section of the electrode guide is aligned relative to the circular cross section of the electrode guide such that apexes of the electrode exit aperture lie outside of a circumferential portion of the circular cross section. A restricted circumferential portion defined by the apexed cross section comprises a diameter that is greater than the effective electrode diameter. Additional embodiments are disclosed and claimed.12-09-2010
20100304562ELECTROLESS DEPOSITION OF COBALT ALLOYS - Systems and methods for electroless deposition of a cobalt-alloy layer on a copper surface include a solution characterized by a low pH. This solution may include, for example, a cobalt(II) salt, a complexing agent including at least two amine groups, a pH adjuster configured to adjust the pH to below 7.0, and a reducing agent. In some embodiments, the cobalt-alloy is configured to facilitate bonding and copper diffusion characteristics between the copper surface and a dielectric in an integrated circuit.12-02-2010
20100288311Multi-Stage Substrate Cleaning Method and Apparatus - A first application of a cleaning material is made to a surface of a substrate. The cleaning material includes one or more viscoelastic materials for entrapping contaminants present on the surface of the substrate. A first application of a rinsing fluid is made to the surface of the substrate so as to rinse the cleaning material from the surface of the substrate. The first application of the rinsing fluid is also performed to leave a residual thin film of the rinsing fluid on the surface of the substrate. A second application of the cleaning material is made to the surface of the substrate having the residual thin film of rinsing fluid present thereon. A second application of the rinsing fluid is then made to the surface of the substrate so as to rinse the cleaning material from the surface of the substrate.11-18-2010
20100285671STRIP WITH REDUCED LOW-K DIELECTRIC DAMAGE - A method for forming etched features in a low-k dielectric layer disposed below the photoresist mask in a plasma processing chamber is provided. Features are etched into the low-k dielectric layer through the photoresist mask. The photoresist mask is stripped, wherein the stripping comprising at least one cycle, wherein each cycle comprises a fluorocarbon stripping phase, comprising flowing a fluorocarbon stripping gas into the plasma processing chamber, forming a plasma from the fluorocarbon stripping gas, and stopping the flow of the fluorocarbon stripping gas into the plasma processing chamber and a reduced fluorocarbon stripping phase, comprising flowing a reduced fluorocarbon stripping gas that has a lower fluorocarbon flow rate than the fluorocarbon stripping gas into the plasma processing chamber, forming the plasma from the reduced fluorocarbon stripping gas, and stopping the flow of the reduced fluorocarbon stripping gas.11-11-2010
20100285664COMPOSITION AND METHODS FOR FORMING METAL FILMS ON SEMICONDUCTOR SUBSTRATES USING SUPERCRITICAL SOLVENTS - Compositions and methods for forming metal films on semiconductor substrates are disclosed. One of the disclosed methods comprises: heating the semiconductor substrate to obtain a heated semiconductor substrate; exposing the heated semiconductor substrate to a composition containing at least one metal precursor comprising at least one ligand, an excess amount of neutral labile ligands, a supercritical solvent, and optionally at least one source of B, C, N, Si, P, and mixtures thereof; exposing the composition to a reducing agent and/or thermal energy at or near the heated semiconductor substrate; disassociating the at least one ligand from the metal precursor; and forming the metal film while minimizing formation of metal oxides.11-11-2010
20100283482NON-DESTRUCTIVE SIGNAL PROPAGATION SYSTEM AND METHOD TO DETERMINE SUBSTRATE INTEGRITY - In various exemplary embodiments described herein, a system and associated method relate to non-destructive signal propagation to detect one or more defects in a substrate. The system can be built into a semiconductor process tool such as a substrate handling mechanism. The system comprises a transducer configured to convert one or more frequencies from an electrical signal into at least one mechanical pulse. The mechanical pulse is coupled to the substrate through the substrate handling mechanism. A plurality of sensors is positioned distal to the transducer and configured to be coupled, acoustically or mechanically, to the substrate. The plurality of distal sensors is further configured to detect both the mechanical pulse and any distortions to the pulse. A signal analyzer is coupled to the plurality of distal sensors to compare the detected pulse and any distortions to the pulse with a baseline response.11-11-2010
20100279071Systems and Methods Affecting Profiles of Solutions Dispensed Across Microelectronic Topographies During Electroless Plating Processes - A method is provided which includes dispensing a deposition solution at a plurality of locations extending different distances from a center of a microelectronic topography each at different moments in time during an electroless plating process. An electroless plating apparatus used for the method includes a substrate holder, a movable dispense arm, and a storage medium comprising program instructions executable by a processor for positioning the movable dispense arm. Another method and accompanying electroless deposition chamber are configured to introduce a gas into an electroless plating chamber above a plate which is suspended above a microelectronic topography and distribute the gas to regions extending above one or more discrete portions of the microelectronic topography. An exemplary microelectronic topography resulting from the aforementioned methods and apparatuses includes a layer having distinct regions each including a comparatively different thickness and comparatively different concentrations of one of the one or more elements.11-04-2010
20100279002Systems and Methods Affecting Profiles of Solutions Dispensed Across Microelectronic Topographies During Electroless Plating Processes - A method is provided which includes dispensing a deposition solution at a plurality of locations extending different distances from a center of a microelectronic topography each at different moments in time during an electroless plating process. An electroless plating apparatus used for the method includes a substrate holder, a moveable dispense arm, and a storage medium comprising program instructions executable by a processor for positioning the moveable dispense arm. Another method and accompanying electroless deposition chamber are configured to introduce a gas into an electroless plating chamber above a plate which is suspended above a microelectronic topography and distribute the gas to regions extending above one or more discrete portions of the microelectronic topography. An exemplary microelectronic topography resulting from the aforementioned methods and apparatuses includes a layer having distinct regions each including a comparatively different thickness and comparatively different concentrations of one of the one or more elements.11-04-2010
20100273332METHOD AND APPARATUS FOR HIGH ASPECT RATIO DIELECTRIC ETCH - An apparatus for etching high aspect ratio features is provided. A plasma processing chamber is provided, comprising a chamber wall forming a plasma processing chamber enclosure, a lower electrode, an upper electrode, a gas inlet, and a gas outlet. A high frequency radio frequency (RF) power source is electrically connected to at least one of the upper electrode or lower electrode. A bias power system is electrically connected to both the upper electrode and the lower electrode, wherein the bias power system is able to provide a bias to the upper and lower electrodes with a magnitude of at least 500 volts, and wherein the bias to the lower electrode is pulsed to intermittently. A gas source is in fluid connection with the gas inlet. A controller is controllably connected to the gas source, the high frequency RF power source, and the bias power system.10-28-2010
20100269285APPARATUS AND SYSTEM FOR CLEANING SUBSTRATE - An upper processing head includes a topside module defined to apply a cleaning material to a top surface of a substrate and then expose the substrate to a topside rinsing meniscus. The topside module is defined to flow a rinsing material through the topside rinsing meniscus in a substantially unidirectional manner towards the cleaning material and opposite a direction of movement of the substrate. A lower processing head includes a bottomside module defined to apply a bottomside rinsing meniscus to the substrate so as to balance a force applied to the substrate by the topside rinsing meniscus. The bottomside module is defined to provide a drain channel for collecting and draining the cleaning material dispensed from the upper processing head when the substrate is not present between the upper and lower processing heads. The upper and lower processing heads can include multiple instantiations of the topside and bottomside modules, respectively.10-28-2010
20100261354GASKET WITH POSITIONING FEATURE FOR CLAMPED MONOLITHIC SHOWERHEAD ELECTRODE - An electrode assembly for a plasma reaction chamber used in semiconductor substrate processing. The assembly includes an upper showerhead electrode which is mechanically attached to a backing plate by a series of spaced apart cam locks. A thermally and electrically conductive gasket with projections thereon is compressed between the showerhead electrode and the backing plate at a location three to four inches from the center of the showerhead electrode. A guard ring surrounds the backing plate and is movable to positions at which openings in the guard ring align with openings in the backing plate so that the cam locks can be rotated with a tool to release locking pins extending from the upper face of the electrode.10-14-2010
20100261352METHOD FOR LOW-K DIELECTRIC ETCH WITH REDUCED DAMAGE - A method for etching features in a low-k dielectric layer disposed below an organic mask is provided by an embodiment of the invention. Features are etched into the low-k dielectric layer through the organic mask. A fluorocarbon layer is deposited on the low-k dielectric layer. The fluorocarbon layer is cured. The organic mask is stripped.10-14-2010
20100248490METHOD AND APPARATUS FOR REDUCTION OF VOLTAGE POTENTIAL SPIKE DURING DECHUCKING - Provided is a substrate dechucking system of a plasma processing chamber adapted to remove a substrate from an ESC with reduction in voltage potential spike during dechucking of the substrate.09-30-2010
20100248485METHOD FOR DIELECTRIC MATERIAL REMOVAL BETWEEN CONDUCTIVE LINES - A method of removing carbon doped silicon oxide between metal contacts is provided. A layer of the carbon doped silicon oxide is converted to a layer of silicon oxide by removing the carbon dopant. The converted layer of silicon oxide is selectively wet etched with respect to the carbon doped silicon oxide and the metal contacts, which forms recess between the metal contacts.09-30-2010
20100243164REPLACEABLE UPPER CHAMBER SECTION OF PLASMA PROCESSING APPARATUS - A replaceable upper chamber section of a plasma reaction chamber in which semiconductor substrates can be processed comprises a monolithic metal cylinder having a conical inner surface which is widest at an upper end thereof, an upper flange extending horizontally outward away from the conical inner surface and a lower flange extending horizontally away from the conical inner surface. The cylinder includes an upper annular vacuum sealing surface adapted to seal against a dielectric window of the plasma chamber and a lower annular vacuum sealing surface adapted to seal against a bottom section of the plasma chamber. A thermal mass at an upper portion of the cylinder is defined by a portion of the cylinder between the conical inner surface and an outer surface extending vertically from the upper flange, the thermal mass being effective to provide azimuthal temperature uniformity of the conical inner surface. A thermal choke is located at a lower portion of the cylinder and is effective to minimize transfer of heat across the lower vacuum sealing surface. The thermal choke is defined by a thin metal section having a thickness of less than 0.25 inch and extending at least 25% of the length of the conical inner surface.09-30-2010
20100230243Wafer Carrier Drive Apparatus and Method for Operating the Same - A drive rail includes a sealed interior cavity and an exterior drive surface that extends along a length of the drive rail. A first magnetic member is disposed within the interior cavity and adjacent to a surface of the interior cavity that is immediately opposite the exterior drive surface. A drive mechanism is disposed within the interior cavity and in connection with the first magnetic member, and is configured to move the first magnetic member within the interior cavity along the length of the drive rail, such that the first magnetic member remains immediately opposite the exterior drive surface. The first magnetic member is configured to magnetically couple through the exterior drive surface to a wafer carrier disposed adjacent to the exterior drive surface. Movement of the first magnetic member within the interior cavity along the drive rail causes corresponding movement of the wafer carrier along the exterior drive surface.09-16-2010
20100211903User Interface for Wafer Data Analysis and Visualization - A wafer viewer system is provided for graphical presentation and analysis of a wafer and a wafer series. More specifically, the wafer viewer system includes a graphical user interface for displaying a wafer, graphically selecting regions of the wafer for analysis, performing analysis on the selected regions of the wafer, and displaying results of the analysis.08-19-2010
20100184298Composite showerhead electrode assembly for a plasma processing apparatus - A showerhead electrode for a plasma processing apparatus includes an interface gel between facing surfaces of an electrode plate and a backing plate. The interface gel maintains thermal conductivity during lateral displacements generated during temperature cycling due to mismatch in coefficients of thermal expansion. The interface gel comprises, for example, a silicone based composite filled with aluminum oxide microspheres. The interface gel can conform to irregularly shaped features and maximize surface contact area between mating surfaces. The interface gel can be pre-applied to a consumable upper electrode.07-22-2010
20100178774PLASMA CONFINEMENT RINGS INCLUDING RF ABSORBING MATERIAL FOR REDUCING POLYMER DEPOSITION - Plasma confinement rings are adapted to reach sufficiently high temperatures on plasma-exposed surfaces of the rings to substantially reduce polymer deposition on those surfaces. The plasma confinement rings include an RF lossy material effective to enhance heating at portions of the rings. A low-emissivity material can be provided on a portion of the plasma confinement ring assembly to enhance heating effects.07-15-2010
20100178769SPACER FORMATION FOR ARRAY DOUBLE PATTERNING - A method for forming an array area with a surrounding periphery area, wherein a substrate is disposed under an etch layer, which is disposed under a patterned organic mask defining the array area and covers the entire periphery area is provided. The patterned organic mask is trimmed. An inorganic layer is deposited over the patterned organic mask where a thickness of the inorganic layer over the covered periphery area of the organic mask is greater than a thickness of the inorganic layer over the array area of the organic mask. The inorganic layer is etched back to expose the organic mask and form inorganic spacers in the array area, while leaving the organic mask in the periphery area unexposed. The organic mask exposed in the array area is stripped, while leaving the inorganic spacers in place and protecting the organic mask in the periphery area.07-15-2010
20100175830LOW-K DAMAGE AVOIDANCE DURING BEVEL ETCH PROCESSING - A method for etching a bevel edge of a substrate is provided. A patterned photoresist mask is formed over the etch layer. The bevel edge is cleaned comprising providing a cleaning gas comprising at least one of a CO07-15-2010
20100173496PROFILE AND CD UNIFORMITY CONTROL BY PLASMA OXIDATION TREATMENT - A method of forming spacers from a non-silicon oxide, silicon containing spacer layer with horizontal surfaces and sidewall surfaces over a substrate is provided. A plasma oxidation treatment is provided to form a silicon oxide coating over the spacer layer, wherein the silicon oxide coating provides a horizontal coating on the horizontal surfaces and sidewall coatings on the sidewall surfaces of the spacer layer. An anisotropic main etch that selectively etches horizontal surfaces of the spacer layer and silicon oxide coating with respect to sidewall surfaces of the spacer layer and the sidewall coatings of the silicon oxide coating is provided. The spacer layer is etched, wherein the sidewall coatings of the silicon oxide coating protect sidewall surfaces of the spacer layer.07-08-2010
20100170803Method and Apparatus for Plating Semiconductor Wafers - First and second electrodes are disposed at first and second locations, respectively, proximate to a periphery of a wafer support, wherein the first and second location are substantially opposed to each other relative to the wafer support. Each of the first and second electrodes can be moved to electrically connect with and disconnect from a wafer held by the wafer support. An anode is disposed over and proximate to the wafer such that a meniscus of electroplating solution is maintained between the anode and the wafer. As the anode moves over the wafer from the first location to the second location, an electric current is applied through the meniscus between the anode and the wafer. Also, as the anode is moved over the wafer, the first and second electrodes are controlled to connect with the wafer while ensuring that the anode does not pass over an electrode that is connected.07-08-2010
20100170539Reduction of Entrance and Exit Marks Left by a Substrate-Processing Meniscus - A proximity head for generating and maintaining a meniscus for processing a substrate is described. The proximity head includes a plurality of meniscus nozzles formed on a face of the proximity head, the nozzles being configured to supply liquid to the meniscus, a plurality of vacuum ports formed on the face of the proximity head, the vacuum ports being arranged to completely surround the plurality of meniscus nozzles, and a plurality of gas nozzles formed on the face of the proximity head, the gas nozzles at least partially surrounding the vacuum ports. The proximity head further includes means for reducing a size and frequency of entrance and/or exit marks at a leading edge and a trailing edge on the substrate by aiding and encouraging liquid from the meniscus to evacuate a gap between the substrate and the carrier.07-08-2010
20100159707GAS DISTRIBUTION SYSTEM HAVING FAST GAS SWITCHING CAPABILITIES - A gas distribution system for supplying different gas compositions to a chamber, such as a plasma processing chamber of a plasma processing apparatus is provided. The gas distribution system can include a gas supply section, a flow control section and a switching section. The gas supply section provides first and second gases, typically gas mixtures, to the flow control section, which controls the flows of the first and second gases to the chamber. The chamber can include multiple zones, and the flow control section can supply the first and second gases to the multiple zones at desired flow ratios of the gases. The gas distribution system can continuously supply the first and second gases to the switching section and the switching section is operable to switch the flows of the first and second gases, such that one of the first and second process gases is supplied to the chamber while the other of the first and second gases is supplied to a by-pass line, and then to switch the gas flows. The switching section preferably includes fast switching valves operable to quickly open and close to allow fast switching of the first and second gases, preferably without the occurrence of undesirable pressure surges or flow instabilities in the flow of either gas.06-24-2010
20100151687APPARATUS INCLUDING SHOWERHEAD ELECTRODE AND HEATER FOR PLASMA PROCESSING - A plasma processing apparatus includes a heater in thermal contact with a showerhead electrode, and a temperature controlled top plate in thermal contact with the heater to maintain a desired temperature of the showerhead electrode during semiconductor substrate processing. A gas distribution member supplies a process gas and radio frequency (RF) power to the showerhead electrode.06-17-2010
20100151686HIGH PRESSURE BEVEL ETCH PROCESS - A method of preventing arcing during bevel edge etching a semiconductor substrate with a plasma in a bevel etcher in which the semiconductor substrate is supported on a semiconductor substrate support comprises bevel edge etching the semiconductor substrate with the plasma in the bevel etcher while evacuating the bevel etcher to a pressure of 3 to 100 Torr while maintaining RF voltage seen at the wafer at a low enough value to avoid arcing.06-17-2010
20100150695Method and System for Centering Wafer on Chuck - A wafer handling mechanism is operated to place a wafer on a chuck. A chucking force is then applied to the wafer, whereby wafer support features of the chuck transfer a defect pattern onto a surface of the wafer. The surface of the wafer is analyzed by a defect metrology tool to obtain a mapping of the defect pattern transferred onto the surface of the wafer. A center coordinate of the chuck within a coordinate system of the wafer is determined by analyzing the defect pattern as transferred to the surface of the wafer. A spatial offset between the center coordinate of the chuck and the center of the wafer is determined. The spatial offset is used to adjust the wafer handling mechanism so as to enable alignment of the center of the wafer to the center coordinate of the chuck.06-17-2010
20100148317CRITICAL DIMENSION REDUCTION AND ROUGHNESS CONTROL - A method for forming a feature in an etch layer is provided. A photoresist layer is formed over the etch layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls. A control layer is formed over the photoresist layer and bottoms of the photoresist features. A conformal layer is deposited over the sidewalls of the photoresist features and control layer to reduce the critical dimensions of the photoresist features. Openings in the control layer are opened with a control layer breakthrough chemistry. Features are etched into the etch layer with an etch chemistry, which is different from the control layer break through chemistry, wherein the control layer is more etch resistant to the etch with the etch chemistry than the conformal layer.06-17-2010
20100144246PLATEN AND ADAPTER ASSEMBLIES FOR FACILITATING SILICON ELECTRODE POLISHING - A process is provided for polishing a silicon electrode utilizing a polishing turntable and a dual function electrode platen. The dual function electrode platen is secured to the polishing turntable and comprises a plurality of electrode mounts arranged to project from an electrode engaging face of the dual function electrode platen. The electrode mounts complement respective positions of mount receptacles formed in a platen engaging face of the silicon electrode to be polished. The electrode mounts and the mount receptacles are configured to permit non-destructive engagement and disengagement of the electrode engaging face of the electrode platen and the platen engaging face of the silicon electrode. The dual function electrode platen further comprises platen adapter abutments positioned radially inward of the electrode mounts. The platen adapter abutments are configured to bring a platen adapter into approximate alignment with the rotary polishing axis. The silicon electrode is polished by (i) engaging the electrode engaging face of the electrode platen and the platen engaging face of the silicon electrode via the electrode mounts and mount receptacles, (ii) utilizing the polishing turntable to impart rotary motion to the engaged silicon electrode, and (iii) contacting an exposed face of the silicon electrode with a polishing surface as the silicon electrode rotates about the rotary polishing axis. Additional embodiments are contemplated, disclosed and claimed.06-10-2010
20100139692IMMERSIVE OXIDATION AND ETCHING PROCESS FOR CLEANING SILICON ELECTRODES - A process for cleaning a silicon electrode is provided where the silicon electrode is soaked in an agitated aqueous detergent solution and rinsed with water following removal from the aqueous detergent solution. The rinsed silicon electrode is then soaked in an agitated isopropyl alcohol (IPA) solution and rinsed. The silicon electrode is then subjected to an ultrasonic cleaning operation in water following removal from the IPA solution. Contaminants are then removed from the silicon electrode by soaking the silicon electrode in an agitated mixed acid solution comprising hydrofluoric acid, nitric acid, acetic acid, and water. The silicon electrode is subjected to an additional ultrasonic cleaning operation following removal from the mixed acid solution and is subsequently rinsed and dried. In other embodiments of the present disclosure, it is contemplated that the silicon electrode can be soaked in either the agitated aqueous detergent solution, the agitated isopropyl alcohol (IPA) solution, or both. Additional embodiments are contemplated, disclosed, and claimed.06-10-2010
20100136788THERMAL METHODS FOR CLEANING POST-CMP WAFERS - Methods for cleaning semiconductor wafers following chemical mechanical polishing are provided. An exemplary method exposes a wafer to a thermal treatment in an oxidizing environment followed by a thermal treatment in a reducing environment. The thermal treatment in the oxidizing environment both removes residues and oxidizes exposed copper surfaces to form a cupric oxide layer. The thermal treatment in the reducing environment then reduces the cupric oxide to elemental copper. This leaves the exposed copper clean and in condition for further processing, such as electroless plating.06-03-2010
20100132889ULTRA-HIGH ASPECT RATIO DIELECTRIC ETCH - A method for etching an ultra high aspect ratio feature in a dielectric layer through a carbon based mask is provided. The dielectric layer is selectively etched with respect to the carbon based mask, wherein the selective etching provides a net deposition of a fluorocarbon based polymer on the carbon based mask. The selective etch is stopped. The fluorocarbon polymer is selectively removed with respect to the carbon based mask, so that the carbon based mask remains, using a trimming. The selectively removing the fluorocarbon polymer is stopped. The dielectric layer is again selectively etched with respect to the carbon based mask, wherein the second selectively etching provides a net deposition of a fluorocarbon based polymer on the carbon based mask.06-03-2010
20100126847Apparatus and Method for Controlling Plasma Density Profile - A number of RF power transmission paths are defined to extend from an RF power source through a matching network, through a transmit electrode, through a plasma to a number of return electrodes. A number of tuning elements are respectively disposed within the number of RF power transmission paths. Each tuning element is defined to adjust an amount of RF power to be transmitted through the RF power transmission path within which the tuning element is disposed. A plasma density within a vicinity of a particular RF power transmission path is directly proportional to the amount of RF power transmitted through the particular RF power transmission path. Therefore, adjustment of RF power transmitted through the RF power transmission paths, as afforded by the tuning element, enables control of a plasma density profile across a substrate.05-27-2010
20100124822APPARATUSES FOR ADJUSTING ELECTRODE GAP IN CAPACITIVELY-COUPLED RF PLASMA REACTOR - A plasma processing chamber includes a cantilever assembly configured to neutralize atmospheric load. The chamber includes a wall surrounding an interior region and having an opening formed therein. A cantilever assembly includes a substrate support for supporting a substrate within the chamber. The cantilever assembly extends through the opening such that a portion is located outside the chamber. The chamber includes an actuation mechanism operative to move the cantilever assembly relative to the wall.05-20-2010
20100120647COMPOSITION OF A CLEANING MATERIAL FOR PARTICLE REMOVAL - The embodiments of the present invention provide improved materials for cleaning patterned substrates with fine features. The cleaning materials have advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning materials are fluid, either in liquid phase, or in liquid/gas phase, and deform around device features; therefore, the cleaning materials do not substantially damage the device features or reduce damage all together. To assist removing of particles from the wafer (or substrate) surfaces, the polymeric compound of the polymers can contain a polar functional group, which can establish polar-polar molecular interaction and hydrogen bonds with hydrolyzed particles on the wafer surface. The polymers of a polymeric compound(s) with a large molecular weight form long polymer chains and network. The long polymer chains and/or polymer network show superior capabilities of capturing and entrapping contaminants, in comparison to conventional cleaning materials. The polymeric compound(s) of the polymers may also include a functional group that carries charge in the cleaning solution. The charge of the functional group of the polymers improves the particle removal efficiency.05-13-2010
20100116788Substrate temperature control by using liquid controlled multizone substrate support - A substrate support useful in a reaction chamber of a plasma processing apparatus is provided. The substrate support comprises a base member and a heat transfer member overlying the base member. The heat transfer member has multiple zones to individually heat and cool each zone of the heat transfer member. An electrostatic chuck overlies the heat transfer member. The electrostatic chuck has a support surface for supporting a substrate in a reaction chamber of the plasma processing apparatus. A source of cold liquid and a source of hot liquid are in fluid communication with flow passages in each zone. A valve arrangement is operable to independently control temperature of the liquid by adjusting a mixing ratio of the hot liquid to the cold liquid circulating in the flow passages. In another embodiment, heating elements along a supply line and transfer lines heat a liquid from a liquid source before circulating in the flow passages.05-13-2010
20100116290COMPOSITION AND APPLICATION OF A TWO-PHASE CONTAMINANT REMOVAL MEDIUM - The embodiments provide substrate cleaning techniques to remove contaminants from the substrate surface to improve device yield. The substrate cleaning techniques utilize a cleaning material with solid components and polymers with a large molecular weight dispersed in a cleaning liquid to form the cleaning material, which is fluidic. The solid components remove contaminants on the substrate surface by making contact with the contaminants. The polymers with large molecular weight form polymer chains and a polymeric network that capture and entrap solids in the cleaning materials, which prevent solids from falling on the substrate surface. In addition, the polymers can also assist in removing contaminants form the substrate surface by making contacts with contaminants on the substrate surface. In one embodiment, the cleaning material glides around protruding features on the substrate surface without making a forceful impact on the protruding features to damage them. The present invention can be implemented in numerous ways, including a material (or solution), a method, a process, an apparatus, or a system.05-13-2010
20100111651Tactile Wafer Lifter and Methods for Operating the Same - A tactile wafer lifting apparatus includes a pedestal and a vertical drive connected to the pedestal. The vertical drive is defined to provide controlled upward and downward movement of the pedestal. The tactile wafer lifting apparatus also includes a wafer support member disposed over the pedestal. A tactile switch is disposed between the wafer support member and the pedestal such that sufficient downward force on the wafer support member causes activation of the tactile switch. The tactile switch is connected to the vertical drive so as to interrupt upward movement of the pedestal and wafer support member disposed thereover upon activation of the tactile switch.05-06-2010
20100108264BI-LAYER, TRI-LAYER MASK CD CONTROL - A method for controlling critical dimension (CD) of etch features in an etch layer disposed below a functionalized organic mask layer disposed below an intermediate mask layer, disposed below a patterned photoresist mask, which forms a stack is provided. The intermediate mask layer is opened by selectively etching the intermediate mask layer with respect to the patterned photoresist mask. The functionalized organic mask layer is opened. The functionalized organic mask layer opening comprises flowing an open gas comprising COS, forming a plasma, and stopping the flowing of the open gas. The etch layer is etched.05-06-2010
20100108261LOWER ELECTRODE ASSEMBLY OF PLASMA PROCESSING CHAMBER - A lower electrode assembly for use in a plasma processing chamber comprises a metal base and upper and lower edge rings. The metal base comprises metal plates brazed together and forming a brazed line on a lower side surface of the base, an edge ring support surface extending horizontally inwardly from the lower side surface and an upper side surface above the edge ring support surface. The upper edge ring comprises a lower surface mounted on the edge ring support surface and the lower edge ring surrounds the lower side surface of the base with a gap between opposed surfaces of the upper and lower edge rings and between the lower edge ring and the outer periphery of the base. The gap has an aspect ratio of total gap length to average gap width sufficient to impede arcing at the location of the braze line.05-06-2010
20100105209SILICON ETCH WITH PASSIVATION USING PLASMA ENHANCED OXIDATION - A method and apparatus for etching a silicon layer through a patterned mask formed thereon are provided. The silicon layer is placed in an etch chamber. An etch gas comprising a fluorine containing gas and an oxygen and hydrogen containing gas is provided into the etch chamber. A plasma is generated from the etch gas and features are etched into the silicon layer using the plasma. The etch gas is then stopped. The plasma may contain OH radicals.04-29-2010
20100105208SILICON ETCH WITH PASSIVATION USING CHEMICAL VAPOR DEPOSITION - A silicon layer is etched through a patterned mask formed thereon using an etch chamber. A fluorine (F) containing etch gas and a silicon (Si) containing chemical vapor deposition gas are provided in the etch chamber. The fluorine (F) containing etch gas is used to etch features into the silicon layer, and the silicon (Si) containing chemical vapor deposition gas is used to form a silicon-containing deposition layer on sidewalls of the features. A plasma is generated from the etch gas and the chemical vapor deposition gas, and a bias voltage is provided. Features are etched into the silicon layer using the plasma, and a silicon-containing passivation layer is deposited on the sidewalls of the features which are being etched. Silicon in the passivation layer primarily comes from the chemical vapor deposition gas. The etch gas and the chemical vapor deposition gas are then stopped.04-29-2010
20100101603METHOD AND APPARATUS FOR REMOVING PHOTORESIST - A method and apparatus remove photoresist from a wafer. A process gas containing sulfur (S), oxygen (O), and hydrogen (H) is provided, and a plasma is generated from the process gas in a first chamber. A radical-rich ion-poor reaction medium is flown from the first chamber to a second chamber where the wafer is placed. The patterned photoresist layer on the wafer is removed using the reaction medium, and then the reaction medium flowing into the second chamber is stopped. Water vapor may be introduced in a salvation zone provided in a passage of the reaction medium flowing down from the plasma such that the water vapor solvates the reaction medium to form solvated clusters of species before the reaction medium reaches the wafer. The photoresist is removed using the solvated reaction medium.04-29-2010
20100093115ETCH TOOL PROCESS INDICATOR METHOD AND APPARATUS - A method for providing a process indicator for an etching chamber is provided. A wafer with a blanket etch layer is provided into the etching chamber. A blanket etch is performed on the blanket etch layer. A blanket deposition layer is deposited over the blanket etch layer after performing the blanket etch has been completed. A thickness of the blanket etch layer and a thickness of the blanket deposition layer is measured. The measured thicknesses are used to determine a process indicator.04-15-2010
20100089876EDM SPINDLE ASSEMBLY WITH FLUID SEAL - An EDM spindle assembly is provided comprising a pull stud, an electrode holder, a fluid seal, and a seal holder. The electrode holder comprises a tail end, a nose end, and an electrode accommodating passage. A counter bore comprising a threaded inside diameter is formed in the tail end of the electrode holder. The seal holder comprises a threaded outside diameter, a tail end, a nose end, and an electrode accommodating passage. The seal accommodating space is formed in the tail end of the seal holder. The threaded outside diameter of the seal holder is suitable for threaded engagement with the threaded inside diameter of the counter bore. The pull stud comprises a threaded outside diameter, a tail end, a nose end, and an electrode accommodating passage. The threaded outside diameter of the pull stud is suitable for threaded engagement with the threaded inside diameter of the counter bore. The threaded inside diameter of the counter bore in the electrode holder comprises a longitudinal threading dimension that is sufficient to accommodate the entire longitudinal threaded outside diameter of the seal holder and a significant portion of the longitudinal threaded outside diameter of the pull stud, with the fluid seal positioned in the seal accommodating space.04-15-2010
20100085679METHOD FOR USING AN RC CIRCUIT TO MODEL TRAPPED CHARGE IN AN ELECTROSTATIC CHUCK - A method for simulating the effect of trapped charge in an electrostatic chuck on the chuck performance comprises creating a trapped-charge electrical model having a trapped-charge capacitor and a gap-trapped resistor, and coupling the model to a plurality of voltage sources. The trapped-charge capacitor and the gap-trapped resistor may be varied in relation to a plurality of electrostatic chuck physical parameters.04-08-2010
20100079152Methods for Measuring Dielectric Properties of Parts - A method is disclosed for calibrating a capacitance of an apparatus for measuring dielectric properties of a part. The apparatus includes an electrically grounded chamber, a lower electrode disposed within the chamber and connected to a radiofrequency (RF) transmission rod, an electrically grounded upper electrode disposed within the chamber above the lower electrode, and a variable capacitor connected to control transmission of RF power through the RF transmission rod to the lower electrode. A method is also disclosed for determining a capacitance of a part through use of the apparatus. A method is also disclosed for determining a dielectric constant of a part through use of the apparatus. A method is also disclosed for determining a loss tangent of a part through use of the apparatus.04-01-2010
20100078899ADJUSTABLE THERMAL CONTACT BETWEEN AN ELECTROSTATIC CHUCK AND A HOT EDGE RING BY CLOCKING A COUPLING RING - A clockable device for use with an electrostatic chuck configured to hold a substrate in a plasma environment is disclosed. The clockable device comprises a first portion of the electrostatic chuck having at least one face with variable thermal contact areas located thereon. A second portion of the electrostatic chuck has at least one face with variable thermal contact areas located thereon. The at least one face of the second portion is configured to be placed in thermal contact with the at least one face of the first portion to control a thermal gradient across a face of the substrate.04-01-2010
20100071726METHOD AND SYSTEM OF DRYING A MICROELECTRONIC TOPOGRAPHY - Drying a microelectronic topography. At least some of the illustrative embodiments are methods that include placing a microelectronic topography inside a process chamber, providing a non-aqueous liquid to the process chamber until at least 90% of the volume of the process chamber contains the non-aqueous liquid, pressurizing the process chamber by way of a fluid different than the non-aqueous liquid, ceasing activity with respect to the process chamber until the non-aqueous liquid and fluid form a mixture that is substantially homogenous, venting the process chamber while simultaneously providing the fluid to the process chamber, and venting the process chamber in a manner which prevents formation of liquid in the process chamber.03-25-2010
20100068885SIDEWALL FORMING PROCESSES - An etch layer underlying a patterned photoresist mask is provided. A plurality of sidewall forming processes are performed. Each sidewall forming process comprises depositing a protective layer on the patterned photoresist mask by performing multiple cyclical depositions. Each cyclical deposition involves at least a depositing phase for depositing a deposition layer over surfaces of the patterned photoresist mask and a profile shaping phase for shaping vertical surfaces in the deposition layer. Each sidewall forming process further comprises a breakthrough etch for selectively etching horizontal surfaces of the protective layer with respect to vertical surfaces of the protective layer. Afterwards, the etch layer is etched to form a feature having a critical dimension that is less than the critical dimension of the features in the patterned photoresist mask.03-18-2010
20100065214SHOWERHEAD ELECTRODE ASSEMBLY FOR PLASMA PROCESSING APPARATUSES - A showerhead electrode assembly of a plasma processing apparatus includes a thermal control plate attached to a showerhead electrode, and a top plate attached to the thermal control plate. At least one thermal bridge is provided between opposed surfaces of the thermal control plate and the top plate to allow electrical and thermal conduction between the thermal control plate and top plate. A lubricating material between the thermal bridge and the top plate minimizes galling of opposed metal surfaces due to differential thermal expansion between the top plate and thermal control plate. A heater supported by the thermal control plate cooperates with the temperature controlled top plate to maintain the showerhead electrode at a desired temperature.03-18-2010
20100059088Method and Apparatus for Removing Contamination from Substrate - A cleaning material is disposed over a substrate. The cleaning material includes solid components dispersed within a liquid medium. A force is applied to the solid components within the liquid medium to bring the solid components within proximity to contaminants present on the substrate. The force applied to the solid components can be exerted by an immiscible component within the liquid medium. When the solid components are brought within sufficient proximity to the contaminants, an interaction is established between the solid components and the contaminants. Then, the solid components are moved away from the substrate such that the contaminants having interacted with the solid components are removed from the substrate.03-11-2010
20100055300Methods and Apparatus Configurations for Affecting Movement of Fluids Within a Microelectronic Topography Processing Chamber and a Method for Passivating Hardware Within a Microelectronic Topography Processing Chamber - An apparatus for processing microelectronic topographies, a method of use of such an apparatus, and a method for passivating hardware of microelectronic processing chambers are provided. The apparatus includes a substrate holder configured to support a microelectronic topography and a rotatable case with sidewalls arranged on opposing sides of the substrate holder. The method of using such an apparatus includes positioning a microelectronic topography upon a substrate holder of a processing chamber, exposing the microelectronic topography to a fluid within the processing chamber, and rotating a case of the processing chamber. The rotation is sufficient to affect movement of the fluid relative to the surface of the microelectronic topography. A method for passivating hardware of a microelectronic processing chamber includes exposing the hardware to an organic compound and subsequently exposing the hardware to an agent configured to form polar bonds with the organic compound.03-04-2010
20100045316METHOD FOR INSPECTING ELECTROSTATIC CHUCKS WITH KELVIN PROBE ANALYSIS - A method of inspecting an electrostatic chuck (ESC) is provided. The ESC has a dielectric support surface for a semiconductor wafer. The dielectric support surface is scanned with a Kelvin probe to obtain a surface potential map. The surface potential map is compared with a reference Kelvin probe surface potential map to determine if the ESC passes inspection.02-25-2010
20100044974EDGE RINGS FOR ELECTROSTATIC CHUCKS - A disclosed device for use with an electrostatic chuck configured to hold a substrate in a plasma environment comprises an edge ring configured to be placed either in contact with portions of only a ceramic top piece, a base plate, or coupled to the base plate through a plurality of pins and pin slots. The edge ring is further configured to be concentric with the ceramic top piece. In one embodiment, the edge ring includes an inner edge having an edge step arranged to provide mechanical coupling between the edge ring and the outer periphery of the ceramic top piece. The edge ring further includes an outer edge and a flat portion located between the inner edge and the outer edge. The flat portion is arranged to be both horizontal when the edge ring is placed around the outer periphery of the ceramic top piece and parallel to the substrate.02-25-2010
20100041238TUNABLE MULTI-ZONE GAS INJECTION SYSTEM - A tunable multi-zone injection system for a plasma processing system for plasma processing of substrates such as semiconductor wafers. The system includes a plasma processing chamber, a substrate support for supporting a substrate within the processing chamber, a dielectric member having an interior surface facing the substrate support, the dielectric member forming a wall of the processing chamber, a gas injector fixed to part of or removably mounted in an opening in the dielectric window, the gas injector including a plurality of gas outlets supplying process gas at adjustable flow rates to multiple zones of the chamber, and an RF energy source such as a planar or non-planar spiral coil which inductively couples RF energy through the dielectric member and into the chamber to energize the process gas into a plasma state. The injector can include an on-axis outlet supplying process gas at a first flow rate to a central zone and off-axis outlets supplying the same process gas at a second flow rate to an annular zone surrounding the central zone. The arrangement permits modification of gas delivery to meet the needs of a particular processing regime by allowing independent adjustment of the gas flow to multiple zones in the chamber. In addition, compared to consumable showerhead arrangements, a removably mounted gas injector can be replaced more easily and economically.02-18-2010
20100040768Temperature controlled hot edge ring assembly - A temperature-controlled hot edge ring assembly adapted to surround a semiconductor substrate supported in a plasma reaction chamber is provided. A substrate support with an annular support surface surrounds a substrate support surface. A radio-frequency (RF) coupling ring overlies the annular support surface. A lower gasket is between the annular support surface and the RF coupling ring. The lower gasket is thermally and electrically conductive. A hot edge ring overlies the RF coupling ring. The substrate support is adapted to support a substrate such that an outer edge of the substrate overhangs the hot edge ring. An upper thermally conductive medium is between the hot edge ring and the RF coupling ring. The hot edge ring, RF coupling ring and annular support surface can be mechanically clamped. A heating element can be embedded in the RF coupling ring.02-18-2010
20100038033ANCHORING INSERTS, ELECTRODE ASSEMBLIES, AND PLASMA PROCESSING CHAMBERS - A silicon-based showerhead electrode is provided where backside inserts are positioned in backside recesses formed along the backside of the electrode. The backside inserts comprise a threaded outside diameter, a threaded inside diameter, and a tool engaging portion formed in the threaded inside diameter. The tool engaging portion is formed such that the backside insert further comprises one or more lateral shielding portions between the tool engaging portion and the threaded outside diameter to prevent a tool engaged with the tool engaging portion of the backside insert from extending beyond the threaded outside diameter of the insert. Further, the tool engaging portion of the backside insert comprises a plurality of torque-receiving slots arranged about the axis of rotation of the backside insert. The torque-receiving slots are arranged to avoid on-axis rotation of the backside insert via opposing pairs of torque receiving slots.02-18-2010
20100022033PROCESS FOR WAFER TEMPERATURE VERIFICATION IN ETCH TOOLS - A blank wafer is placed in an etch chamber. A layer is deposited over the blank wafer, comprising providing a deposition gas, forming the deposition gas into a deposition plasma, and stopping the deposition gas. The blank wafer with the deposited layer is removed from the etch chamber. The thickness of the deposited layer is measured. Wafer temperature accuracy is calculated from the measured thickness of the deposited layer. The etch chamber is compensated according to the calculated wafer temperature accuracy. A wafer with an etch layer over the wafer and a patterned mask over the etch layer is placed into the etch chamber. The etch layer is etched in the etch chamber.01-28-2010
20100018553METHOD AND APPARATUS FOR SURFACE TREATMENT OF SEMICONDUCTOR SUBSTRATES USING SEQUENTIAL CHEMICAL APPLICATIONS - A system and method for removing polymer residue from around a metal gate structure formed on a surface of a substrate during a post-etch cleaning operation includes determining a plurality of process parameters associated with the metal gate structure and the polymer residue to be removed. A plurality of fabrication layers define the metal gate structure and the process parameters define characteristics of the fabrication layers and the polymer residue. A first cleaning chemistry and second cleaning chemistry are identified and a plurality of application parameters associated with the first and second cleaning chemistries are defined based on the process parameters. The first and second application chemistries are applied sequentially in a controlled manner using the application parameters to substantial remove the polymer residue while preserving the structural integrity of the gate structure.01-28-2010
20100016202MATERIALS AND SYSTEMS FOR ADVANCED SUBSTRATE CLEANING - The embodiments of the present invention provide improved materials, apparatus, and methods for cleaning wafer surfaces, especially surfaces of patterned wafers (or substrates). The cleaning materials, apparatus, and methods discussed have advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning material includes polymers of one or more polymeric compounds. The cleaning materials can be used in a wide range of viscosity and pH to clean different types of surfaces. The cleaning materials are in liquid phase, and deform around device features to capture the contaminants on the substrate. The polymers entrap the contaminants preventing their return to the substrate surface. The cleaning apparatus is designed to dispense and rinse cleaning materials with a range of viscosities.01-21-2010
20100015809ORGANIC LINE WIDTH ROUGHNESS WITH H2 PLASMA TREATMENT - A method for reducing very low frequency line width roughness (LWR) in forming etched features in an etch layer disposed below a patterned organic mask is provided. The patterned organic mask is treated to reduce very low frequency line width roughness of the patterned organic mask, comprising flowing a treatment gas comprising H01-21-2010
20100015731Method of low-k dielectric film repair - An apparatus, system and method for repairing a carbon depleted low-k material in a low-k dielectric film layer includes identifying a repair chemistry having a hydrocarbon group, the repair chemistry configured to repair the carbon depleted low-k material and applying the identified repair chemistry meniscus to the low-k dielectric film layer such that the carbon depleted low-k material in the low-k dielectric film layer is sufficiently exposed to the repair chemistry meniscus substantially repairing the low-k material. The repaired low-k material exhibits substantially equivalent low-k dielectric characteristics of the low-k dielectric film layer.01-21-2010
20100003829Clamped monolithic showerhead electrode - An electrode assembly for a plasma reaction chamber used in semiconductor substrate processing. The assembly includes an upper showerhead electrode which is mechanically attached to a backing plate by a series of spaced apart cam locks. A guard ring surrounds the backing plate and is movable to positions at which openings in the guard ring align with openings in the backing plate so that the cam locks can be rotated with a tool to release locking pins extending from the upper face of the electrode.01-07-2010
20100003826CORROSION RESISTANT COMPONENT OF SEMICONDUCTOR PROCESSING EQUIPMENT AND METHOD OF MANUFACTURE THEREOF - A corrosion resistant component of a plasma chamber includes a liquid crystalline polymer. In a preferred embodiment, the liquid crystalline polymer (LCP) is provided on an aluminum component having an anodized or non-anodized surface. The liquid crystalline polymer can also be provided on an alumina component. The liquid crystalline polymer can be deposited by a method such as plasma spraying. The liquid crystalline polymer may also be provided as a preformed sheet or other shape adapted to cover the exposed surfaces of the reaction chamber. Additionally, the reactor components may be made entirely from liquid crystalline polymer by machining the component from a solid block of liquid crystalline polymer or molding the component from the polymer. The liquid crystalline polymer may contain reinforcing fillers such as glass or mineral fillers.01-07-2010
20100003824Clamped showerhead electrode assembly - An electrode assembly for a plasma reaction chamber used in semiconductor substrate processing. The assembly includes an upper showerhead electrode which includes an inner electrode mechanically attached to a backing plate by a clamp ring and an outer electrode attached to the backing plate by a series of spaced apart cam locks. A guard ring surrounds the backing plate and is movable to positions at which openings in the guard ring align with openings in the backing plate so that the cam locks can be rotated with a tool to release cam pins extending upward from the upper face of the outer electrode. To compensate for differential thermal expansion, the clamp ring can include expansion joins at spaced locations which allow the clamp ring to absorb thermal stresses.01-07-2010
20100000683Showerhead electrode - A showerhead electrode includes inner and outer steps at an outer periphery thereof, the outer step cooperating with a clamp ring which mechanically attaches the electrode to a backing plate.01-07-2010
20090325320PROCESSES FOR RECONDITIONING MULTI-COMPONENT ELECTRODES - A process for reconditioning a multi-component electrode comprising a silicon electrode bonded to an electrically conductive backing plate is provided. The process comprises: (i) removing metal ions from the multi-component electrode by soaking the multi-component electrode in a substantially alcohol-free DSP solution comprising sulfuric acid, hydrogen peroxide, and water and rinsing the multi-component electrode with de-ionized water; (ii) polishing one or more surfaces of the multi-component electrode following removal of metal ions there from; and (iii) removing contaminants from silicon surfaces of the multi-component electrode by treating the polished multi-component electrode with a mixed acid solution comprising hydrofluoric acid, nitric acid, acetic acid, and water and by rinsing the treated multi-component electrode with de-ionized water. Additional embodiments of broader and narrower scope are contemplated.12-31-2009
20090322199BACKSIDE MOUNTED ELECTRODE CARRIERS AND ASSEMBLIES INCORPORATING THE SAME - A carrier assembly is provided comprising a backside mounted electrode carrier and electrode mounting hardware. The backside mounted electrode carrier comprises an electrode accommodating aperture, which in turn comprises a sidewall structure that is configured to limit lateral movement of an electrode positioned in the aperture. The electrode accommodating aperture further comprises one or more sidewall projections that support the weight of an electrode positioned in the aperture. The electrode mounting hardware is configured to engage an electrode positioned in the electrode accommodating aperture from the backside of the carrier and urge the electrode against the sidewall projections so as to limit axial movement of the electrode in the electrode accommodating aperture. Additional embodiments of broader and narrower scope are contemplated.12-31-2009
20090321018PERIPHERALLY ENGAGING ELECTRODE CARRIERS AND ASSEMBLIES INCORPORATING THE SAME - In accordance with one embodiment of the present disclosure, an assembly is provided comprising a multi-component electrode and a peripherally engaging electrode carrier. The peripherally engaging electrode carrier comprises a carrier frame and a plurality of reciprocating electrode supports. The multi-component electrode is positioned in the electrode accommodating aperture of the carrier frame. The backing plate of the electrode comprises a plurality of mounting recesses formed about its periphery. The reciprocating electrode supports can be reciprocated into and out of the mounting recesses. Additional embodiments of broader and narrower scope are contemplated.12-31-2009
20090320942SINGLE SUBSTRATE PROCESSING HEAD FOR PARTICLE REMOVAL USING LOW VISCOSITY FLUID - A head for dispensing a thin film over a substrate is disclosed. The head includes a body assembly that extends between a first and a second end that is at least a width of the substrate. The body includes a main bore that is defined between the first and the second ends, the main bore connected to an upper side of a reservoir through a plurality of feeds that are defined between the main bore and the reservoir. The body also includes a plurality of outlets connected to a lower side of the reservoir and extend to an output slot. The plurality of feeds have a larger cross-sectional area than the plurality of outlets and the plurality of feeds are fewer than the plurality of outlets. Wherein fluid is configured to flow through the main bore, through the plurality of feeds along the bore and fill the reservoir up to at least the threshold level before fluid is evenly output as a film out of the output slot onto the substrate.12-31-2009

Patent applications by Lam Research Corporation