| Kenet, Inc. Patent applications |
| Patent application number | Title | Published |
|---|
| 20110210763 | COMMON-MODE INSENSITIVE SAMPLER - An approach to rejecting input common-mode voltage variations in a sampler/converter that avoids the use of a differential amplifier in the signal path, and without introducing added distortion or noise. In one embodiment, the input common-mode variations are sensed on a pair of matched resistors that straddle the common mode analog inputs, on a node ‘Vcmi’. An alternative, switched-capacitor-based sensing scheme is also possible. Using this measured Vcmi, adjustments are then made to the rest of the sampler/converter to take out any variations observed at Vcmi. | 09-01-2011 |
| 20110199151 | INCREASING CHARGE CAPACITY OF CHARGE TRANSFER CIRCUITS WITHOUT ALTERING THEIR CHARGE TRANSFER CHARACTERISTICS - A technique for increasing the charge storage capacity of a charge storage device without changing its inherent charge transfer function. The technique may be used to implement a charge domain signal processing circuits such as Analog to Digital Converters (ADCs) used in digital radio frequency signal receivers. | 08-18-2011 |
| 20090153386 | FLASH CONVERTER DIFFERENTIAL REFERENCE LADDER AUTO-ZERO CIRCUIT - A differential reference ladder with an auto zero circuit that can be used as part of a flash analog to digital converter. The auto zero operation is performed relative to a common mode voltage of the ladder. The resistive ladder is disconnected from the rest of the circuit during auto zero mode. As a result, the auto zero adjustment is more accurate, since the offsets are stored under the same common mode connection as when the circuit is in a compare mode. This permits auto zeroing to proceed quickly unencumbered by the parasitic capacitance of the ladder or other components. | 06-18-2009 |
| 20090146859 | FLASH CONVERTER DIFFERENTIAL REFERENCE LADDER ADJUSTMENT WITH STABLE COMMON MODE VOLTAGE - An adjustment circuit for use with a resistive reference ladder that establishes nominal reference steps and a common mode voltage for a plurality of comparators, such as used in a flash converter. An “H” arrangement of current sources injects current at a first node, V | 06-11-2009 |
| 20090146717 | INCREASING CHARGE CAPACITY OF CHARGE TRANSFER CIRCUITS WITHOUT ALTERING THEIR CHARGE TRANSFER CHARACTERISTICS - A technique for increasing the charge storage capacity of a charge storage device without changing its inherent charge transfer function. The technique may be used to implement a charge domain signal processing circuits such as Analog to Digital Converters (ADCs) used in digital radio frequency signal receivers. | 06-11-2009 |
| 20090085787 | VOLTAGE RANDOM ACCESS MEMORY (VRAM) - An integrated circuit memory cell and voltage ladder design that adapts techniques typically applied to Static Random Access Memory (SRAM) circuits to implement a compact array of analog Voltage Random Access Memory (VRAM) locations. The memory cells in the VRAM each store a digital value that controls a corresponding switch. The switch couple a particular voltage from a set of voltages generated by the ladder, to be output when that location is enabled. Multiple analog output voltages are provided by simply providing additional rows of cells. | 04-02-2009 |
| 20080218396 | Charge-domain pipelined charge-redistribution analog-to-digital converter - A single-ended charge-domain pipeline of at least two stages is provided. Each stage comprises a charge-storage node, a charge-transfer circuit for conveying charge from said charge-storage node out of said stage, a charge-control capacitor connected to said charge-storage node and driven by a periodic clock voltage, a comparator which compares the voltage of said charge-storage node to a reference voltage, and a digital latch which latches the state of said comparator output under control of a second periodic clock voltage and provides a latched digital output from said stage. The second stage of the pipeline further includes a first charge-redistribution capacitor connected to the charge-storage node of the second stage and driven by a conditional voltage responsive to the latched digital output from the first stage. The charge output from each stage of said pipeline is substantially identical to the charge input to said stage. | 09-11-2008 |
| 20080205581 | Common-mode charge control in a pipelined charge-domain signal-processing circuit - In a differential bucket-brigade device (BBD) pipeline it is necessary for proper circuit function to maintain the common-mode charge within an acceptable range at each pipeline stage. Embodiments of the present invention provide for reducing common-mode charge variations in a differential charge-domain pipeline. Common mode charge at a given stage of the pipeline is adjusted according to one or more measured characteristics, thereby controlling common mode charge variation throughout the differential charge-domain pipeline. | 08-28-2008 |
