| KALRAY Patent applications |
| Patent application number | Title | Published |
| 20110095816 | NETWORK ON CHIP BUILDING BRICKS - The present invention relates to a Network on chip comprising a torus matrix of processing elements formed by a juxtaposition of bricks in rows and columns, each brick comprising a longitudinal extra-connection bus segment connecting two terminals situated on opposite transverse edges of the brick on a first axis; two longitudinal intra-connection bus segments connecting circuits of the brick to respective terminals situated on the opposite transverse edges on a second axis symmetrical to the first axis with respect to the center of the brick; a transverse extra-connection bus segment connecting two terminals situated on opposite longitudinal edges of the brick on a third axis; and two transverse intra-connection bus segments connecting circuits of the brick to respective terminals situated on the opposite longitudinal edges on a fourth axis symmetrical to the third axis with respect to the center of the brick. The bricks are oriented at 180° from one to the next in the direction of the columns and in the direction of the rows, and each brick comprises an even number of power supply conductor segments arranged symmetrically with respect to an axis of symmetry of the brick and connecting opposite edges of the brick. | 04-28-2011 |
| 20110058569 | NETWORK ON CHIP INPUT/OUTPUT NODES - The present invention relates to a torus network comprising a matrix of infrastructure routers, each of which is connected to two other routers belonging to the same row and to two other routers belonging to the same column; and input/output routers, each of which is connected by two internal inputs to two other routers belonging either to the same row, or to the same column, and comprising an external input for supplying the network with data. Each input/output router is devoid of queues for its internal inputs and comprises queues assigned to its external input managed by an arbiter which is configured to also manage the queues of an infrastructure router connected to the input/output router. | 03-10-2011 |
| 20110026400 | NETWORK ON CHIP WITH QUALITY OF SERVICE - The present invention relates to a method for limiting the throughput of a communication in a meshed network, comprising the following steps: allocating fixed paths to communications likely to be established on the network; identifying the communications likely to take a mesh segment; allocating respective throughput quotas to the identified communications such that the sum of these quotas is less than or equal to a nominal throughput of said segment; and measuring the throughput of each communication at the input of the network and suspending the communication when its quota is reached. | 02-03-2011 |