| ITE TECH. INC. Patent applications |
| Patent application number | Title | Published |
|---|
| 20120104949 | LOAD DRIVING APPARATUS AND DRIVING METHOD THEREOF - A load driving apparatus is disclosed. The load driving apparatus includes a driving signal generator and a controller. The driving signal generator is used for providing a driving signal to a load. The controller is used for generating and providing a control signal to the driving signal generator. The driving signal generator generates N integer signals and M fractional signals in a driving period to form the driving signal according to the control signal. N and M are positive integers, and an amplitude of the integer signals is greater than an amplitude of each of the fractional signals. | 05-03-2012 |
| 20120086732 | DRIVING DEVICE FOR BISTABLE ELECTRO-OPTIC DISPLAY AND DRIVING METHOD THEREFOR - A driving device and a driving method for a bistable electro-optic display are provided. The driving device includes an image processing unit, a display process module, and a scheduling module. The image processing unit receives a first update region of a display area to produce a first region update data. The display process module updates the display area according to the first region update data. During an update period for the first update region, the image processing unit can continue to receive at least one second update region, so as to produce a plurality of second region update data. After the first region is completely updated, the scheduling module controls the display process module to update the display area according to the second region update data, so as to shorten the time for updating the display area. | 04-12-2012 |
| 20120086731 | BISTABLE ELECTRO-OPTIC DISPLAY AND DRIVING METHOD THEREOF - A bistable electro-optic display device and a driving method thereof are provided. The display device includes an overlap detection unit and an overlapping image processing unit. The overlap detection unit compares a first display data and a second display data received by a pixel unit. When a first update region corresponding to the first display data overlaps a second update region corresponding to the second display data, the overlap detection unit outputs an overlapping display data, so as to make a display panel display the first update region and the second update region. The overlapping image processing unit combines the first display data and the second display data according to the comparison result and an overlapping display mode to output the overlapping display data to the overlap detection unit, wherein the overlapping display mode indicates the display priority of the first display data and the second display data. | 04-12-2012 |
| 20110276751 | INTEGRATED MEMORY CONTROL APPARATUS AND METHOD THEREOF - An integrated memory control apparatus including a first interface decoder, a second interface decoder and an interface controller is provided. Wherein, the first interface decoder is coupled to a control chip through a first serial peripheral interface (SPI), the second interface decoder is coupled to a micro-processor unit through a general transmission interface, and the interface controller is coupled to a memory through a second SPI. When the interface controller receives the request signals from the control chip and the micro-processor unit, the control chip may correctly read data from the memory through the first and second SPI. On the other hand, the micro-processor unit may stop reading data from the memory through the general transmission interface. Therefore, the control chip and the micro-processor unit may share the same memory. | 11-10-2011 |
| 20110276739 | INTEGRATED MEMORY CONTROL APPARATUS - An integrated memory control apparatus including a first interface decoder, a second interface decoder and an interface controller is provided. Wherein, the first interface decoder is coupled to a control chip through a first serial peripheral interface (SPI), the second interface decoder is coupled to a micro-processor unit through a general transmission interface, and the interface controller is coupled to a memory through a second SPI. When the interface controller receives the request signals from the control chip and the micro-processor unit, the control chip may correctly read data from the memory through the first and second SPI. On the other hand, the micro-processor unit may stop reading data from the memory through the general transmission interface. Therefore, the control chip and the micro-processor unit may share the same memory. | 11-10-2011 |
| 20110252175 | INTEGRATED MEMORY CONTROL APPARATUS - An integrated memory control apparatus including a first interface decoder, a second interface decoder and an interface controller is provided. Wherein, the first interface decoder is coupled to a control chip through a first serial peripheral interface (SPI), the second interface decoder is coupled to a micro-processor unit through a general transmission interface, and the interface controller is coupled to a memory through a second SPI. When the interface controller receives the request signals from the control chip and the micro-processor unit, the control chip may correctly read data from the memory through the first and second SPI. On the other hand, the micro-processor unit may stop reading data from the memory through the general transmission interface. Therefore, the control chip and the micro-processor unit may share the same memory. | 10-13-2011 |
| 20110127985 | VOLTAGE CONVERTING APPARATUS - A voltage converting apparatus is disclosed. The voltage converting apparatus mentioned above includes an error comparator. The error comparator receives a feedback voltage and a reference voltage and generates a control signal according to the feedback voltage and the reference voltage. Moreover, the error comparator includes a differential pair, a first current source, and an offset voltage controlling circuit. The offset voltage controlling circuit receives a ramp enabling signal and adjusts a bias current flowing through at least one of a first and a second output terminal of the differential pair according to the ramp enabling signal. | 06-02-2011 |
| 20110127092 | POSITION APPARATUS FOR TOUCH DEVICE AND POSITION METHOD THEREFOR - A position method for a touch device is provided. In the position method, first, a controller is provided to set a boundary region on a touch panel of the touch device. When a touch medium touches the touch panel, the controller detects whether a peak capacitance detection differential value of a plurality of capacitance detection differential values is occurred in the boundary region. Besides, the controller performs an interpolation calculation to obtain a coordinate of a touch point for the touch medium according to the peak capacitance detection differential value and a first adjacent capacitance detection differential value which is adjacent to the peak capacitance detection differential value. | 06-02-2011 |
| 20110074726 | TOUCH PANEL AND TOUCHING POINT DETECTION METHOD THEREOF - A touch panel is disclosed. The touch panel mentioned above includes at least a touching detection column and a touching detection module. The detection column includes N first touching detection units, N is a positive integer. Each of the first touching detection units transfers a first capacitance varying value according to an area cover by a touching point. The touching detection module operates a differential operating on the first capacitance varying values from two of the first touching detection units which is disposed adjoining in sequential for obtaining a capacitance varying order distribution. The touching detection module obtains a number of at least one first touching point and coordinates thereof by calculating the capacitance varying order distribution. | 03-31-2011 |
| 20100295709 | TOUCH SENSOR WITH SLIDING STRUCTURE - A touch sensor with a sliding structure is disclosed. The touch sensor includes a first touch detecting plate, a second touch detecting plate, and a capacitance-to-digital converter. The first touch detecting plate includes a first tilt portion, and the second touch detecting plate includes a second tilt portion, wherein a bevel edge of the second tilt portion is parallel to a bevel edge of the first tilt portion. The first touch detecting plate and the second touch detecting plate form a parallelogram slide detecting area. The first touch detecting plate transmits a first detected capacitance, and the second touch detecting plate transmits a second detected capacitance. The capacitance-to-digital converter generates a sliding state detected value according to the first detected capacitance and the second detected capacitance. | 11-25-2010 |
| 20100289555 | CAPACITANCE INTERFACE CIRCUIT - A capacitance interface circuit is provided. An external inductive capacitor is divided into a variable portion and an invariable portion. The capacitance of an internal adjustable capacitor is designed to be equal or close to the fixed capacitance of the external inductive capacitor. The internal adjustable capacitor is used for storing charges having a polarity opposite to that of the invariable portion of the external inductive capacitor in order to neutralize the effect of the invariable portion of the external inductive capacitor. Thus, a charge converter composed of a fully-differential amplifier and feedback capacitors needs only work on the variable portion of the external inductive capacitor, and accordingly the accuracy in subsequent data processing is increased. | 11-18-2010 |
| 20100271117 | VOLTAGE CONVERTER - A voltage converter including a first transistor, a second transistor, an inductor and a control module is provided. The first transistor has a source terminal receiving an input signal, and a body terminal receiving a first bias voltage. The second transistor has a drain terminal coupled to a drain terminal of the first transistor, a source terminal coupled to ground, and a body terminal receiving a second bias voltage. The inductor has a first terminal coupled to the drain terminal of the first terminal and a second terminal generating an output voltage. The control module is coupled to a gate terminal of the first transistor and a gate terminal of the second transistor for controlling conducting states of the first transistor and the second transistor. | 10-28-2010 |
| 20100253368 | CAPACITOR INTERFACE CIRCUIT - A capacitor interface circuit is provided. A capacitor under test (CUT) is divided into a variable portion and an invariable portion, and the capacitance of an offset capacitor is designed to equal to or close to the fixed capacitance of the CUT. The offset capacitor is used to store the charges opposite to the invariable portion of the CUT for neutralizing the effect of the invariable portion of the CUT. Thereupon, the charge converter composed by the fully-differential amplifier and the feedback capacitors only responses for the variable portion of the CUT so as to increase the accuracy of the follow-up data processing. | 10-07-2010 |
| 20100252336 | POSITION APPARATUS FOR TOUCH DEVICE AND POSITION METHOD THEREOF - A position apparatus of a touch device and a position method thereof are provided, wherein the touch device includes a plurality of scan lines. In the position method, a plurality of capacitances in the scan lines are sensed. Next, a plurality of capacitances respectively sensed in an i | 10-07-2010 |
| 20100238929 | METHOD FOR CLASSIFYING NETWORK PACKET - A method for classifying a network packet includes the steps of: receiving a network packet which includes a plurality of specific data; providing a basic rule table which includes a plurality of basic rules corresponding to the plurality of specific data; providing a composite rule table which includes a plurality of composite rules corresponding the packet classes, and each of the composite rules includes a specific calculation; each of the basic rules generates an output result according to the corresponding specific data; each of specific calculation generates a calculated result of the corresponding composite rule according to part or all of the output results; determining the packet class of the network packet according to the calculated results. | 09-23-2010 |
| 20100214253 | DRIFT COMPENSATION APPARATUS OF CAPACITIVE TOUCH PANEL AND DRIFT COMPENSATION METHOD THEREOF - A method and an apparatus adapted to a capacitive touch panel for drift compensation are provided, wherein the touch panel includes a plurality of sensors. In the method for drift compensation, a plurality of capacitances respectively sensed by each of the sensors are extracted. Whether the touch panel is in a proximity state is determined upon a slope of the sensed capacitances and a slope parameter. Whether each of the capacitances is drifted is determined upon the capacitance and an allowable noise range. When the touch panel is not in the proximity state and each of the capacitances is drifted, each of the capacitances is compensated according to a drift error of each of the capacitances after a first presetting time has passed. | 08-26-2010 |
| 20100181982 | VOLTAGE GENERATING APPARATUS FOR HEADPHONE - A voltage generating apparatus for a headphone is provided, which includes a voltage generator, a charge pump circuit, an operating amplifier and a controller. The voltage generator generates a first operating voltage. The charge pump circuit receives the first operating voltage and an adjusting signal, and generates a second operating voltage according to the first operating voltage and the adjusting signal. The operating amplifier receives the first operating voltage and the second operating voltage serving as the operating voltages thereof and receives an input signal so as to generate an output signal. The controller receives the second operating voltage and a control signal, and generates the adjusting signal according to the second operating voltage and the control signal. | 07-22-2010 |
| 20100181941 | CONTROLLING CIRCUIT AND CONTROLLING METHOD - A controlling circuit and a controlling method are disclosed. The controlling circuit includes a plurality of switches and a comparator. The first terminals of the switches are respectively coupled to one of a plurality of LED channels. The switches are conducted according to a plurality of switching signals respectively, wherein the switching signals are asserted alternately. The first input terminal of the comparator is coupled to the second terminals of the switches and the second input terminal of the comparator receives a reference voltage for the comparator to compare the voltage of the first input terminal with the voltage of the second input terminal so as to output a comparison result. In this way, whether the LED channels work abnormally or not may be detected. In addition, the hardware cost may also be reduced by employing fewer comparators through a sharing mode. | 07-22-2010 |
| 20100171559 | LOW TEMPERATURE COEFFICIENT OSCILLATOR - A low temperature coefficient oscillator including a current generator, a first and a second voltage generator, an amplifier, a resistor, a switch, a capacitor and an oscillating unit is provided. The current generator generates a first through a fourth current according to a control signal. The first voltage generator generates a first voltage according to the first current. The second voltage generator generates a second voltage according to the second current and a frequency signal. The amplifier generates the control signal according the first and second voltages. The resistor is coupled between a first terminal of the switch and ground, and a first terminal thereof receives the third current. The switch is conducted or not according the frequency signal. The capacitor is coupled between a second terminal of the switch and ground. The oscillating unit generates the frequency signal according to the fourth current and a voltage of the capacitor. | 07-08-2010 |
| 20100138011 | MULTIMEDIA PLAYING METHOD AND APPARATUS USING THE SAME - A multimedia playing method is provided. First, N audio files selected by a user are received, wherein N>0. Then, the memory space required for playing each of the N audio files for a predetermined time is respectively detected. Next, whether total memory space required by the N audio files is not smaller than a predetermined value is determined. If the total memory space required by the N audio files is not smaller than the predetermined value, the predetermined time is reduced and the step of respectively detecting the memory space required for playing each of the N audio files for the predetermined time is executed again. If the total memory space required by the N audio files is smaller than the predetermined value, an initial part of each of the N audio files to be played for the predetermined time is stored into the memory. | 06-03-2010 |
| 20100134185 | AUDIO AMPLIFIER - An audio amplifier including a differential mode integrator, a first comparator, a second comparator, a logic circuit and a driving unit is provided. The differential mode integrator receives a differential input signal and a differential output signal and outputs a differential mode intermediate signal. The first comparator has a positive input terminal receiving a first terminal signal of the differential mode intermediate signal, a negative input terminal receiving a ramp signal, and generates a first signal. The second comparator has a positive input terminal receiving a ramp signal, a negative input terminal receiving a second terminal signal of the differential mode intermediate signal, and generates a second signal. The logic circuit performs a logic operation on the first and second signals to generate a third signal and a fourth signal. The driving unit generates a differential output signal to drive a load according to the third and fourth signals. | 06-03-2010 |
| 20100040111 | TEMPERATURE MEASURING METHOD AND TEMPERATURE MEASURING APPARATUS USING THE SAME - A temperature measuring method and a temperature measuring apparatus using the same are provided. In the method, four different currents are provided to a temperature measuring device respectively so as to obtain four different voltages at two ends of the temperature measuring apparatus correspondingly. A ratio of two of the four different currents is equal to a ratio of the other two currents. Next, two voltage variation values are obtained according to mentioned four different voltages. One of the voltage variation values is converted to a first digital temperature code representing a first temperature, and the other voltage variation value is converted to a second digital temperature code representing a second temperature. Then, a real temperature code representing a real temperature is obtained according to the first digital temperature code and the second digital temperature code. | 02-18-2010 |
| 20100019750 | POWER CONVERTOR AND CURRENT DETECTION APPARATUS THEREOF - A current detection apparatus including a current detection circuit, a voltage regulation power supply circuit, and a package carrier is disclosed. The current detection circuit has a reference terminal and a detection terminal. The voltage regulation power supply circuit is used to generate an output voltage and includes a current transmission terminal for transmitting a current. The package carrier is used to carry the current detection circuit, the voltage regulation power supply circuit, a reference pad, and a current transmission pad. The package carrier includes at least one common voltage lead. The current transmission pad is coupled to the reference pad through at least one bonding wire such that an equivalent resistance is formed on the coupling path between the current transmission pad and the reference pad. | 01-28-2010 |
| 20090315473 | LIGHT-EMITTING DEVICE DRIVING CIRCUIT AND METHOD THEREOF - A light-emitting device driving circuit and a method thereof are provided. A terminal of a light-emitting device is coupled to a supply voltage and a cathode of a diode via an inductor, and the other terminal is coupled to an anode of the diode. The light-emitting device driving circuit includes a switch, a current-sensing circuit, and a switch control circuit. The current-sensing circuit is coupled to the anode of the diode via the switch to determine whether or not to generate a turning-off control signal according to a conducting-current value of the switch. The switch control circuit controls an on/off state of the switch, and turns off the switch according to the turning-off control signal. Besides, the switch control circuit compares the conducting-current value with a reference-current value to generate a comparing result to dynamically adjust a time length of turning off the switch accordingly. | 12-24-2009 |
| 20090292859 | INTEGRATED STORAGE DEVICE AND CONTROL METHOD THEREOF - An integrated storage device and a control method thereof are provided. The integrated storage device includes an interface controller, a microcontroller, a plurality of non-volatile storage devices, and a channel link controller. The interface controller retrieves a master control signal and a slave control signal sent by a motherboard. The microcontroller generates a selecting signal. The non-volatile storage devices have at least two storage types. The non-volatile storage devices are divided into a first group of storage device and a second group of storage device according to the selecting signal. The channel link controller respectively controls the first group of storage device and the second group of storage device according to the master control signal and the slave control signal. Thereby, the accessing efficiency of the integrated storage device is increased. | 11-26-2009 |
| 20090267875 | AUTO-ADDRESSING METHOD FOR SERIES CIRCUIT AND AUTO-DETECTING METHOD FOR DETECTING THE NUMBER OF CIRCUITS CONNECTED IN SERIES - An auto-addressing method for a series circuit and an auto-detecting method for detecting the number of circuits connected in series are disclosed. The series circuit includes a number of same integrated circuits connected in series. The auto-detecting method is based on the auto-addressing method. In the auto-addressing method, the integrated circuits are enabled to transmit an initial address command sequentially. Each integrated circuit is provided with corresponding address information upon receiving the initial address command. | 10-29-2009 |
| 20090161986 | DIGITAL IMAGE CONVERTING APPARATUS WITH AUTO-CORRECTING PHASE AND METHOD THEREOF - A digital image converting apparatus with auto-correcting phase and a method thereof are provided. The digital image converting apparatus includes a phase controller, a delay locked loop (DLL), an analog-to-digital converter (ADC) and a position adjuster. The phase controller selects one of preset phases for outputting and continuously changes the output preset phase for controlling a clock signal produced by the delay locked loop. The ADC converts an analog display frame according to the adjusted clock signal. After all the preset phases are output in sequence, the phase controller can obtain an optimal phase for converting the display frame according to the smallest front porch of horizontal scan line and the smallest back porch of horizontal scan line of a digital display frame produced by the position adjuster. | 06-25-2009 |
| 20090146737 | CLASS-D AMPLIFIER AND MULTI-LEVEL OUTPUT SIGNAL GENERATED METHOD THEREOF - A class-D amplifier and a method of generating a multi-level output signal thereof are provided. The class-D amplifier includes a controlling logic circuit and an output module. The controlling logic circuit analyzes the amplitude of an input signal to generate a voltage modifying signal. A power supply provides a voltage according to the voltage modifying signal. The controlling logic circuit generates controlling signals according to the input signal. The output module generates an output signal to drive a load according to the voltage and the controlling signals. In other words, the resolution of the amplitude of the output signal is increased by modifying the voltage, and a signal to noise ratio is then increased. | 06-11-2009 |
| 20090125764 | DATA PRESERVING METHOD AND DATA ACCESSING METHOD FOR NON-VOLATILE MEMORY - A data preserving method and a data accessing method for a non-volatile memory are provided. In the data preserving method, a data is checked according to an error correcting code (ECC) to obtain an error bit number of the data. When the error bit number is greater than a threshold, the data is moved from a first memory unit to a second memory unit and is corrected according to the ECC. Thereby, the data stability of the non-volatile memory is improved. | 05-14-2009 |
| 20090070516 | INTEGRATED MEMORY CONTROL APPARATUS - An integrated memory control apparatus including a first interface decoder, a second interface decoder and an interface controller is provided. Wherein, the first interface decoder is coupled to a control chip through a first serial peripheral interface (SPI), the second interface decoder is coupled to a micro-processor unit through a general transmission interface, and the interface controller is coupled to a memory through a second SPI. When the interface controller receives the request signals from the control chip and the micro-processor unit, the control chip may correctly read data from the memory through the first and second SPI. On the other hand, the micro-processor unit may stop reading data from the memory through the general transmission interface. Therefore, the control chip and the micro-processor unit may share the same memory. | 03-12-2009 |
| 20080290906 | CONSTANT-CURRENT DRIVING CIRCUIT - A constant-current driving circuit includes a first current source, a reference voltage generating circuit and an output signal generating circuit. A terminal of the first current source is coupled to a terminal of a first LED string, wherein the terminal of the first current source has a first voltage. The reference voltage generating circuit is used for generating a reference voltage and comparing the first voltage with a first predetermined voltage to generate a first comparing signal to thereby adjust the reference voltage. The output signal generating circuit is used for outputting an output signal to another terminal of the first LED string and receiving the input signal, wherein the output signal generating circuit decides whether or not to output the input signal serving as the output signal according to the comparison result of the reference voltage with the second voltage. | 11-27-2008 |
