| 20100023818 | MULTIPLE ACCESS TEST ARCHITECTURE FOR MEMORY STORAGE DEVICES - A new architecture for use with computer memory storage devices is disclosed that provides means by which a memory storage device may be accessed both as standard archive file device as well as in any unique physical and native command set modes supported by the device. A system architecture for accessing a memory storage device that provides access to the storage device via a standard memory storage method while alternatively providing direct access to the full physical and functional capabilities of the storage device. The system architecture has four main elements. Firstly, a central processing system which acts as the user interface and controls access to all attached peripheral functions. Secondly, an electronic bridge connected on one side to the central processing system via a standard I/O channel and on the other side to the memory device through a memory bridge presenting the memory device to the central processing system as a standard memory peripheral. Thirdly, a second processing unit which on one side is connected to the central processing system and on the other side is connected to the memory storage device via the multiplexer thus providing the second processing unit direct access to the memory storage device. And finally, the multiplexer that can connect either the electronic memory bridge or the second processing system to the memory storage device. | 01-28-2010 |
