Green Hills Software, Inc. Patent applications |
Patent application number | Title | Published |
20160034316 | TIME-VARIANT SCHEDULING OF AFFINITY GROUPS ON A MULTI-CORE PROCESSOR - Methods and systems for scheduling applications on a multi-core processor are disclosed, which may be based on association of processor cores, application execution environments, and authorizations that permits efficient and practical means to utilize the simultaneous execution capabilities provided by multi-core processors. The algorithm may support definition and scheduling of variable associations between cores and applications (i.e., multiple associations can be defined so that the cores an application is scheduled on can vary over time as well as what other applications are also assigned to the same cores as part of an association). The algorithm may include specification and control of scheduling activities, permitting preservation of some execution capabilities of a multi-core processor for future growth, and permitting further evaluation of application requirements against the allocated execution capabilities. | 02-04-2016 |
20140325681 | Single-Chip Virtualizing and Obfuscating Storage System for Portable Computing Devices - In certain embodiments, an information obfuscation service may be incorporated directly into the main applications processor of a portable computing device such that the applications processor and its relevant storage peripherals may be securely shared via a virtualization firmware module, avoiding the use of specialized hardware or major modifications of the operating system. The virtualizing and obfuscating storage firmware module may enable a much higher level of assurance in information-at-rest protection while using only the memory protection and privilege mode facilities inherent in common portable device applications microprocessors. The virtualizing and obfuscating storage firmware may interpose storage accesses originating from the operating system. This interposition may be performed seamlessly, without explicit knowledge of the operating system. | 10-30-2014 |
20140281447 | Single-Chip Virtualizing and Obfuscating Communications System for Portable Computing Devices - A virtualizing and obfuscating communications firmware module may be incorporated into common, mass-market portable computing devices, such as smartphones and tablets, to provide this service. The disclosure encompasses authentication and obfuscation software components that may comprise trusted firmware whose operation is protected from the main portable device operating system that is assumed to be hostile (e.g. infiltrated with malware or under the control of a remote attacker). In certain embodiments, a single-chip design is disclosed, without any specialized hardware: only the primary portable device applications microprocessor may be used by both the main operating system and the virtualizing and obfuscating communications firmware module. The operating system may operates as if it has access to a real communications peripheral, but in reality the virtualizing and obfuscating communications firmware module virtualizes this peripheral. The firmware module may perform authentication of the user and obfuscation of the data without the operating system's knowledge. | 09-18-2014 |
20120317551 | Post-compile instrumentation of object code for generating execution trace data - The invention is directed to instrumenting object code of an application and/or an operating system on a target machine so that execution trace data can be generated, collected, and subsequently analyzed for various purposes, such as debugging and performance. Automatic instrumentation may be performed on an application's object code before, during or after linking. A target machine's operating system's object code can be manually or automatically instrumented. By identifying address space switches and thread switches in the operating system's object code, instrumented code can be inserted at locations that enable the execution trace data to be generated. The instrumentation of the operating system and application can enable visibility of total system behavior by enabling generation of trace information sufficient to reconstruct address space switches and context switches. | 12-13-2012 |
20120317550 | Forward post-execution software debugger - A method and system debug a computer program by using trace data, which is a recording of the sequence of machine instructions executed by a program during a time period along with the addresses and values of memory locations accessed and modified by each machine instruction. After the time period, the method and system use the trace data to simulate the execution of the program during the time period under the control of a debugger. In addition, the method and system use the trace data to simulate the execution of the program during the time period backwards in time under the control of the debugger. | 12-13-2012 |
20120284732 | Time-variant scheduling of affinity groups on a multi-core processor - Methods and systems for scheduling applications on a multi-core processor are disclosed, which may be based on association of processor cores, application execution environments, and authorizations that permits efficient and practical means to utilize the simultaneous execution capabilities provided by multi-core processors. The algorithm may support definition and scheduling of variable associations between cores and applications (i.e., multiple associations can be defined so that the cores an application is scheduled on can vary over time as well as what other applications are also assigned to the same cores as part of an association). The algorithm may include specification and control of scheduling activities, permitting preservation of some execution capabilities of a multi-core processor for future growth, and permitting further evaluation of application requirements against the allocated execution capabilities. | 11-08-2012 |
20120174077 | Backward post-execution software debugger - A method finds an error in a computer program. A plurality of execution breakpoints are set in the computer program. A portion of the execution of the computer program is simulated as recorded in the trace data in the reverse order until one a plurality of conditions is met, wherein one of the plurality of conditions is an attempt to execute a machine instruction associated with one of the plurality of execution breakpoints. | 07-05-2012 |
20120151451 | Post-execution software debugger with event display - A method finds an error in a computer program. A sequence of machine instructions performed by a processor is recorded as trace data. Further, at least one event is selected from a plurality of events. In addition, an operating system instruction address is determined for the at least one event. Further, at least a portion of the trace data is searched for the operating system instruction address. The execution time for an operating system instruction stored in the operating system instruction address is determined. The execution time is searched through in the database to find task related data. The task related data is displayed. | 06-14-2012 |
20090245137 | HIGHLY AVAILABLE VIRTUAL STACKING ARCHITECTURE - At least one embodiment of the present invention provides a single High Availability virtual switching architecture that allows for sub convergence times in the event of a switch or switch link failure. In some instances, the High Availability architecture uses an adaptation of an ISIS protocol to leverage separation of topology calculation and propagation of network management configuration to achieve sub-second convergence. | 10-01-2009 |