| GREAT WALL SEMICONDUCTOR CORPORATION Patent applications |
| Patent application number | Title | Published |
|---|
| 20120044720 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING LOW VOLTAGE MOSFET FOR PORTABLE ELECTRONIC DEVICES AND DATA PROCESSING CENTERS - A semiconductor device has a well region formed within a substrate. A gate structure is formed over a surface of the substrate. A source region is formed within the substrate adjacent to the gate structure. A drain region is formed within the substrate adjacent to the gate structure. A first clamping region and second clamping region below the source region and drain region. A trench is formed through the source region. The trench allows the width of the source region to be reduced to 0.94 to 1.19 micrometers. A plug is formed through the trench. A source tie is formed through the trench over the plug. An interconnect structure is formed over the source region, drain region, and gate structure. The semiconductor device can be used in a power supply to provide a low voltage to electronic equipment such as a portable electronic device and data processing center. | 02-23-2012 |
| 20110140200 | Lateral Power MOSFET With Integrated Schottky Diode - A semiconductor device includes a substrate having a first region and a second region. The first region is electrically isolated from the second region. The semiconductor device further includes a lateral field-effect transistor (FET) disposed within the first region. The lateral FET includes a first terminal and a second terminal. The semiconductor device further includes a diode disposed within the second region, the diode including a plurality of anode regions and a plurality of cathode regions. The semiconductor device further includes a first electrical connection between the first terminal of the lateral FET and the anode regions of the diode, and a second electrical connection between the second terminal of the lateral FET and the cathode regions of the diode. The first and second electrical connections are disposed over a surface of the substrate. | 06-16-2011 |
| 20090321784 | Semiconductor Device and Method of Forming Lateral Power MOSFET with Integrated Schottky Diode on Monolithic Substrate - A monolithic semiconductor device has an insulating layer formed over a first substrate. A second substrate is disposed over the first insulating layer. A power MOSFET with body diode is formed over the second substrate. A Schottky diode is formed over the second substrate in proximity to the MOSFET. An insulation trench is formed within the second substrate between the MOSFET and Schottky diode. The isolation trench surrounds the MOSFET and first Schottky diode. A first electrical connection is formed between a source of the MOSFET and an anode of the Schottky diode. A second electrical connection is formed between a drain of the MOSFET and a cathode of the Schottky diode. The Schottky diode reduces charge build-up within the body diode and reverse recovery time of the first power MOSFET. The power MOSFET and integrated Schottky can be used in power conversion or audio amplifier circuit. | 12-31-2009 |
| 20090283826 | Semiconductor Device and Method of Forming High Voltage SOI Lateral Double Diffused MOSFET with Shallow Trench Insulator - A semiconductor device has a buried oxide layer formed over a substrate. An active silicon layer is formed over the buried oxide layer. A drain region is formed in the active silicon layer. An LDD drift region is formed in the active silicon layer adjacent to the drain region. The drift region has a graded doping distribution. A co-implant region is formed in the active silicon. A source region is formed in the co-implant region. A shallow trench insulator is formed along a top surface of the LDD drift region. The shallow trench isolator has a length less than the LDD drift region. The shallow trench insulator terminates under the polysilicon gate and within the LDD drift region. A polysilicon gate is formed above the active silicon layer between the source region and LDD drift region and at least partially overlapping the shallow trench insulator. | 11-19-2009 |
| 20090014791 | Lateral Power MOSFET With Integrated Schottky Diode - A semiconductor device includes a substrate. The substrate includes a semiconductor material. An electrically isolated region is formed over the substrate. A metal-oxide-semiconductor field-effect transistor (MOSFET) is formed over the substrate within the electrically isolated region. The electrically isolated region includes a trench formed around the electrically isolated region. An insulative material such as silicon dioxide (SiO2) may be deposited into the trench. A diode is formed over the substrate within the electrically isolated region. In one embodiment, the diode is a Schottky diode. A metal layer may be formed over a surface of the substrate to form an anode of the diode. A first electrical connection is formed between a source of the MOSFET and an anode of the diode. A second electrical connection is formed between a drain of the MOSFET and a cathode of the diode. | 01-15-2009 |
| 20080296690 | Metal interconnect System and Method for Direct Die Attachment - Provided herein is an exemplary embodiment of a semiconductor chip for directly connecting to a carrier. The chip includes a metal layer applied to a top surface of the chip; a passivation layer applied over the metal layer such that portions of the passivation layer is selectively removed to create one or more openings (“bond pads”) exposing portions of the metal layer and one or more solderable metal contact regions formed on each of the one or more openings. The solderable metal contact regions electrically connect to the carrier when the chip is positioned face down on the carrier, supplied with a thin layer of solder and heated. | 12-04-2008 |
