| General Dynamics Advanced Information Systems, Inc Patent applications |
| Patent application number | Title | Published |
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| 20110215831 | LOW POWER TELEMETRY SYSTEM AND METHOD - A telemetry system is described in which a plurality of channels are coupled to a bus. A control subsystem controls the channels so that one of the channels presents to the bus during its designated time period a channel characteristic. The control subsystem interrogates in the analog domain each of the channels during its designated time period, and forms a signal representative of the channel characteristic. The control subsystem may combine one or more of the signals into a digital packet, and transmit the same over a network. Each channel in the telemetry system can include a sample-and-hold circuit, a variable resistor circuit, and a control element. The sample-and-hold circuit is configured to hold a sample of a signal. The variable resistor circuit is configured to present a variable impedance to one or more signal lines during a time period designated for the channel an impedance representative of the sample held by the sample-and-hold circuit. The control element is configured to control the variable resistor circuit to present to the one or more signal lines an open circuit equivalent impedance during times other than the time period designated for the channel. In some implementations, the channel also includes a switch which decouples the sample-and-hold circuit from the variable resistor circuit during times other than the time period designated for the channel. In some implementations, the control element is a programmable control element that is programmable with a unique channel identifier, and may include a timing element which is updated responsive to a control signal. The programmable control element determines that the designated time period for the channel is occurring or will occur based on a comparison of the contents of the timing element with the unique channel identifier. The control element can be a zero power control element. | 09-08-2011 |
| 20110067235 | Methods for filling holes in printed wiring boards - The invention comprises methods for filling holes in printed wiring boards and printed wiring boards produced by these methods. The methods involve plating metal conductors inside the holes of the printed wiring boards while protecting the conducting surfaces of the printed wiring boards from being plated using photoresist film. The side surfaces of a printed wiring board are covered with photoresist. The photoresist is exposed to developing light, except the photoresist covering the holes on one side of the board is masked to prevent exposure of the holes to the developing light. The undeveloped photoresist covering the holes is removed. The board is subjected to a plating process, which deposits conductive materials in the holes, but the photoresist on the conducting surfaces of the board prevents conductive materials to be plated on the surfaces of the board. | 03-24-2011 |
| 20100277712 | ENTANGLED-PHOTON RANGE FINDING SYSTEM AND METHOD - A method of determining a distance to an object is presented. A first photon and a second photon are simultaneously generated. The first photon is reflected off an object. The second photon is directed to an optical cavity. An arrival of the first photon is correlated with an arrival of the second photon, and the distance to the object is at least partially determined using the correlation. | 11-04-2010 |
| 20100213976 | Hierarchical FPGA configuration - A system for configuring programmable logic devices includes a serial data bus, a first device to fan-out data signals on the serial data bus, a second device to fan-in data signals on the serial data bus, and a control device that uses the first device and the second device to configure the serial data bus. The system configures a set of programmable logic devices by using the control device to configure the serial data bus such that the set of programmable logic devices are in communication with the serial data bus, and by sending configuration information to the set of programmable logic devices. A method for configuring programmable logic devices includes configuring a first programmable logic device such that the first programmable logic device includes signaling logic to fan-out configuration information, and using the first programmable logic device to configure at least two secondary programmable logic devices in parallel using the signaling logic to fan-out configuration information. | 08-26-2010 |
| 20100185566 | Apparatus and method for problem solving using intelligent agents - The present invention relates to a system and method for problem solving using intelligent agents. The intelligent agents may be embodied as processor-readable software code stored on a processor-readable medium. The intelligent agents may include a brain agent to parse the input and direct the parsed input query to other intelligent agents within the system. The apparatus and method may use, for example, a personality agent, a language agent, a knowledge agent, a mood agent, a visual agent, sound agent, a tactile agent, and a smell/taste agent and various connectors to external data sources or other intelligent systems to interpret questions and provide responses back to the user. The apparatus and method may further parse questions in a conceptual manner. The apparatus and method may further optimize its system performance by evolving with and reacting to specific user interactions. Thus, the present invention may be configured to receive a human question and to output a human answer. | 07-22-2010 |
| 20100180680 | INCLINED AXIS GRAVITY GRADIOMETER - Systems for and methods of detecting gravitational acceleration and gravity gradients are disclosed. The systems and methods include gravity gradiometers whose axes are substantially horizontal. In comparison with prior art systems, the systems presently disclosed provide one or both of more accurate measurements for the same amount of space, and smaller space requirements with the same or better accuracy. | 07-22-2010 |
| 20090237179 | System and method for using MEMS filter bank - A method and apparatus for recovering at least one signal of interest are provided. The method includes receiving an overall signal, the overall signal including the at least one signal of interest and a plurality of other signals, identifying at least one of the strongest components of the plurality of other signals, attenuating, using at least one MEMS resonator, any of the components identified by the identifying, wherein the overall signal will be modified to include the at least one signal of interest, attenuated versions of the components identified by the identifying, and the remaining portions of the plurality of other signals that were not subject to the attenuating, and recovering, after the attenuating, the at least one signal of interest. | 09-24-2009 |
| 20090149039 | System and method for interconnecting circuit boards - A connector system is provided. The system includes a substantially circular interconnecting hub, and a plurality of circuit board bays configured substantially radially around the substantially circular interconnecting hub. Each circuit board bay has a plurality of aligned connectors configured to receive a circuit board. The interconnecting circuit hub has, for each individual circuit board bay, a direct data pathway connecting the individual circuit board bay to all remaining circuit board bays of the plurality of circuit board bays. Each of the plurality of circuit board bays can directly communicate through the interconnecting hub with each of the remaining circuit boards bays. | 06-11-2009 |
| 20080276031 | Method and apparatus for a federation control plane in an orthogonal system - A method of and architecture for controlling board elements in an orthogonal system architecture is provided. The method and architecture preferably utilize an internal bus architecture between control boards, such that a first control board can access board elements in its stack via I/O on a second control board and the second control board can access board elements in its stack via I/O on the first control board. Most preferably the internal bus architecture is a HyperTransport bus architecture. | 11-06-2008 |
