Floadia Corporation Patent applications |
Patent application number | Title | Published |
20150311219 | Non-Volatile Semiconductor Storage Device - To propose a non-volatile semiconductor memory device capable of injecting charge into a floating gate by source side injection even in a single-layer gate structure. In a non-volatile semiconductor memory device ( | 10-29-2015 |
20150262666 | Non-Volatile Semiconductor Storage Device - Provided is a non-volatile semiconductor memory device capable of reliably preventing a malfunction of a read transistor without increasing the number of bit lines. In a non-volatile semi conductor memory device ( | 09-17-2015 |
20140291746 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - A non-volatile semiconductor memory device is proposed that has an unprecedented novel structure in which carriers can be injected into a floating gate by applying various voltages of the same polarity. According to the non-volatile semiconductor memory device of the present invention, in a memory transistor, a PN junction is formed at the boundary between a channel region and an opposite polarity type impurity diffusion layer, to allow a floating gate to be charged to have the same polarity as the polarity of the channel region, whereby a part of electrons accelerated in a depletion layer between the channel region and an opposite polarity type extension region, and secondary electrons generated by the accelerated electrons can be injected into the floating gate by being attracted to a gate electrode, as a result of which electrons can be injected into the floating gate even when, without simultaneously applying positive and negative voltages as in the conventional case, various voltages of the same polarity are applied to the floating gate, an impurity diffusion layer, and the opposite polarity type impurity diffusion layer. | 10-02-2014 |
20140284677 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - In a non-volatile semiconductor memory device, it is only necessary that, at the time of data writing, a voltage drop is caused in a high resistance region. Therefore, the value of voltage applied to a gate electrode can be reduced as compared with a conventional device. In correspondence with the reduction in the value of applied voltage, it is possible to reduce the film thickness of a gate insulating film of memory transistors, and further the film thickness of the gate insulating film of a peripheral transistor for controlling the memory transistors. As a result, the circuit configuration of the non-volatile semiconductor memory device can be reduced in size as compared with the conventional device. | 09-25-2014 |