| ESS Technology, Inc. Patent applications |
| Patent application number | Title | Published |
|---|
| 20110231695 | DIGITAL FORCED OSCILLATION BY DIRECT DIGITAL SYNTHESIS - An opportunity is apparent to develop alternative circuitry. Simplified circuitry without artifacts tied to the clock that drives a digital frequency generator (DFG) is useful in a variety of tunable electronic devices. The present invention relates to digital frequency generation. In particular, it relates to a method and apparatus for the digital generation of a pulse stream having a desired frequency relative to a reference clock signal and the ratio of two integers. The method applies generally to integers whose ratio is not an integer. The DFG as a device can be integrated onto a simple chip, without need for an off-chip filter. | 09-22-2011 |
| 20110140757 | Analog Processing Elements In A Sum of Products - The technology relates to analog processing of a sum of products. | 06-16-2011 |
| 20110140743 | Digital Frequency Generator - A digital frequency generator is described. | 06-16-2011 |
| 20110140738 | Multi-Phase Integrators in Control Systems - Multi-phase integrators in control systems are described. | 06-16-2011 |
| 20100118173 | Method and apparatus for controlling charge transfer in CMOS sensors with an implant by the transfer gate - An improved CMOS sensor integrated circuit is disclosed, along with methods of making the circuit and computer readable description' s of the circuit. | 05-13-2010 |
| 20080285698 | DIGITAL FORCED OSCILLATION BY DIRECT DIGITAL SYNTHESIS - An opportunity is apparent to develop alternative circuitry. Simplified circuitry without artifacts tied to the clock that drives a digital frequency generator (DFG) is useful in a variety of tunable electronic devices. The present invention relates to digital frequency generation. In particular, it relates to a method and apparatus for the digital generation of a pulse stream having a desired frequency relative to a reference clock signal and the ratio of two integers. The method applies generally to integers whose ratio is not an integer. The DFG as a device can be integrated onto a simple chip, without need for an off-chip filter. | 11-20-2008 |
