| EPworks CO., LTD. Patent applications |
| Patent application number | Title | Published |
|---|
| 20110272729 | WAFER LEVEL LED INTERPOSER - A wafer level LED interposer and its manufacturing method is provided. The wafer level LED interposer includes: a LED chip of which N-type electrode and p-type electrode are formed on the upper side; an interposer substrate formed with through vias at each position corresponding to the N-type electrode and the p-type electrode and bonded to the upper side of the LED chip, wherein the N-type electrode and p-type electrode are connected to each through via; a redistribution layer formed on the upper surface of the interposer substrate and electrically connected to the through vias; a solder resist layer coated on the upper surface of the interposer substrate for a part of the redistribution layer selectively to be opened; and an external connector formed at the position where the redistribution layer is opened. | 11-10-2011 |
| 20110081289 | METHOD FOR REGENERATING SILICON FROM SILICON WASTE AND SILICON MANUFACTURED USING THE SAME - A method for regenerating silicon from silicon waste includes: placing and mixing silicon waste, a solvent having pH of approximately 5 to approximately 6, and a surfactant within a container; and injecting air into the container to separate floating matters and precipitates. Accordingly, since silicon is easily separated from the silicon waste, the regeneration yield of silicon is increased. Since the regenerated silicon is recyclable, it may be possible to obtain important substitution effect of high-purity silicon the entire amount of which depends on import. Moreover, environmental pollution may be reduced because the amount of the silicon waste disposed of by burial is decreased. | 04-07-2011 |
| 20100193903 | THREE DIMENSIONAL SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME AND ELECTRICAL CUTOFF METHOD FOR USING FUSE PATTERN OF THE SAME - Provided is a three-dimensional semiconductor device. The three-dimensional semiconductor device includes a body in which a plurality of semiconductor chips or packages are stacked, a protective substrate configured to protect an outer layer chip or package of the body and configured to transmit a laser beam, and a fuse pattern portion having a pattern of a fuse function formed to cut off an electrical connection of a defective chip or package by the laser beam penetrating the protective substrate when at least one of the chips or packages is defective. | 08-05-2010 |
