| 20090015298 | Output buffer circuit - In the case of a conventional output buffer circuit, it is difficult to adjust rising and falling times of a signal outputted from each of differential output terminals (OUTP/OUTN). Provided is an output buffer circuit including: a delay circuit including a first, second and third delay paths coupled to a first, second and third nodes, respectively, each of the first, second, and third delay paths performing time shifting transmission for the input signal, thereby extracting a first, second and third signals from the first, second and third nodes, respectively; a first output buffer coupled from the first node to drive an output terminal in response to the first signal; a second output buffer coupled from the second node to drive the output terminal in response to the second signal; and a third output buffer coupled from the third node to drive the output terminal in response to the third signal. | 01-15-2009 |
