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Efficient Memory Technology

Efficient Memory Technology Patent applications
Patent application numberTitlePublished
20100138587SHUNTED INTERLEAVE FOR ACCESSING PLURAL MEMORY BANKS, PARTICULARLY THOSE HAVING PARTIALLY ACCESSED CELLS CONTAINING DATA FOR CACHE LINES - A bank select device has a plurality of addressable locations and a plurality of storage locations correlated to each other so that each storage location is correlated to plural addressable locations and each addressable location is correlated to one storage location. Each storage location contains a respective bank select. The addressable locations and storage locations are grouped into interleave patterns such that, for each pattern, there are Q storage locations and 206-03-2010
20090043943METHOD AND APPARATUS OF MULTIPLE ABBREVIATIONS OF INTERLEAVED ADDRESSING OF PAGED MEMORIES AND INTELLIGENT MEMORY BANKS THEREFOR - An interleaved addressing technique for addressing a plurality of memory banks (02-12-2009