| EDXACT Patent applications |
| Patent application number | Title | Published |
|---|
| 20100036516 | FILTERING OF SMALL VALUES FOR THE VERIFICATION OF INTEGRATED CIRCUITS - The invention relates to a method of simulating an electronic circuit, represented in the form of masks and connections, comprising:
| 02-11-2010 |
| 20100004886 | SYSTEM FOR CALCULATING RESISTIVE VALUES FOR MICROELECTRONICS CAD - The invention relates to a method of calculating resistive values of an electronic circuit represented in the form of masks and connections, comprising: a) definition of the circuit in the form of a first list of electrical components and connections between them; b) identification of circuit entry and exit ports; c) selection of part of the resistive components of the circuit alone; d) production of a matrix of resistances of the resistive components alone selected in the previous step; and e) calculation of equivalent resistances. | 01-07-2010 |
