| dpiX LLC Patent applications |
| Patent application number | Title | Published |
|---|
| 20100091149 | ESD INDUCED ARTIFACT REDUCTION DESIGN FOR A THIN FILM TRANSISTOR IMAGE SENSOR ARRAY - A method is provided for fabricating an image sensor array in a manner that reduces the potential for defects resulting from electrostatic discharge events during fabrication of the image sensor array. The method includes: forming at least one pixel over a substrate, the pixel including a switching transistor and a photo-sensitive cell; and forming a dielectric interlayer over the pixel. A key step in the method of the present invention is depositing a first conductive layer over the dielectric interlayer. After the first conductive layer is formed, the image sensor array is well protected from ESD events because the first conductive layer spreads out any charge induced by tribo-electric charging events that may occur during subsequent fabrication processing steps, thereby reducing the potential for localized damage to the switching transistors upon the occurrence of ESD events. | 04-15-2010 |
| 20080237481 | Corrosion barrier layer for photoconductive X-ray imagers - Improved corrosion resistance for direct X-ray imaging detectors is obtained by providing a pixelated, electrically conductive barrier layer between the X-ray sensitive material and the pixel electrodes. Each barrier layer can cover part or all of its corresponding pixel electrode. In cases where pixel electrodes makes contact to underlying circuitry through vertical vias, it is preferred for the barrier layers to cover the via sections of the pixel electrodes. The barrier layers for each pixel electrode can be spaced apart from each other, or they can all be included within a continuous film on top of the pixel electrodes. Such a continuous film can be pixelated by spatially modulating its properties (e.g., thickness, doping) to significantly reduce lateral conductivity from pixel to pixel. | 10-02-2008 |
