| CYPRESS SEMICONDUCTOR CORPORATION Patent applications |
| Patent application number | Title | Published |
|---|
| 20120113718 | 5T HIGH DENSITY NVDRAM CELL - A memory circuit includes a high voltage region providing storage of a nonvolatile bit, and a low voltage region providing at least partial storage of a volatile bit. The high and low voltage regions are isolated from one another and formed by a plurality of transistors in series between a current source and a bit line. | 05-10-2012 |
| 20120105362 | SYNCHRONIZING A STYLUS WITH A CAPACITIVE SENSE ARRAY - A system and method for tracking a stylus on a capacitive sense array. The system comprising the capacitive sense array configured to detect a presence of the stylus, a processing device to generate a synchronization signal, and a transmitter to transmit the synchronization signal to the stylus to synchronize the stylus to the capacitive sense array. The system further comprises a magnetic antenna configured to inductively transmit the synchronization signal to the stylus, wherein the magnetic antenna is disposed around the outer edges of the capacitance sense array, according to an embodiment of the invention. | 05-03-2012 |
| 20120105361 | CAPACITIVE STYLUS WITH PALM REJECTION - A system comprising a sensing device and a capacitive sense array configured to detect a presence of a passive touch object and a stylus where the capacitive sense array receives a transmit signal from the stylus via capacitive coupling. The system further comprising a processing device configured to determine the stylus location on the capacitive sense array based on the transmit signal and to synchronize the stylus to the capacitive sense array. | 05-03-2012 |
| 20120098783 | Flexible Capacitive Sensor Array - A method for detecting force applied to a capacitive sensor array and compensating for coordinate inaccuracy due to force includes receiving a plurality of capacitance measurements from the capacitive sensor array, where the plurality of capacitance measurements includes a first capacitance measurement and a second capacitance measurement, and detecting pressure on the capacitive sensor array based on a comparison between the first capacitance measurement and the second capacitance measurement. | 04-26-2012 |
| 20120096301 | MEMORY INTERFACE CONFIGURABLE FOR ASYNCHRONOUS AND SYNCHRONOUS OPERATION AND FOR ACCESSING STORAGE FROM ANY CLOCK - An improved memory interface circuit is provided for accessing a storage array in one of two available modes, including a synchronous mode and an asynchronous mode. The improved memory interface circuit also includes logic, which enables the storage array to reside within substantially any clock domain. | 04-19-2012 |
| 20120086666 | Force Sensing Capacitive Hybrid Touch Sensor - A method for detecting a magnitude of force applied to a capacitive sensor array may comprise receiving a plurality of capacitance measurements affected by a contact at a touch-sensing surface, and determining a magnitude of a force applied to the touch-sensing surface at a location of the contact based on the location of the contact and a capacitance measurement of the first plurality of capacitance measurements. | 04-12-2012 |
| 20120084470 | Utilitzing USB Resources - At least one downstream interface may be configured to be simultaneously connected to both a USB 3.0 compliant device and a USB 2.0 compliant device. The interface may be used for communicating with a USB 3.0 compliant device via a downstream port and simultaneously communicating with a USB 2.0 compliant device via the downstream port. | 04-05-2012 |
| 20120078441 | WIRELESS LOCATING AND MONITORING SYSTEM - A wireless tracking device including a positioning system for determining a location of the device and a processor connected to the positioning system. The wireless tracking device further including a wireless radio connected to the processor for transmitting the location of the device across a wireless area network. | 03-29-2012 |
| 20120068964 | CAPACITIVE STYLUS FOR A TOUCH SCREEN - A system comprising a sensing device and a capacitive sense array configured to track the position of a stylus and synchronize the capacitive sense array to the stylus transmit signal. The system is configured to track the position of both a stylus and a passive touch object. The system is further configured to track the position of the stylus using self capacitance sensing and track the position of the passive touch object using mutual capacitance sensing. The system further configured to modulate the stylus transmit signal to include additional data to support additional stylus functions. | 03-22-2012 |
| 20120046104 | Method and Apparatus For Sensing the Force With Which a Button is Pressed - An example method includes measuring a capacitance of an actuator and a conductive element when, responsive to a force applied to the actuator, the actuator is coupled to a reference voltage and deformed such that surface area of the actuator proximate to the conductive element increases. The example method includes determining the force applied to the actuator based on the measured capacitance. | 02-23-2012 |
| 20120044201 | APPARATUS AND METHODS FOR DETECTING A CONDUCTIVE OBJECT AT A LOCATION - A method and apparatus to detect a conductive object at a location determines a capacitance variation of a first sensor element and a capacitance variation of a second sensor element. The method and apparatus detects a touch at a first location if the capacitance variation of the first sensor element is greater than a reference value and the capacitance variation of the second sensor element is not greater than the reference value. The method and apparatus detects the touch at a second location if the capacitance variation of the first sensor element is not greater than the reference value and the capacitance variation of the second sensor element is greater than the reference value. The method and apparatus detects the touch at a third location if the capacitance variation of the first sensor element and the capacitance variation of the second sensor element are both greater than the reference value. | 02-23-2012 |
| 20120044199 | Capacitance Scanning Proximity Detection - A method and apparatus for scanning a first set of electrodes of a capacitive sense array using a first sensing mode to identify a presence of an object in proximity to the capacitive sense array, where scanning using the first sensing mode identifies objects not in physical contact with the capacitive sense array. The first set of electrodes is scanned using a second sensing mode to determine a location of the object in relation to the capacitive sense array, where rescanning using the second sensing mode determines locations of objects in physical contact with the capacitive sense array. | 02-23-2012 |
| 20120044198 | SELF SHIELDING CAPACITANCE SENSING PANEL - A self-shielding capacitive sensor array may include a first plurality of sensor elements and a second plurality of sensor elements, where each of the second plurality of sensor elements intersects each of the first plurality of sensor elements, such that each of the first plurality of sensor elements may be capacitively coupled with each of the second plurality of sensor elements. The first plurality of sensor elements may be configured to shield each of the second plurality of sensor elements from a noise source. | 02-23-2012 |
| 20120044197 | Capacitive Sensor Arrangement - An example capacitive sensor arrangement includes an integrated member residing within an interior region of a capacitive sensor element. The capacitive sensor element has a first resistance to a flow of current and the integrated member has a second resistance to the flow of current that is less than the first resistance. | 02-23-2012 |
| 20120044193 | TRACE PATTERN FOR TOUCH-SENSING APPLICATION - One embodiment of a capacitive sensor array comprises a plurality of row sensor elements including a first row sensor element, a plurality of column sensor elements including a first column sensor element, and a plurality of unit cells, wherein a first unit cell contains an intersection between the first row sensor element and the first column sensor element, and wherein a ratio between 1) a boundary length between the first row sensor element and the first column sensor element within the first unit cell and 2) a perimeter of the first unit cell is greater than √{square root over (2)}/2. | 02-23-2012 |
| 20120044188 | Method and Apparatus for Identification of Touch Panels - A method for configuring a touchscreen controller may include identifying a model of a touchscreen by measuring a capacitance or resistance of at least one element integrated in the touchscreen, identifying the model of the touchscreen based on the measured capacitance or resistance, and configuring the touchscreen controller based on the identified model of the touchscreen. | 02-23-2012 |
| 20120044187 | Capacitive Touch Screen - One embodiment in accordance with the invention can include a capacitive touch screen. The capacitive touch screen includes a substantially transparent substrate and a plurality of electrodes formed on the substantially transparent substrate. The plurality of electrodes are substantially parallel in a first direction and each of the plurality of electrodes includes a layer of light altering material. | 02-23-2012 |
| 20120044150 | Touch Identification for Multi-Touch Technology - A method of operating a touch-sensing surface may include determining a first plurality of contact locations including a first contact location, determining a second plurality of contact locations including a second contact location, performing a first correlation process for correlating the second contact location with the first contact location when the number of contacts is less than or equal to a first threshold number, and performing a second correlation process for correlating the second contact location with the first contact location when the number of contacts is greater than a second threshold number. | 02-23-2012 |
| 20120043977 | Mutual Capacitance Sensing Circuits, Methods and Systems - A capacitance sensing system may include a first selection circuit that couples N electrodes of a first electrode set to a capacitance sense circuit; and a second selection circuit that couples M electrodes of a second electrode set, substantially simultaneously, to a signal generator circuit as a group to induce current in the N electrodes by mutual capacitance between the M and N electrodes; wherein N is at least one, and M>N. | 02-23-2012 |
| 20120043971 | METHODS AND CIRCUITS FOR MEASURING MUTUAL AND SELF CAPACITANCE - A capacitance measurement circuit for measuring self and mutual capacitances may include a first electrode capacitively coupled with a second electrode, a first plurality of switches coupled with the first electrode, and a second plurality of switches coupled with the second electrode, wherein, during a first operation stage, the first plurality of switches is configured to apply a first initial voltage to the first electrode and the second plurality of switches is configured to apply a second initial voltage to the second electrode, and wherein, during a second operation stage, the first plurality of switches is configured to connect the first electrode with a measurement circuit, and the second plurality of switches is configured to connect the second electrode with a constant voltage. | 02-23-2012 |
| 20120043970 | Automatic Tuning of a Capacitive Sensing Device - An apparatus, system and method for automatically tuning a capacitance sensor based on comparisons of measured capacitance values to expected values and ranges of values is described. Measured capacitance is converted to a digital value with a capacitance to digital converter. The digital value is use to adjust the range, resolution, baseline offset and thresholds of the capacitance sensor according to logic executed by a controller and stored in programs in a memory. | 02-23-2012 |
| 20120043141 | Toothed Slider - An example method includes measuring a capacitance variation of a first conductive element and a capacitance variation of a second conductive element. The example method includes calculating a centroid position through the measured capacitance variation of the first conductive element and the measured capacitance variation of the second conductive element. A conductive sub-element of the first conductive element may be interleaved with a conductive sub-element of the second conductive element. The conductive sub-element of the first conductive element and the conductive sub-element of the second conductive element may each have a varying width. | 02-23-2012 |
| 20120043140 | TOUCH SENSING - In one embodiment, an apparatus comprises a plurality of capacitors, each having a first electrode and a second electrode. The apparatus includes charging circuitry coupled to the first electrodes and sensing circuitry coupled to the second electrodes, the sensing circuitry configured to detect changes in capacitance across the capacitors responsive to movement of an input object relative to the apparatus. Interpolating circuitry identifies which one of the capacitors is nearest to the input object according to the detected capacitance changes. | 02-23-2012 |
| 20120014202 | MEMORY DEVICE AND METHOD - A method of accessing a memory device multiple times in a same time period can include, in a first sequence of accesses, starting an access operation to one of a plurality of banks in synchronism with a first part of a first clock cycle and starting an access operation to another of the plurality of banks in synchronism with a second part of the first clock cycle, each bank having separate access circuits; and the time between consecutive accesses is faster than an access speed for back-to-back accesses to a same one of the banks; wherein during the access operations, storage locations of each bank are accessed in a same time period | 01-19-2012 |
| 20120008378 | MEMORY DEVICES AND METHODS HAVING MULTIPLE ADDRESS ACCESSES IN SAME CYCLE - A memory device can include a plurality of banks, each bank including memory locations accessible by different access circuits; at least a first address port configured to receive addresses on falling and rising edges of a timing clock, each address corresponding to locations in different banks; and at least two read/write data ports configured to receive write data for storage in one of the banks, and output read data from one of the banks. | 01-12-2012 |
| 20120005693 | Development, Programming, and Debugging Environment - A method includes receiving hardware description code that generically describes circuitry, and translating the hardware description code into one or more configuration files specific to a programmable system. The method further includes generating program code for a microcontroller of the programmable system based, at least in part, on the hardware description code, and configuring the programmable system to implement the circuitry according to the configuration files and the program code. | 01-05-2012 |
| 20110316756 | ANTENNA WITH MULTIPLE FOLDS - An example antenna includes a first end portion, a second end portion, and an intermediate portion between the first end portion and the second end portion. The intermediate portion includes multiple folds. The second end portion includes a first conductor to couple with a communication interface of a communication module, and a second conductor to couple with a ground. | 12-29-2011 |
| 20110316567 | Lattice Structure for Capacitance Sensing Electrodes - One embodiment of a capacitive sensor array may comprise a first plurality of sensor elements and a second sensor element comprising a main trace, where the main trace intersects each of the first plurality of sensor elements to form a plurality of intersections. A unit cell may be associated with each of the intersections, and each unit cell may designate a set of locations nearest to the corresponding intersection. A contiguous section of the main trace may cross at least one of the plurality of unit cells. Within each unit cell, the second sensor element may comprise at least one primary subtrace branching away from the main trace. | 12-29-2011 |
| 20110308955 | INTEGRATED SHIELDING FOR WAFER PLATING - A semiconductor substrate carrier for use during wet chemical processing may comprise a conductive flange to couple the carrier with processing equipment, a frame coupled with the conductive flange, where the frame is configured to hold a semiconductor substrate, and an integrated shield coupled with the frame. The integrated shield is configured to alter an electric field near at least a portion of a surface of the semiconductor substrate during the wet chemical processing. | 12-22-2011 |
| 20110304354 | UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING - A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other mirco-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O. | 12-15-2011 |
| 20110283057 | Microcontroller Programmable System on a Chip - Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks. | 11-17-2011 |
| 20110261489 | ESD TRIGGER FOR SYSTEM LEVEL ESD EVENTS - A circuit includes first logic that generates a first signal suitable to activate at least one ESD clamp in response to an electrostatic discharge (ESD) event having a first severity or a second severity higher than the first severity, and second logic that generates a second signal suitable to activate the ESD clamp in response to the ESD event having the second severity, the second signal time multiplexed with the first signal. | 10-27-2011 |
| 20110252162 | MEMORY SYSTEM AND METHOD - In an embodiment, an apparatus includes a memory controller configured to control a plurality of daisy chained memory components connected over a daisy chained bus. The daisy chained bus includes a direct connection from the transmit interface of the memory controller to a receive interface of an initial memory component, and a daisy chain connection from a transmit interface of the initial memory component to a receive interface of a next memory component. A bus extends from a transmit interface of a last memory component directly to a receive interface of the memory controller. | 10-13-2011 |
| 20110248153 | Optical Navigation System Having A Filter-Window To Seal An Enclosure Thereof - An optical navigation system and method are provided. In one embodiment, the system includes: (i) a coherent light source to emit light to illuminate a portion of a finger; and (ii) a detector to receive light reflected from the portion of the finger, the detector including a speckle-based sensor configured to sense movement of the finger relative to the detector based on changes in a complex interference pattern created by the light reflected from the portion of the finger. Other embodiments are also described. | 10-13-2011 |
| 20110234264 | Load Driver - A method for driving a load includes driving a load to an initial voltage within a voltage window, the voltage window based on an input voltage and an offset voltage, and driving the load to approximately the input voltage. | 09-29-2011 |
| 20110208329 | CLOCK SYNTHESIS SYSTEMS, CIRCUITS AND METHODS - A clock synthesis system may include a feed forward divider circuit configured to divide a source clock signal by one of a plurality of integers in response to a select signal to generate a reference clock that is synchronous to a synchronous pulse; a modulator that modulates the select signal in response to at least a difference value; a multiplier circuit that frequency multiplies the reference clock to generate an output clock; and a timing circuit that generates the difference value in response to the source clock and synchronous pulse. | 08-25-2011 |
| 20110176647 | CIRCUIT, SYSTEM AND METHOD FOR MULTIPLEXING SIGNALS WITH REDUCED JITTER - An apparatus having a plurality of power supply domains and a plurality of logic components. Each of the plurality of logic components residing within a different one of the plurality of power supply domains. Each of the plurality of logic components is configured to operate with a corresponding clock signal within a respective one of the plurality of power supply domains. | 07-21-2011 |
| 20110169814 | DIGITAL DRIVING CIRCUITS, METHODS AND SYSTEMS FOR LIQUID CRYSTAL DISPLAY DEVICES - A method may include controlling a display device in at least first mode by varying a correlation between display driver signals applied across display segments within the display device; wherein the display driver signals vary between substantially only two levels, and a display segment is activated when an average voltage magnitude across the segment over a time period exceeds a threshold value. | 07-14-2011 |
| 20110156724 | CAPACITANCE MEASUREMENT SYSTEMS AND METHODS - A first capacitor and a second capacitor are charged until voltage at the second capacitor settles to a settling voltage. While charging, the first capacitor is alternately switched between a current source and ground. When the settling voltage is reached, charging of the first capacitor is halted. The second capacitor continues to be charged until voltage at the second capacitor reaches a reference voltage. The amount of time it takes for the settling voltage to reach the reference voltage corresponds to a measure of capacitance on the first capacitor. | 06-30-2011 |
| 20110115729 | METHOD AND APPARATUS FOR REDUCING COUPLED NOISE INFLUENCE IN TOUCH SCREEN CONTROLLERS - A method and apparatus for reducing influence of noise for touch screen controllers employing noise listening synchronization, delay lines, filtering and sensing selected touch screen electrodes. | 05-19-2011 |
| 20110026519 | DYNAMICALLY RECONFIGURABLE ANALOG ROUTING CIRCUITS AND METHODS FOR SYSTEM ON A CHIP - An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data. | 02-03-2011 |
| 20110025629 | Dynamic Mode Switching for Fast Touch Response - A method of operating a touch-sensing surface may include determining a presence of at least one conductive object at the touch-sensing surface by performing a search measurement of a first set of sensor elements of the touch-sensing surface, and in response to determining the presence of the at least one conductive object, determining a location of the at least one conductive object by performing a tracking measurement of a second set of sensor elements of the touch-sensing surface. | 02-03-2011 |
| 20110018829 | MUTUAL CAPACITANCE SENSING ARRAY - A method and apparatus for sensing a conductive object by a mutual capacitance sensing array is described according to an embodiment of the present invention. The mutual capacitance sensing array comprises one or more sensor elements. Each sensor element comprises an outer frame including a conductive material. A cavity is formed within the interior of the outer frame. | 01-27-2011 |
| 20110016374 | SERIAL INTERFACE DEVICES, SYSTEMS AND METHODS - A serial interface device may include a plurality of serial link connections that receive at least address values and at least one error detection code (EDC) on different serial link connections, the EDC generated from at least the address values. | 01-20-2011 |
| 20100312952 | Multiprocessor System Having an Input/Output (I/O) Bridge Circuit for Transferring Data Between Volatile and Non-Volatile Memory - A disclosed circuit includes circuitry for coupling to a volatile memory, circuitry for coupling to a nonvolatile NAND flash memory, and circuitry that: (i) receives a volatile memory request from a processor and satisfies the volatile memory request by accessing the volatile memory, and (ii) receives a nonvolatile NOR flash memory read request from the processor and satisfies the NOR read request by accessing both the NAND flash memory and the volatile memory. The circuit may also include circuitry that receives a volatile memory request from another processor and satisfies the volatile memory request from the other processor by accessing the volatile memory, and circuitry that receives a NAND flash memory read request from the other processor and satisfies the NAND read request by accessing the NAND flash memory. Multiprocessor systems including the circuit are described, as is a method for satisfying a NOR flash memory read request. | 12-09-2010 |
| 20100293325 | MEMORY DEVICES AND SYSTEMS INCLUDING MULTI-SPEED ACCESS OF MEMORY MODULES - A system, comprising: a plurality of modules, each module comprising a plurality of integrated circuits devices coupled to a module bus and a channel interface that communicates with a memory controller, at least a first module having a portion of its total module address space composed of first type memory cells having a first maximum access speed, and at least a second module having a portion of its total module address space composed of second type memory cells having a second maximum access speed slower than the first access speed. | 11-18-2010 |
| 20100287571 | DEVELOPMENT, PROGRAMMING, AND DEBUGGING ENVIRONMENT - A method includes receiving hardware description code that generically describes circuitry, and translating the hardware description code into one or more configuration files specific to a programmable system. The method further includes generating program code for a microcontroller of the programmable system based, at least in part, on the hardware description code, and configuring the programmable system to implement the circuitry according to the configuration files and the program code. | 11-11-2010 |
| 20100281145 | AUTONOMOUS CONTROL IN A PROGRAMMABLE SYSTEM - A programmable system includes a programmable analog system that is reconfigurable to perform various analog operations, and includes a programmable digital system that is reconfigurable to perform various digital operations. The programmable system also includes a microcontroller capable of reconfiguring and controlling the programmable analog system and the programmable digital system. The programmable digital system is configured to control the programmable analog system autonomously of the microcontroller. | 11-04-2010 |
| 20100275173 | Model For a Hardware Device-Independent Method of Defining Embedded Firmware for Programmable Systems - A processing device programming system automatically provides a user interface comprising a selectable list of one or more processing devices based on a system level solution, automatically generates an embedded programmable system solution from the system level solution and a processing device selected from the selectable list of one or more processing devices, and automatically programs the processing device according to the embedded programmable system solution. | 10-28-2010 |
| 20100264836 | LIGHTING ASSEMBLY, CIRCUITS AND METHODS - A circuit in accordance with one embodiment of the invention can include an LED drive circuit that may isolate a sense circuit from a supply voltage in a passive mode, and maintain a predetermined voltage difference between the sense circuit and the supply voltage in an operational mode. | 10-21-2010 |
| 20100228926 | MULTI-PORT MEMORY DEVICES AND METHODS - An integrated circuit device may include a first integrated circuit (IC) portion having a single memory port to access at least one memory array, the single port including a first set of address, control and data paths; and a second IC portion comprising at least a first memory port and a second memory port for providing access to the memory locations of the first IC portion through the single port of the first IC portion. | 09-09-2010 |
| 20100228908 | MULTI-PORT MEMORY DEVICES AND METHODS - An integrated circuit device may include a first integrated circuit (IC) portion having a single memory port to access at least one memory array, the single port including a first set of address, control and data paths; and a second IC portion comprising at least a first memory port and a second memory port for providing access to the memory locations of the first IC portion through the single port of the first IC portion. | 09-09-2010 |
| 20100156804 | MULTI-FINGER SUB-GESTURE REPORTING FOR A USER INTERFACE DEVICE - Touch sensor methods, devices and systems are disclosed. One embodiment of the present invention pertains to a method for reporting a sub-gesture on a touch sensing surface, e.g., laid over a display of a user interface device. The method comprises determining a number of fingers simultaneously placed on the touch sensing surface. The method also comprises periodically sampling respective position data of the fingers moving along the touch sensing surface and calculating event data based on the position data, wherein each of the event data includes a geometric shape associated with the number of fingers and a centroid of the geometric shape. The method further comprises forwarding the event data to a presentation layer of application of the user interface device, where the application is configured to identify a gesture based on a subset of the event data. | 06-24-2010 |
| 20100149115 | FINGER GESTURE RECOGNITION FOR TOUCH SENSING SURFACE - Touch sensor methods, devices and systems are disclosed. One embodiment of the present invention pertains to a method comprising monitoring a finger movement along a touch sensing surface based on position data of a finger touching the touch sensing surface, where the position data is obtained by locating a position of a force applied by the finger in a coordinate of the touch sensing surface. In addition, the method comprises generating direction data associated with the finger movement if the finger movement travels for more than a threshold distance. Furthermore, the method comprises determining a finger gesture which corresponds to the finger movement using a lookup table having multiple preconfigured finger gestures based on the direction data. | 06-17-2010 |
| 20100123411 | COMPENSATION METHOD AND CIRCUIT FOR LINE REJECTION ENHANCEMENT - An embodiment of the present invention is directed to a method and circuit to control light emitting diode (LED) output. The method includes receiving a line voltage signal which powers a lighting circuit comprising an LED and determining an adjustment of a threshold based on a variation of the line voltage signal and/or a controller delay or other practical controller limitation or imperfection. The method further includes dynamically adjusting a threshold or other reference of a controller which controls a switch of said lighting circuit for compensating for line variations to maintain a substantially uniform LED current. | 05-20-2010 |
| 20100082861 | MEMORY SYSTEM AND METHOD - In an embodiment, an apparatus includes a memory controller configured to control first and second memory components. A point-to-point data bus configured to pass data between the memory controller and the memory components may include a direct connection from each memory component to the memory controller. A daisy chained address bus configured to pass commands between the memory controller and the memory components may include a direct connection from the first memory component to the memory controller and a daisy chain connection from the first memory component to the second memory component. | 04-01-2010 |
| 20100079384 | CAPACITANCE TOUCH SCREEN - A touch screen is described. The touch screen is configured to have an array of conductive, optically transmissive sensor elements coupled to sensor circuitry. The sensor elements are disposed over a display to have a single layer of conductive, optically transmissive material positioned over pixels of the display. | 04-01-2010 |
| 20100079090 | Light Emitting Driver Circuit with Compensation and Method - A light emitting driver circuit, system, and method are provided. The driver circuit system and method can be implemented in various ways. An embodiment includes a bypass circuit which diverts current from the LEDs whenever a switch coupled to the LEDs incurs residual current when turned off. In an additional or alternative embodiment, the residual current can be sensed and the amount of residual current used to trigger fetching of a compensation value. That compensation value can change a dimming function forwarded to the switch in order to compensate for, offset, or substantially eliminate the residual current through that switch. | 04-01-2010 |
| 20100079083 | SYSTEM AND METHOD FOR REMOTE CONTROL LIGHTING - Remote lighting control methods, devices and systems are disclosed. One embodiment of the present invention pertains to a light device. The light device includes a light source for emitting light and a control circuit for setting an intensity level of the light source based on receipt of control data via a power line when the light device is electrically coupled to the power line. The control data is generated in response to user input to an input panel of a remote lighting control module for the light device. In addition, the light device comprises a unique address associated with a region on the input panel. | 04-01-2010 |
| 20100079074 | Light Emitting Driver Circuit with Bypass and Method - A light emitting driver circuit, system, and method are provided. The driver circuit system and method can be implemented in various ways. An embodiment includes a bypass circuit which diverts current from the LEDs whenever a switch coupled to the LEDs incurs residual current when turned off. In an additional or alternative embodiment, the residual current can be sensed and the amount of residual current used to trigger fetching of a compensation value. That compensation value can change a dimming function forwarded to the switch in order to compensate for, offset, or substantially eliminate the residual current through that switch. | 04-01-2010 |
| 20100074028 | Memory Architecture Having Two Independently Controlled Voltage Pumps - In embodiments described herein, a memory architecture has an array of non-volatile memory cells and a pair of independently controlled voltage pumps. The pair of voltage pumps is coupled for supplying both positive and negative voltage biases to the memory array during program and erase operations, such that a sum of the magnitudes of the positive and negative voltage biases is applied across a storage node of an accessed memory cell. | 03-25-2010 |
| 20100073090 | CURRENT SENSE AMPLIFIER - A system includes a current sense amplifier to receive an input voltage based on a sense current provided to load circuitry. The current sense amplifier is configured to generate an output voltage from the input voltage based, at least in part, on one or more reconfigurable characteristics of the current sense amplifier. The system also includes a microcontroller to compare the output voltage from the current sense amplifier to one or more programmable thresholds. The microcontroller is configured to direct a current controller to regulate the sense current provided to the load circuitry according to the comparison. | 03-25-2010 |
| 20100067551 | Method for Providing Packet Framing in a DSSS Radio System - An improved method of framing data packets in a direct sequence spread spectrum (DSSS) system that uses one pseudo-noise code (PN-Code) to frame the packet with a start-of-packet (SOP) and end-of-packet (EOP) indicator, and a different PN-Code to encode the data payload. Furthermore, the SOP is represented by the framing PN-Code, and the EOP is represented by the inverse of the framing PN-Code. This method creates a robust framing system that enables a DSSS system to operate with a low threshold of detection, thus maximizing transmission range even in noisy environments. Additionally, the PN-Code used for the SOP and EOP indicators can be used to indicate an acknowledgement response. | 03-18-2010 |
| 20090267534 | LIGHT EMITTING DIODE ASSEMBLY - A circuit in accordance with one embodiment of the invention can include a light emitting diode (LED) assembly comprising a plurality of LED channels that are controlled independently with a switch mode driver. The circuit also includes N+1 wires coupled to said LED assembly, where N is equal to the number of said plurality of LED channels of said LED assembly. | 10-29-2009 |
| 20090230289 | Pixel Structure Having Shielded Storage Node - A pixel structure having a shielded storage node. A pixel comprises a sample transistor coupled to a light detecting stage. The sample transistor comprises an inner junction region surrounding and coupled to a storage node and a gate disposed around at least three sides of the inner junction region that operates as a charge barrier to shield the storage node. A memory capacitor is coupled to the storage node. | 09-17-2009 |
| 20090170449 | CELLULAR COMMUNICATION DEVICE WITH WIRELESS POINTING DEVICE FUNCTION - A device includes a first wireless transceiver adapted to communicate over a cellular network, a second wireless transceiver adapted to communicate over a local network separate from the cellular network, and a mechanism adapted to report movement information to a computer via the second wireless transceiver. The mechanism is optionally an optical sensor reporting relative position information. The device is operable as both a cellular communication device and a computer pointing device. A button of the device is adapted to operate as a mouse button, and optionally, in some modes, controls operation of the cellular communication device. The second wireless transceiver optionally uses Universal Serial Bus protocol. The device optionally transfers files via the second wireless transceiver. In some usage scenarios, the device and a separate wireless pointing device communicate with a same computer and are used to operate an application, such as a gaming application. | 07-02-2009 |
| 20090160627 | POWER LINE COMMUNICATON FOR ELECTRICAL FIXTURE CONTROL - We disclose an apparatus capable of receiving control command data for one or more electrical fixtures and modulating an alternating current by modifying firing phase angles to transmit the data corresponding to the control commands via a power line transmitting the alternating current. | 06-25-2009 |
| 20090160369 | CONTROLLING A LIGHT EMITTING DIODE FIXTURE - One embodiment in accordance with the invention can include a circuit for controlling a light emitting diode (LED) lighting fixture via a power line. The circuit can include a power switch coupled to the power line and is for outputting a firing angle. Additionally, the circuit can include a control circuit coupled to the power switch and is for implementing firing angle control of the power switch. Furthermore, the circuit can include a translator coupled to receive the firing angle and for mapping the firing angle to a function of the LED lighting fixture. | 06-25-2009 |
| 20090160368 | Phase Control for Hysteretic Controller - A driver circuit, and light emitting system and method are provided. The driver circuit includes possibly a controller and a phase detector coupled to produce an intermittent output proportional to a value of an input relative to upper and lower threshold values, and a difference between the input signal, which is the intermittent output signal, and a reference value. The light emitting system can include a switch and at least one light emitting device coupled to the switch. The driver circuit can be coupled to forward the intermittent output signal to the switch that is active in proportion to current level through the light emitting device, rising and falling between the modifiable upper and lower threshold values. | 06-25-2009 |
| 20090153152 | COMPENSATION CIRCUIT FOR A TX-RX CAPACITIVE SENSOR - A capacitive sensor may include a transmit electrode and a receive electrode capacitively coupled with the transmit electrode. A capacitance sensing circuit senses a capacitance between the transmit and receive electrodes by applying a signal to the transmit electrode and rectifying a current waveform induced at the receive electrode. A compensation circuit reduces the effect of a mutual and parasitic capacitances of the transmit and receive electrode pair by adding a compensation current to the rectified current. | 06-18-2009 |
| 20090055592 | DIGITAL SIGNAL PROCESSOR CONTROL ARCHITECTURE - A system includes a control store memory populated with data path instructions indexable by control store addresses and jump addresses. The system further includes a control state machine to provide at least one control store address and at least one jump address to the control store memory, wherein the control store memory is configured to identify one or more data path instructions for both the control store address and the jump address. | 02-26-2009 |
| 20090024828 | METHOD AND SYSTEM OF DIGITAL SIGNAL PROCESSING - A system comprises a system interface to receive one or more instruction sets from a microcontroller and to receive digital data to be processed. The system further comprises a controller that is reconfigurable according to the one or more instruction sets received by the system interface. The system further comprises a data path device to perform digital filtering operations on the digital data as directed by the controller according to the reconfiguration of the controller by the one or more instruction sets. | 01-22-2009 |
| 20090009195 | METHOD FOR IMPROVING SCAN TIME AND SENSITIVITY IN TOUCH SENSITIVE USER INTERFACE DEVICE - System and method for optimizing the consumption of power while maintaining performance in capacitive sensor arrays. A limited sensing area is used to improve the update rate and sensitivity of a row/column array of capacitive sensors. According to one embodiment, a method is provided for scanning a plurality of capacitive sensors by: detecting a stimulus in the field of capacitive sensors, scanning the field of capacitive sensors to determine the position of the stimulus. Once the position of the stimulus is determined, a subsection of the field comprising window corresponding to the position of the stimulus remains activated while the remaining sensors in the field are deactivated. | 01-08-2009 |
| 20090009194 | NORMALIZING CAPACITIVE SENSOR ARRAY SIGNALS - An embodiment of the present invention is directed to a method for processing a position signal. The method includes receiving a first position signal from a capacitive sensor and determining a proximity of the capacitive sensor to a connection of an array of capacitive sensors. The sensitivity of the capacitive sensor is then adjusted and a second position signal is received from the capacitive sensor. The second position signal may then be reported. The present invention facilitates more accurate readings from an array of capacitive sensors. | 01-08-2009 |
| 20080315847 | PROGRAMMABLE FLOATING GATE REFERENCE - A system includes a controllable voltage generator to generate a power supply voltage. The system also includes a system controller to determine a voltage level associated with the power supply voltage, and prompt the controllable voltage generator to generate the power supply voltage. The system includes a floating gate reference device to generate an absolute voltage reference based, at least in part, on the voltage level associated with the power supply voltage. The system can also include analog circuitry to perform one or more electrical operations responsive to the absolute voltage reference from the floating gate reference device. | 12-25-2008 |
| 20080301619 | SYSTEM AND METHOD FOR PERFORMING NEXT PLACEMENTS AND PRUNING OF DISALLOWED PLACEMENTS FOR PROGRAMMING AN INTEGRATED CIRCUIT - A system and method for graphically displaying modules and resources within a chip design software application. The system and method provide a data driven model for matching the hardware resource requirements for an associated user module and the available hardware resources on an underlying chip. Databases are utilized to describe the hardware resource requirements which are dictated by the particular user module and the available hardware resources of a particular chip. The user module descriptive database can be updated in response to additional user modules being added or changes to the hardware resource requirements of existing user modules. The hardware description database can be updated in response to additional chips being added. Further, the graphical interface relates both a user module and the possible hardware resource. This graphical interface utilizes highlights of both the module and the associated resource in patterns, grayscales, or colors to graphically illustrate the relationship between the module and the associated resource. | 12-04-2008 |
| 20080297388 | PROGRAMMABLE SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER - A system includes an analog-to-digital modulator to convert at least one analog input signal into at least one digital output signal. The system also includes a processing device to set an operational order and a quantization level of the analog-to-digital modulator. The analog-to-digital modulator converts the analog input signal into the digital output signal according to the operational order and the quantization level. | 12-04-2008 |
| 20080294806 | PROGRAMMABLE SYSTEM-ON-CHIP HUB - A Programmable System on a Chip Hub (PHUB) is configured to enable master processing elements within the PHUB to simultaneously access peripherals on different busses. The master processing elements include a Central Processing Unit (CPU) interface configured to decode addresses received from a CPU and configure the PHUB to connect signaling from the CPU to one of the multiple busses associated with the address. A second one of the master processing elements is a Direct Memory Access Controller (DMAC) source engine configured to conduct Direct Memory Access (DMA) reads. A third one of the master processing elements is a DMAC destination engine configured to conduct DMA writes independently of the CPU interface. | 11-27-2008 |
| 20080288755 | CLOCK DRIVEN DYNAMIC DATAPATH CHAINING - A system includes a plurality of datapaths, each having structural arithmetic elements to perform various arithmetic operations based, at least in part, on configuration data. The system also includes a configuration memory coupled to the datapaths, the configuration memory to provide the configuration data to the datapaths, which causes the datapaths to collaborate when performing the arithmetic operations. | 11-20-2008 |
| 20080263328 | ORTHOGONAL REGISTER ACCESS - Embodiments of the invention relate to a method and system for accessing a set of parallel registers orthogonally. A decoder may be used to select a particular row or column of the set of parallel registers to perform register operations in a parallel fashion corresponding to the selected row or in an orthogonal fashion corresponding to the selected column. Thus, when a particular row is selected, a register operation may be carried out for each bit of the selected row to produce a parallel register output, such as by reading/writing each bit of the selected row to a parallel register. On the other hand, when a particular column is selected, a register operation may be carried out for each bit of the selected column, such as by reading/writing each bit of the selected column to an orthogonal register. The orthogonal register access allows for fast and efficient access to a particular bit in the set of parallel registers. | 10-23-2008 |
| 20080263319 | UNIVERSAL DIGITAL BLOCK WITH INTEGRATED ARITHMETIC LOGIC UNIT - An array of universal digital blocks include programmable logic device sections that have uncommitted user programmable logic functions and structural datapath sections that include dedicated and highly configurable arithmetic operators. A routing channel matrix programmably connects to different programmable logic device sections and datapath sections in the different universal digital blocks. | 10-23-2008 |
| 20080263260 | DISPLAY INTERFACE BUFFER - A display interface buffer includes a general purpose memory to store data capable of being displayed on a panel, a plurality of display drivers to receive data from the general purpose memory, each of the display drivers to drive a different portion of the panel with the data, and processor or a direct memory access controller to access data in the general purpose memory and to provide the data to the display drivers for presentation on the panel. | 10-23-2008 |
| 20080259702 | STATE-MONITORING MEMORY ELEMENT - Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may have a reduced ability to retain a logic state than other regular memory elements on an IC. Thus, if the state-monitoring memory elements fails or loses state during testing, it may be a good indicator that the IC's state retention may be in jeopardy, possibly requiring the IC to be reset. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element. Multiple state-monitoring memory elements may be distributed in different locations on the IC for better coverage. | 10-23-2008 |
| 20080259070 | ACTIVE LIQUID CRYSTAL DISPLAY DRIVERS AND DUTY CYCLE OPERATION - A liquid crystal display (LCD) driving system includes a reference voltage generator to generate a plurality of reference voltages. The LCD driving system also includes a plurality of drive buffers to generate drive voltages according to at least one of the reference voltages, and to drive at least a portion of a liquid crystal display to present data according to the drive voltages. | 10-23-2008 |
| 20080259065 | CONFIGURABLE LIQUID CRYSTAL DISPLAY DRIVER SYSTEM - Embodiments of the invention relate to a configurable LCD driver system having a plurality of configurable LCD drivers. Each LCD driver may be configured as a common or segment driver by selecting a drive voltage from an appropriate set of drive voltages associated with a common or segment driver in accordance with certain parameters, such as whether a user may configure the LCD driver as a common driver or segment driver, a multiplex ratio, and/or bias ratio of an LCD panel. The drive time and drive strength associated with the LCD driver may also be configurable. The selected drive voltage may be provided to a drive buffer to output an LCD drive voltage waveform for driving one or more segments or pixels in an LCD panel. A memory may store appropriate display data for both the segment and common drivers to control the output drive capability of the LCD driver. | 10-23-2008 |
| 20080258804 | NUMERICAL BAND GAP - A system includes a bandgap temperature sensor to generate multiple base-emitter voltages. The system also include a controller to detect the base-emitter voltages generated by the bandgap temperature sensor and to generate a bandgap reference voltage according to the multiple base-emitter voltage signals, the bandgap reference voltage having a voltage level that remains substantially constant relative to environmental temperature variations. | 10-23-2008 |
| 20080258760 | SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING - Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by the micro-controller. Connectors are configured to connect the integrated circuit to external signals. A system level interconnect also located in the integrated circuit programmably connects together the different functional elements and different connectors according to the configuration values loaded into the configuration registers. | 10-23-2008 |
| 20080258759 | UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING - A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O. | 10-23-2008 |
| 20080258740 | SELF-CALIBRATING DRIVER - A self-calibration system includes a variable current source to generate a default source current for charging a capacitive load, and a load charge calibrator to detect a voltage associated with the capacitive load when charged by the default source current, and to generate a current control feedback according to the detected voltage and a desired charged voltage of the capacitive load, the current control feedback to indicate to the variable current source a charge current capable of charging the capacitive load to the desired charged voltage. | 10-23-2008 |
| 20080243471 | SYSTEM AND A METHOD FOR CHECKING LOCK-STEP CONSISTENCY BETWEEN AN IN CIRCUIT EMULATION AND A MICROCONTROLLER - A system and a method for checking consistency of a lock-step process while debugging a microcontroller code. The virtual microcontroller and the microcontroller simultaneously and independently run a microcontroller code. The microcontroller includes a first memory and the virtual microcontroller residing in the ICE includes a second memory. A host computer copies a content of the first memory and a content of the second memory in the host computer memory when the execution of the code is halted. The host device compares the content of the first memory and the content of the second memory for consistency. In case of a disparity between the content of the first memory and the content of the second memory, a user traces the execution of the code in a trace buffer residing in the ICE and debugs the faulty code accordingly. | 10-02-2008 |
| 20080222453 | METHOD FOR INTEGRATING EVENT-RELATED INFORMATION AND TRACE INFORMATION - A method for emulating and debugging a microcontroller. In one embodiment, an event thread is executed on an emulator that operates in lock-step with the microcontroller. Event information is sampled at selected points. Trace information is also recorded at the selected points. As such, the event information and trace information are effectively pre-filtered. Accordingly, it is not incumbent on a designer to read and understand the event and trace information and sort out the information that is of interest. Instead, this task is essentially done automatically, helping the designer and reducing the probability of error. Furthermore, because only selected event and trace information is recorded, the resources of the in-circuit emulator system are not taxed. | 09-11-2008 |
| 20080206627 | BATTERY WITH ELECTRONIC COMPARTMENT - An electronic containment battery includes a battery section and an electronic section that together form a standard battery form factor that allows insertion into conventional electronic devices. The electronic section can include Radio Frequency (RE) circuitry that enables electronic operations in the electronic containment battery to be communicated or controlled wirelessly. | 08-28-2008 |
| 20080204409 | CURSOR CONTROL DEVICE AND METHOD - We describe an apparatus including a plurality of sensing elements, a conductive layer, and a compressive layer interposed between the plurality of sensing elements and the conductive layer. The conductive layer can include a plurality of segments. A user applies a force to an actuator positioned over the conductive layer. The actuator changes a capacitance of at least one capacitor formed by at least one of the plurality of sensing elements, the conductive layer (at least one segment), and the compressive layer by reducing the distance between the at least one of the plurality of sensing elements and the conductive layer responsive to the applied force. The device measures and calculates a magnitude and direction of the force by measuring the change in the capacitance. | 08-28-2008 |
