| COVALENT MATERIALS CORPORATION Patent applications |
| Patent application number | Title | Published |
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| 20130084450 | CORROSION RESISTANT MEMBER AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a corrosion resistant member including: a substrate composed of a ceramic or a metal, and at least one layer of a corrosion resistant film formed on a surface of at least a region of the substrate to be exposed to plasma or a corrosive gas, in which the corrosion resistant film contains yttria as a main component and further also contains at least one of tantalum and niobium in an amount of 0.02 to 10 mol % in terms of pentoxide relative to the yttria, and a non-melted portion is not present in the corrosion resistant film. | 04-04-2013 |
| 20130082355 | NITRIDE SEMICONDUCTOR SUBSTRATE - A nitride semiconductor substrate is provided in which leak current reduction and improvement in current collapse are effectively attained when using Si single crystal as a base substrate. The nitride semiconductor substrate is such that an active layer of a nitride semiconductor is formed on one principal plane of a Si single crystal substrate through a plurality of buffer layers made of a nitride, in the buffer layers, a carbon concentration of a layer which is in contact with at least the active layer is from 1×10 | 04-04-2013 |
| 20120241912 | THERMAL TREATMENT METHOD OF SILICON WAFER AND SILICON WAFER - There is provided a thermal treatment method of a silicon wafer. The method includes the successive steps of: (a) terminating silicon atoms existing on an active surface of the silicon wafer with hydrogen, wherein the active surface is mirror-polished, and a semiconductor device is to be formed on the active surface; (b) terminating the silicon atoms existing on the active surface of the silicon wafer with fluorine; (c) rapidly heating the silicon wafer to a first temperature under an inert gas atmosphere or a reducing gas atmosphere, wherein the first temperature is in a range of 1300° C. to 1400° C.; (d) holding the silicon wafer at the first temperature for a certain time; and (e) rapidly cooling the silicon wafer. | 09-27-2012 |
| 20120211763 | NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A nitride semiconductor substrate suitable for a normally-off type high breakdown-voltage device and a method of manufacturing the substrate are provided allowing both a higher threshold voltage and improvement in current collapse. | 08-23-2012 |
| 20120184091 | METHOD FOR HEAT TREATING A SILICON WAFER - The invention is to provide a method for heat treating a silicon wafer reducing grown-in defects while suppressing generation of slip during RTP and improving surface roughness of the wafer. The method performing a first heat treatment while introducing a rare gas, the first heat treatment comprising the steps of rapidly heating the wafer to T | 07-19-2012 |
| 20120160766 | TITANIUM OXIDE POROUS PARTICLE FOR BLOOD PURIFICATION, BLOOD PURIFICATION MATERIAL AND MODULE FOR BLOOD PURIFICATION - The present invention relates to a titanium oxide porous particle for blood purification, which includes a titanium oxide, in which when the titanium oxide porous particle is measured by an electron spin resonance measurement at a temperature of 10 K, a signal at a g value of around 1.96 is present, the signal being divided into two signals representing a component g | 06-28-2012 |
| 20120139088 | SILICON WAFER AND METHOD FOR HEAT-TREATING SILICON WAFER - A silicon wafer for preventing a void defect in a bulk region from becoming source of contamination and slip generation in a device process is provided. And a heat-treating method thereof for reducing crystal defects such as COP in a region near the wafer surface to be a device active region is provided. The silicon wafer has a surface region | 06-07-2012 |
| 20120067272 | Single crystal pulling-up apparatus and single crystal pulling-up method - According to one exemplary embodiment, a single crystal pulling-up apparatus of pulling-up silicon single crystals by a Czochralski method, is provided with: a neck diameter measuring portion which measures a diameter of a grown neck portion; a first compensation portion which outputs a first compensated pulling-up speed for the seed crystals based on a difference between a measured value of the diameter of the neck portion and a target value of the neck portion diameter previously stored; a second compensation portion which outputs a second pulling-up speed while limiting an upper limit of the first pulling-up speed to a first limit value; and a crucible rotation number compensation portion which lowers the number of a rotation of a crucible at least in a period where the upper limit of the first pulling-up speed is limited to the first limit value. | 03-22-2012 |
| 20120045634 | Ceramics composite - The present invention relates to a ceramics composite including an inorganic material which includes: a matrix phase including a translucent ceramics; and a phosphor phase including YAG containing Ce, in which a content of the phosphor phase is from 22% by volume to 55% by volume based on the whole phase including the matrix phase and the phosphor phase, a content of Ce in the YAG is 0.005 to 0.05 in terms of an atomic ratio of Ce to Y (Ce/Y), and the ceramics composite has a thickness in a light outgoing direction of 30 μm to 200 μm. | 02-23-2012 |
| 20120034694 | CELL CULTURE SUPPORT AND CELL CULTURE METHOD - The present invention relates to a cell culture support for culturing mesenchymal stem cells, which includes en upper surface including a plurality of wells, in which the upper surface has a root mean square roughness Rq of 100 to 280 nm and a linear density of 1.6 to 10 per 1 μm length. | 02-09-2012 |
| 20110214603 | METHOD OF MANUFACTURING SILICON SINGLE CRYSTAL - The present invention provides a method of manufacturing a silicon single crystal which can more greatly suppress a pinhole formation in the silicon single crystal, which is a method of manufacturing a silicon single crystal by the Czochralski method in which a silicon material to be silicon melt is melted in a furnace body and then a silicon single crystal is pulled up. After melting the silicon material and before the start of pulling up the silicon single crystal, a heater power is set to be higher than that during the step of pulling up the silicon single crystal, and an internal furnace pressure is set as 30 Torr or less, which is lower than that during the step of pulling up the silicon single crystal, the power and pressure being maintained for a predetermined time, and then the step of pulling up the silicon single crystal is carried out. | 09-08-2011 |
| 20110062556 | COMPOUND SEMICONDUCTOR SUBSTRATE - A compound semiconductor substrate which inhibits the generation of a crack or a warp and is preferable for a normally-off type high breakdown voltage device, arranged that a multilayer buffer layer | 03-17-2011 |
| 20100244100 | Compound semiconductor substrate - The present invention provides a compound semiconductor substrate, including: a single-crystal silicon substrate having a crystal face with (111) orientation; a first buffer layer which is formed on the single-crystal silicon substrate and is constituted of an Al | 09-30-2010 |
| 20100224620 | PLANE HEATER - [Problem to be Solved] To provide a plane heater including a carbon wire heating element which has an arrangement pattern allowing a heating surface to be a substantially uniform heating temperature plane. | 09-09-2010 |
| 20100197146 | Method of heat treating silicon wafer - In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200° C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer. | 08-05-2010 |
| 20100101485 | Manufacturing method of silicon single crystal - In appropriate setting of magnetic field applied to a molten silicon | 04-29-2010 |
| 20100069227 | CERAMICS FOR PLASMA TREATMENT APPARATUS - The present invention provides ceramics for a plasma-treatment apparatus which are excellent in corrosion resistance against a halogen-type corrosive gas, plasma, etc., attain reduction in resistance, and inhibit impurity metal contamination caused by composition materials of these ceramics even in a halogen plasma process, and which can be used suitably for the component of the plasma-treatment apparatus for manufacturing a semiconductor, a liquid crystal, etc. The ceramics are used which are prepared in such a way that 3% by weight to 30% by weight of a cerium oxide relative to yttria and 3% by weight to 50% by weight of niobium pentoxide relative to yttria are added to yttria, which are fired in a reducing atmosphere to have an open porosity of 1.0% or less. | 03-18-2010 |
| 20090266808 | PLANAR HEATER AND SEMICONDUCTOR HEAT TREATMENT APPARATUS PROVIDED WITH THE HEATER - A plane heater and a semiconductor heat treatment apparatus having the heater which suppress high frequency induction heating by having an earth electrode therein for suppressing high frequency induction and do not corrode with an excited reaction gas is provided. A plane heater | 10-29-2009 |
| 20090159587 | PLANAR HEATER - A planar heater | 06-25-2009 |
| 20090066933 | SURFACE INSPECTION APPARATUS AND SURFACE INSPECTION METHOD FOR STRAINED SILICON WAFER - An image pickup device disposed in a predetermined position relative to a surface of a strained silicon wafer photographs the surface of the strained silicon wafer in a plurality of rotation angle positions on photographing conditions under which bright lines appearing on the surface of the strained silicon wafer can be photographed, in an environment where a light source device illuminates the surface of the strained silicon wafer which is rotating. A composite image in a predetermined angle position is generated from surface images of the strained silicon wafer in a plurality of rotation angle positions obtained by the image pickup device. | 03-12-2009 |
| 20090004825 | METHOD OF MANUFACTURING SEMICONDUCTOR SUBSTRATE - A method of manufacturing a semiconductor substrate having a DSB structure that enables simplification of a manufacturing process by optimizing a total thickness of oxides on surfaces of two wafers before being bonded together is provided. The method comprises a process of preparing a first semiconductor wafer and a second semiconductor wafer, a process of bonding the first semiconductor wafer and second semiconductor wafer when a total of thickness of an oxide on the surface of the first semiconductor wafer and that of an oxide on the surface of the second semiconductor wafer is 0.4 nm or more and 1.0 nm or less, and a process of providing heat treatment to a semiconductor substrate after the process of the bonding and before a process of thinning one of the wafers. | 01-01-2009 |
| 20080277768 | SILICON MEMBER AND METHOD OF MANUFACTURING THE SAME - There is provided a silicon member that can prevent the resistivity of a member itself from varying in a semiconductor manufacturing process, in particular, in a plasma processing process, thereby making wafer processing uniform and being not an impurity contamination source to a wafer to be processed, and a method for manufacturing the same. The silicon member having a resistivity of 0.1 Ω·cm or more and 100 Ω·cm or less is manufactured with steps which are manufacturing a P-type silicon single crystal doped with 13 group atoms of a periodic table having an intrinsic resistivity of 1 Ω·cm or more and 100 Ω·cm or less, and changing said P-type silicon single crystal into an N-type silicon single crystal by oxygen donors formed by annealing at a temperature of 300° C. or more and 500° C. or less. | 11-13-2008 |
| 20080271490 | CHANNEL STRUCTURE AND PROCESS FOR PRODUCTION THEREOF - A three-dimensional (micro-) channel structure with an increased length of internal channel is provided, which can be formed without requiring a boring step for vertical hole formation. The channel structure is formed by providing a polyhedral substrate with a groove over at least two faces thereof, preferably through press molding, and covering the faces provided with the grooves with a covering member or another polyhedral substrate to form a continuous internal channel communicative with an ambience through an opening. | 11-06-2008 |
| 20080237190 | SURFACE CLEANING METHOD OF SEMICONDUCTOR WAFER HEAT TREATMENT BOAT - A surface cleaning method of a semiconductor wafer heat treatment boat that can prevent metallic contamination to semiconductor wafers and keep down a production time and manufacturing costs of semiconductor wafers by efficiently and easily removing metallic impurities in an oxide film on an SiC boat surface is provided. A surface cleaning method of a semiconductor wafer heat treatment boat according to an embodiment of the present invention is a surface cleaning method of a semiconductor wafer heat treatment boat whose surface is formed of SiC, includes oxidizing the surface of the heat treatment boat by thermal oxidation and etching a portion of the oxide film formed after oxidation is removed. | 10-02-2008 |
