| CITIBANK N.A. Patent applications |
| Patent application number | Title | Published |
|---|
| 20120059761 | Transfer Instrument - A method performed by a transfer instrument issuer involves issuing, to a recipient, a certificate which is linked to a national card account obtained by the transfer instrument issuer from an account issuer different from the transfer instrument issuer, without both issuing and providing a physical card for the national card account to the recipient of the certificate, the certificate having been purchased by a purchaser, who is not also the recipient, and containing all information necessary for the purchase of goods or services from any merchant who is capable of processing economic transactions involving one of the plurality national card accounts for which a physical card has issued, but without presentment of the physical card. | 03-08-2012 |
| 20110296522 | Systems and Methods for Providing Security Token Authentication - Described herein are systems and methods for centralizing and standardizing implementation of security tokens so as to provide one token per one user for accessing business applications across an enterprise, providing scalability to support authentication of as many enterprise users as desired or needed, and providing a standardized token management interface that supports both pre-binding and post-binding user registration processes and different types of security token. | 12-01-2011 |
| 20100166085 | LIN NETWORK, INTEGRATED CIRCUIT AND METHOD THEREFOR - A LIN network comprises a transmit driver for communicating on a single communication bus. A slope control module is operably coupled to a supply voltage and arranged to identify a voltage transition, and in response thereto and via control of the transmit driver selectively apply one of: a first voltage transition mode comprising a constant DV/DT slope transition, or a second voltage transition mode comprising a fixed time transition. | 07-01-2010 |
| 20090301867 | INTEGRATED SYSTEM FOR SEMICONDUCTOR SUBSTRATE PROCESSING USING LIQUID PHASE METAL DEPOSITION - A system for processing a semiconductor substrate during fabrication of semiconductor devices provides a plurality of semiconductor substrate processing stations in a physically integrated system, as well as a semiconductor substrate transport system for transporting a semiconductor substrate between the respective processing stations. In particular, the processing system according to the present invention favors the use of liquid phase process steps, particularly deposition process steps, instead of gas or vapor phase processing. Even more particularly, the system contemplates deposition of a metallic barrier layer | 12-10-2009 |
| 20090198926 | METHOD AND DEVICE FOR SWITCHING DATA - A method, the method includes providing data; retrieving interleaving command information from a two dimensional array of interleaving command information; wherein the two dimensional array includes multiple interleaving command information rows, each row includes interleaving commands associated with multiple TDM time slots; and determining, in response to the retrieved interleaving command information, whether to provide data from a first data source or from a second data source. | 08-06-2009 |
| 20090125647 | Device And Method For Executing A DMA Task - A method for executing a DMA task, the method includes receiving a request to execute a DMA task; the method characterized by including: defining inter-buffer jumping points at substantially an end of one or more dimensions of each multidimensional buffer out of a plurality of multidimensional buffers; and executing multiple DMA sub-tasks, wherein the executing includes jumping between buffers at the inter-buffer jumping points. A device hat includes at least one memory unit and a DMA controller adapted to access the memory unit; the device is characterized by being adapted to implement multidimensional buffers within the at least one memory unit; wherein the DMA controller is adapted to execute multiple DMA sub-tasks, wherein the execution comprises jumping between buffers at inter-buffer jumping points; and wherein the inter-buffer jumping points are defined at substantially an end of one or more dimensions of each multidimensional buffer out of a plurality of multidimensional buffers. | 05-14-2009 |
| 20090106487 | Electronic Device Having a Memory Element and Method of Operation Therefor - An electronic device comprises a processing unit operably coupled to a buffer random access memory, in turn operably coupled to a non-volatile memory configured to emulate an electrically erasable programmable read only memory. The processing unit is arranged to transfer data between the buffer RAM and the non-volatile memory at a first clock frequency. A second RAM is operably coupled between the processing unit and the non-volatile memory and the processing unit sets a Tag bit in the second RAM to identify an address in the buffer RAM that is being written to or read from by the processing unit. | 04-23-2009 |
| 20090103489 | Arrangement and Method for Dual Mode Operation in a Communication System Terminal - An arrangement and method for discontinuous software FDD monitoring during TDD call allows removal of a conventional external notch filter in a dual mode WCDMA and PCS/DCS handset. The WCDMA RX frame is allowed to have a few slots corrupted by the PCS/DCS transmitter noise during DCS transmission, and a scheme is used to recover the required information by not considering the corrupted slots. Due to the fact that during WCDMA FDD RX monitoring, the processing required is performed in stages, and since the information that is measured during a WCDMA frame is repeated in every frame, the scheme of the invention is based on the idea that if a given slot is corrupted in a WCDMA frame, in the next WCDMA frame the slot will be no more corrupted due to the difference in timing between the PCS/DCS transmitter protocol and the WCDMA timing protocol. | 04-23-2009 |
