| ChipIdea Microelectronica S.A. Patent applications |
| Patent application number | Title | Published |
|---|
| 20090177814 | Programmable Modular Circuit For Testing and Controlling A System-On-A-Chip Integrated Circuit, and Applications Thereof - The present invention provides a programmable modular circuit for testing and controlling a system-on-a-chip integrated circuit, and applications thereof. In an embodiment, the programmable modular circuit comprises a plurality of serial-to-parallel interface registers coupled together by a data line, a clock line, and an enable line. Each of the plurality of serial-to-parallel interface registers is coupled to a module of the system-on-a-chip. The data line and the clock line are used to serially clock data into the plurality of serial-to-parallel interface registers. Applying a first logical value to the enable line provides the data serially clocked into the plurality of serial-to-parallel interface registers to modules of the system-on-a-chip. Applying a second logical value to the enable line provides default values to modules of the system-on-a-chip. The data values serially clocked into the plurality of serial-to-parallel interface registers can be used to test and/or to modify selected operating characteristics of the system-on-a-chip. | 07-09-2009 |
| 20090172218 | High Definition Media Interface Controller Having A Modular Design Internal Bus Structure, And Applications Thereof - The present invention provides a high definition media interface (HDMI) controller having a modular design internal bus structure, and applications thereof. The controller includes a circuit interface, an address decoder coupled to the circuit interface, a plurality of sub-circuits, wherein each sub-circuit includes registers used to configure and control the sub-circuit, and a bus that couples the registers of each sub-circuit to the address decoder. After startup of the controller, the sub-circuits are configured by using the circuit interface, address decoder, and bus to write values to the registers of the sub-circuits. The sub-circuits of the controller include a video pixel sampler, an audio sampler, a frame composer, and a power controller. The video sampler can be configured to convert one of a plurality of RGB and YCbCr signals to a common format signal used by other sub-circuits of the controller. | 07-02-2009 |
| 20090170460 | Amplifier Gain Control - The present invention discloses an automatic gain controller with an amplifier ( | 07-02-2009 |
| 20090167389 | Voltage-Controlled Oscillator - The present invention discloses a calibration circuit for a voltage-controlled oscillator ( | 07-02-2009 |
| 20090140967 | Data Recovery Architecture (CDR) for Low-Voltage Differential Signaling (LVDS) Video Transceiver Applications - The present invention discloses data recovery architecture (CDR) to improve a multi-link system's tolerance to delay mismatches (or skewing effect) in its different links. The architecture is entirely digital and usable in any multi-link transceiver implementation that makes use of a separate clock link and requires timing synchronization between the different data links. | 06-04-2009 |
