China Electronic Technology Corporation, 24th Research Institute Patent applications |
Patent application number | Title | Published |
20150370952 | CAPACITOR ARRAY AND LAYOUT DESIGN METHOD THEREOF - A layout design method is provided for generating capacitor arrays being described in four steps: first, the wiring mode of unit capacitors is defined allowing the wire being connected to the upper plate to parallel that to the lower one, second, a capacitor array layout is designed with capacitors being distributed in Mh lines, Mh is the maximum of capacitors' lines, the line numbers of Class 1 to Class K capacitors are defined in the unilateral capacitor array, third, the wiring mode is set for capacitor array making sure the lengths of the wires to the upper and lower plates of unit capacitors are equal, at last, parasitic parameters are characterized in ways that verify the layout. A capacitor array is provided as well. By eliminating capacitance mismatching caused by parasitic capacitance, the method works to generate a well-matched capacitor array in an easy and efficient way. | 12-24-2015 |
20140152348 | BICMOS CURRENT REFERENCE CIRCUIT - A BiCMOS current reference circuit includes a reference core, a startup circuit, and a reference current output circuit. The reference core contains a current mirror, a positive temperature coefficient current generator, and a negative temperature coefficient current generator. The current mirror generates matching branch current. The positive and negative temperature coefficient currents were added in certain proportion to generate a reference current with zero temperature coefficient at room temperature. The startup circuit starts the reference core at power-on. The reference current output circuit proportionably outputs reference current generated by the reference core. Compared with the conventional voltage reference, the circuit uses current conveying technique, so it won't be affected by DC voltage drops of power supply network, and it features low transmission loss, good matching, excellent temperature stability, small chip size and auto-startup at power-on. It's preferably suitable for applications where A/D and D/A converters require accurate reference signals. | 06-05-2014 |