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Broadcom Advanced Compression Group

Broadcom Advanced Compression Group Patent applications
Patent application numberTitlePublished
20090051400SYSTEM AND METHOD FOR FULLY DIGITAL CLOCK DIVIDER WITH NON-INTEGER DIVISOR SUPPORT - A system and method that use a first clock to digitally generate a second clock, wherein the ratio of the frequency of the first clock to the frequency of the second clock is a non-integer. Circuitry may be used to ensure that the first clock, or input clock, has a frequency at least equal to the highest of the desired output frequencies. The input clock may be used to generate several output clocks with different frequencies. If one of the output clocks has the same frequency as the input clock, the circuitry can be bypassed. The different clocks may be used to drive parts of a system, each of which may require a different frequency.02-26-2009