Beijing NMC Co., Ltd. Patent applications |
Patent application number | Title | Published |
20150311091 | SUBSTRATE ETCHING METHOD - Embodiments of the invention provide a substrate etching method, which includes: a deposition operation for depositing a polymer on a side wall of a silicon groove, an etching operation for etching the side wall of the silicon groove, and repeating the deposition operation and the etching operation at least twice. In the process of completing all cycles of the etching operation, a chamber pressure of a reaction chamber is decreased from a preset highest pressure to a preset lowest pressure according to a preset rule. The substrate etching method, according to various embodiments of the invention, avoid the problem of damaging the side wall, thereby making the side wall smooth. | 10-29-2015 |
20150284846 | TRAY DEVICE, REACTION CHAMBER AND MOCVD APPARATUS - Embodiments of the invention provide a tray device, a reaction chamber, and a MOCVD apparatus including the reaction chamber. According to an embodiment, the tray device includes a large tray, a rotating shaft, a small tray, and a supporting disk. The rotating shaft is connected with the center of the large tray and drives the large tray to rotate about the rotating shaft. The large tray is provided with a tray groove for placing the small tray. The supporting disk is located under the large tray. A sliding mechanism is provided between the supporting disk and the small tray, so that when revolving along with the large tray, the small tray spins under the function of the sliding mechanism. | 10-08-2015 |
20140363975 | SUBSTRATE ETCHING METHOD AND SUBSTRATE PROCESSING DEVICE - A substrate etching method and a substrate processing device, the substrate etching method includes: S1: placing a substrate to be processed into a reaction chamber; S2: supplying etching gas into the reaction chamber; S3: turning on an excitation power supply to generate plasma in the reaction chamber; S4: turning on a bias power supply to apply bias power to the substrate; S5: turning off the bias power supply, and meanwhile, starting to supply deposition gas into the reaction chamber; S6: stopping supply of the deposition gas into the reaction chamber, and meanwhile, turning on the bias power supply; S7: repeating steps S5-S6, until the etching process is completed. In the whole etching process, the etching operation is always performed, and the deposition operation is performed sometimes. Therefore, during the deposition operation, the plasma in the reaction chamber can etch away at least a part of deposited polymers formed by the deposition operation on a sidewall of an etched section, so that the sidewall of the etched section of the substrate is smooth. | 12-11-2014 |
20140124859 | Semiconductor structure and method for manufacturing the same - The present invention provides a method for manufacturing a semiconductor structure, which comprises: providing an SOI substrate, forming a gate structure on the SOI substrate; etching an SOI layer of the SOI substrate and a BOX layer of the SOI substrate on both sides of the gate structure to form trenches, the trenches exposing the BOX layer and extending partly into the BOX layer; forming sidewall spacers on sidewalls of the trenches; forming inside the trenches a metal layer covering the sidewall spacers, wherein the metal layer is in contact with the SOI layer which is under the gate structure. Accordingly, the present invention further provides a semiconductor structure formed according to aforesaid method. The manufacturing method and the semiconductor structure according to the present invention make it possible to reduce capacitance between a metal layer and a body silicon layer of an SOI substrate when a semiconductor device is in operation, which is therefore favorable for enhancing performance of the semiconductor device. | 05-08-2014 |
20130277205 | MAGNETRON SOURCE, MAGNETRON SPUTTERING APPARATUS AND MAGNETRON SPUTTERING METHOD - Provided is a magnetron source, which comprises a target material, a magnetron located thereabove and a scanning mechanism connected to the magnetron for controlling the movement of the magnetron above the target material. The scanning mechanism comprises a peach-shaped track, with the magnetron movably disposed thereon; a first driving shaft, with the bottom end thereof connected with the origin of the polar coordinates of the peach-shaped track, for driving the peach-shaped track to rotate about the axis of the first driving shaft; a first driver connected to the first driving shaft for driving the first driving shaft to rotate; and a second driver for driving the magnetron to move along the peach-shaped track via a transmission assembly. A magnetron sputtering device including the magnetron and a method for magnetron sputtering using the magnetron sputtering device are also provided. | 10-24-2013 |
20130269614 | VAPOUR CHAMBER AND SUBSTRATE PROCESSING EQUIPMENT USING SAME - The present invention provides a hot plate and substrate processing equipment using the same, wherein the hot plate comprises a central sub hot plate and at least one outer ring sub hot plate located around the central sub hot plate; thermal insulation parts are provided between the central sub hot plate and the outer ring sub hot plate and between two adjacent outer ring sub hot plates, so that the heat conduction between the adjacent sub hot plates can be effectively prevented or reduced by means of the thermal insulation parts. The hot plate and the substrate processing equipment using the same provided in the present invention can effectively compensate for the heat losses in the edge region of the substrate, so as to keep the heating rate the same in each region of the substrate. | 10-17-2013 |
20130256129 | PLASMA PROCESSING APPARATUS - A plasma processing apparatus includes a chamber ( | 10-03-2013 |
20130256119 | METHOD FOR APPLYING POWER TO TARGET MATERIAL, POWER SUPPLY FOR TARGET MATERIAL, AND SEMICONDUCTOR PROCESSING APPARATUS - A method for applying power to target material in a magnetron sputtering process is provided. The method includes: | 10-03-2013 |
20120319181 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a semiconductor structure, which comprises a substrate, a semiconductor base, a cavity, a gate stack, sidewall spacers, source/drain regions and a contact layer; wherein, the gate stack is located on the semiconductor base, the sidewall spacers are located on sidewalls of the gate stack, the source/drain regions are embedded within the semiconductor base and located on both sides of the gate stack, the cavity is embedded within the substrate, and the semiconductor base is suspended over the cavity, the thickness in the middle portion of the semiconductor base is greater than the thicknesses at both ends of the semiconductor base in a direction along the gate length, and both ends of the semiconductor base are connected with the substrate in a direction along the gate width; the contact layer covers exposed surfaces of the source/drain regions. Accordingly, the present invention further provides a method for manufacturing a semiconductor structure, which is favorable for reducing the contact resistance at the source/drain regions, enhancing the device performance, lowering the cost and simplifying the manufacturing process. | 12-20-2012 |
20120313158 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a semiconductor structure and a method for manufacturing the same. The method comprises: providing a substrate, forming sequentially a first high-k dielectric layer, an adjusting layer, a second high-k dielectric layer and a metal gate on the substrate, etching the first high-k dielectric layer, the adjusting layer, the second high-k dielectric layer and the metal gate to form a gate stack. Accordingly, the present invention further provides a semiconductor structure. The present invention proposes to arrange an adjusting layer between two layers of high-k dielectric layer, which effectively avoids reaction of the adjusting layer with the metal gate because of their direct contact, so as to maintain the performance of semiconductor devices. | 12-13-2012 |
20120313149 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a semiconductor structure and a method for manufacturing the same. The method comprises the following steps: providing a semiconductor substrate, forming sequentially a gate dielectric layer, a metal gate, a CMP stop layer, and a poly silicon layer on the semiconductor substrate; etching the gate dielectric layer, the metal gate, the CMP stop layer and the poly silicon layer to form a gate stack; forming a first interlayer dielectric layer on the semiconductor substrate to cover the gate stack on the semiconductor substrate and the portions on both sides of the gate stack; performing a planarization process, such that the CMP stop layer is exposed and flushed with the upper surface of the first interlayer dielectric layer. Accordingly, the present invention further provides a semiconductor structure. Through adding the CMP stop layer, the present invention is able to effectively shorten the height of a metal gate, thus effectively reduces the capacitance between the metal gate and contact regions, and therefore optimizes the subsequent process for etching through holes. | 12-13-2012 |
20120200981 | ELECTROSTATIC CHUCK AND METHOD FOR REMOVING REMAINING CHARGES THEREON - The present invention provides an electrostatic chuck, which includes a base ( | 08-09-2012 |
20120138228 | DEEP-TRENCH SILICON ETCHING AND GAS INLET SYSTEM THEREOF - A deep-trench silicon etching apparatus, including a reaction chamber and a gas source cabinet, the gas source cabinet is connected to the reaction chamber via two independently controlled gas paths; wherein, a first gas path is used to introduce process gas for etch step from the gas source cabinet into the reaction chamber; a second gas path is used to introduce process gas for deposition step from the gas source cabinet into the reaction chamber. The present invention is used to solve the problems of gas mixture and gas delay occurring when process steps are switched. | 06-07-2012 |
20110162801 | PLASMA PROCESSING APPARATUS - A plasma processing apparatus ( | 07-07-2011 |