| Baolab Microsystems SL Patent applications |
| Patent application number | Title | Published |
|---|
| 20120126433 | METHODS AND SYSTEMS FOR FABRICATION OF MEMS CMOS DEVICES IN LOWER NODE DESIGNS - A method for manufacturing an integrated circuit including producing layers that form one or more electrical and/or electronic elements on a semiconductor material substrate. Then, producing ILD layers above the layers forming one or more electrical and/or electronic elements, including the steps of depositing a first layer of etch stopper material, depositing a second layer of dielectric material above and in contact with the first layer, forming at least one track extending through the first and second layers, and filling the at least one track with a non-metallic material. | 05-24-2012 |
| 20120106434 | MEMS CMOS VIBRATING ANTENNA AND APPLICATIONS THEREOF - The systems and methods described herein address deficiencies in the prior art by enabling spatial multiplexing in cellular and/or wireless networks to overcome capacity limitations. In one embodiment, the limitations are overcome by forming a spatially multiplexed network of portable communications devices having MEMS-based vibrating antennas. Other suitable applications of vibrating antennas are also described. | 05-03-2012 |
| 20120090393 | UNSTABLE ELECTROSTATIC SPRING ACCELEROMETER - The systems and methods described herein address deficiencies in the prior art by enabling the fabrication and use of accelerometers, whether MEMS-based, NEMS-based, or CMOS-MEMS based, in the same integrated circuit die as a CMOS chip. In one embodiment, the accelerometer is fabricated on the same integrated circuit die as a CMOS chip using a typical CMOS manufacturing process. | 04-19-2012 |
| 20100295138 | METHODS AND SYSTEMS FOR FABRICATION OF MEMS CMOS DEVICES - A MEMS integrated circuit including a plurality of layers where a portion includes one or more electronic elements on a semiconductor material substrate. The circuit includes a structure of interconnection layers having a bottom layer of conductor material and a top layer of conductor material where the layers are separated by at least one layer of dielectric material. The bottom layer may be formed above and in contact with an Inter Dielectric Layer. The circuit also includes a hollow space within the structure of interconnection layers and a MEMS device in communication with the structure of interconnection layers. | 11-25-2010 |
