| ASMEDIA TECHNOLOGY INC. Patent applications |
| Patent application number | Title | Published |
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| 20100169555 | METHOD OF WRITING DATA INTO FLASH MEMORY BASED ON FILE SYSTEM - A method of writing data into flash memory based on OS file system is provided. The method includes steps of: obtaining a data start position of a data area in a first partition of a flash memory; converting the data start position into a first block number and a first page number; calculating an offset and adding the offset to the first page number to be an updated first page number when the first page number is not an integer; and, setting the first block number and the updated first page number as a new data start position of the data area and writing a first data according to the new data start position. | 07-01-2010 |
| 20100153755 | VID PROCESSOR, VOLTAGE GENERATING CIRCUIT AND GENERATING METHOD - A VID processor includes a plurality of buffers, comparators, multiplexers and a core processing unit. The buffer may store a plurality of parameter values and a plurality of offset values. The buffers storing the parameter values may be coupled to the corresponding comparators, and other buffers may be coupled to the corresponding multiplexers. The comparator may compare the VID with the parameter values in the coupled buffer and output a selecting signal to the corresponding multiplexer according to the comparison outcome. Thus, the multiplexer may select and output one of the offset values to the core processing unit from the coupled buffer to allow the core processing unit to adjust the VID according to the output of the multiplexer. | 06-17-2010 |
| 20100153754 | METHOD FOR TRANSFORMING VOLTAGE IDENTIFICATION CODE OF A MICROPROCESSOR - The disclosure is related to a method for transforming voltage identification codes of a microprocessor. The method comprises the steps of: receiving a first voltage identification code of a first voltage regulation standard, wherein the first voltage identification code is in correspondence with a first voltage; and transforming the first voltage identification code into a second voltage identification code of a second voltage regulation standard, wherein the second voltage identification code is in correspondence with a second voltage, and the second voltage is the same as the first voltage. | 06-17-2010 |
| 20100149002 | METHOD FOR CONVERTING VOLTAGE IDENTIFICATION CODE AND COMPUTER SYSTEM - The invention relates to a method for converting a voltage identification code includes the steps as follows. A special binary code range is obtained, and N special voltage identification codes corresponding to a special command are converted to N special binary codes under a converting relation, and the N special binary codes are used as the special binary code range. A first voltage identification code is converted to a corresponding first binary code under the converting relation. In addition, the first binary code and a first preset value are used to compute to obtain a second binary code, and the second binary code is not in the special binary code range. | 06-17-2010 |
| 20100077248 | CLOCK GENERATING DEVICE, METHOD THEREOF AND COMPUTER SYSTEM USING THE SAME BACKGROUND OF THE INVENTION - A clock generating device, method thereof and a computer system using the same are provided. The clock generating device includes a PLL module and a tuning module. The PLL module receives a reference clock signal, and generates an output clock signal as a basic clock of a computer system according to a phase difference between a reference clock signal and a feedback signal. The PLL module includes a frequency divider adjusting an intrinsic frequency dividing ratio according to a control signal and performs a frequency dividing processing on the output clock signal to generate a feedback signal. The tuning module coupled with the PLL module generates the control signal according to a VID of a CPU and one of the feedback signal and the reference clock. Therefore, the operation frequency of the components serving the output clock signal as the basic frequency in the computer system can be synchronously tuned. | 03-25-2010 |
| 20090248965 | HYBRID FLASH MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME - A hybrid flash memory device and a control method of the hybrid flash memory device are provided. The hybrid flash memory device includes a micro controller connected to a host bus for receiving data to be written in the hybrid flash memory device from a host via the host bus; and a memory module coupled to the micro controller. The flash module includes a first type of flash memory and a second type of flash memory. The data are determined to be written in a first log block of the first type of flash memory when the data size is not greater than a predetermined data size. On the contrary, the data are determined to be written in a second log block of the second type of flash memory when the data size is greater than the predetermined data size. | 10-01-2009 |
| 20090241195 | DEVICE AND METHOD FOR PREVENTING VIRUS INFECTION OF HARD DISK - A device and a method for preventing virus infection of a hard disk are provided. The virus infection preventing device includes a storage media, a read-only memory, a control circuit and a switch. The virus infection preventing method includes steps of generating either a first signal or a second signal by a switch, and receiving a write command. If the write command allows data to be written into a boot sector of the hard disk and the first signal is generated by the switch, the write command is aborted. Whereas, if the write command allows data to be written into the boot sector of the hard disk and the second signal is generated by the switch, the write command is executed. | 09-24-2009 |
| 20090210758 | METHOD FOR REDUCING DATA ERROR WHEN FLASH MEMORY STORAGE DEVICE USING COPY BACK COMMAND - A method for a flash memory storage device to use a copy back command includes the following steps. The method includes the step of copying a data in a first block of a flash memory to a buffer outside the flash memory, checking if the data in the buffer is correct, and copying the data in the first block of the flash memory to a second block in the flash memory when the data in the buffer is correct. | 08-20-2009 |
| 20090172264 | SYSTEM AND METHOD OF INTEGRATING DATA ACCESSING COMMANDS - A data accessing command integration method includes the following steps. Firstly, M data accessing commands are sequentially received through a bus, wherein N data accessing commands contained in the M data accessing commands have the same command type and comply with a sequential address relationship. Next, the N data accessing commands are re-ordered according to the addressing sequence, so that a first data corresponding to the re-ordered N data accessing commands are sequentially accessed in the data memory. | 07-02-2009 |
