|APPLIED MATERIALS,INC. Patent applications|
|Patent application number||Title||Published|
|20110164955||PROCESSING CHAMBER WITH TRANSLATING WEAR PLATE FOR LIFT PIN - Embodiments of a method and apparatus for processing large area substrates including a translational wear plate and/or bushing assembly are provided for reducing the stress on a lift pin used to space substrates from a substrate support in a processing or other type of chamber. In another embodiment, an apparatus for processing substrates includes processing chamber comprising a substrate support disposed in a chamber body. A bushing assembly is disposed in the substrate support. A lift pin is disposed through the bushing assembly. A wear plate is provided that is coupled to the chamber body and aligned with the lift pin. The wear plate is movable laterally relative to a centerline of the chamber body to accommodate lateral motion of the lift pin when contacting the wear plate.||07-07-2011|
|20110053356||GAS MIXING METHOD REALIZED BY BACK DIFFUSION IN A PECVD SYSTEM WITH SHOWERHEAD - Embodiments of the present invention generally relate to methods of forming a microcrystalline silicon layer on a substrate in a deposition chamber. In, one embodiment, the method includes flowing a processing gas into a diffuser region between a backing plate and a showerhead of the deposition chamber, flowing the processing gas through a plurality of holes in the showerhead and into a process volume between the showerhead and a substrate support in the deposition chamber, igniting a plasma in the process volume, back-flowing gas ions formed in the plasma through the plurality of holes in the showerhead and into the diffuser region, mixing the gas ions and the processing gas in the diffuser region, re-flowing the gas ions and processing gas through the plurality of holes in the showerhead and into the process volume, and depositing a microcrystalline silicon layer on the substrate.||03-03-2011|
|20100104772||ELECTRODE AND POWER COUPLING SCHEME FOR UNIFORM PROCESS IN A LARGE-AREA PECVD CHAMBER - Embodiments discussed herein generally include electrodes having parallel ferrite boundaries that suppress RF currents perpendicular to the ferrite boundary and absorb magnetic field components parallel to the boundary. The ferrites cause the standing wave to stretch outside the ferrites and shrink inside the ferrite. A plurality of power sources are coupled to the electrode. The phase of the VHF current delivered from the power sources may be modulated to move the standing wave that is perpendicular to the ferrites in a direction parallel to the ferrites. Thus, the VHF current on the uncovered electrode area will be a plane wave, quasi-uniform (in a direction perpendicular to the ferrites) propagating in the direction parallel to the ferrites.||04-29-2010|
|20100001346||Treatment of Gate Dielectric for Making High Performance Metal Oxide and Metal Oxynitride Thin Film Transistors - Embodiments of the present invention generally include TFTs and methods for their manufacture. The gate dielectric layer in the TFT may affect the threshold voltage of the TFT. By treating the gate dielectric layer prior to depositing the active channel material, the threshold voltage may be improved. One method of treating the gate dielectric involves exposing the gate dielectric layer to N||01-07-2010|
Patent applications by APPLIED MATERIALS,INC.