| AMERICAN PANEL CORPORATION, INC. Patent applications |
| Patent application number | Title | Published |
|---|
| 20100271570 | FLAT PANEL DISPLAY HAVING AN EMI SHIELD AND THERMAL SENSORS - A flat panel display having a black mask EMI layer isolated from Vcom and tied to zero potential. The flat panel display has an integral metal heater layer and thermal sensor that are in close proximity to the liquid crystals to provide efficient heating and temperature sensing. | 10-28-2010 |
| 20100220052 | WIDE FLAT PANEL LCD WITH UNITARY VISUAL DISPLAY - A flat panel display, particularly a liquid crystal display has a front plate with a plate area defined by a plate perimeter, which is in turn defined by a first and second pair of parallel sides, the pairs of sides in perpendicular relationship to each other. An active display area providing a unitary visual display is located within the plate perimeter. In the invention, this active display area is divided into at least first and second display areas, a visual output of said first and second display areas being separately driven. In some embodiments, one or both of the display areas is subdivided into first and second subdisplay areas, with the visual output of the first and second subdisplay areas being separately driven. | 09-02-2010 |
| 20090322987 | CHANNELIZED PLATE - Preferred embodiments utilize a plurality of optical channels to effectively aim the light emitted by a liquid crystal display (LCD). Embodiments may also change the nominal and range of viewing angles of light in two or three dimensions in order to confine the emitted light towards the intended observer. | 12-31-2009 |
| 20090295843 | WIDE FLAT PANEL LCD WITH UNITARY VISUAL DISPLAY - A flat panel display, particularly a liquid crystal display has a front plate with a plate area defined by a plate perimeter, which is in turn defined by a first and second pair of parallel sides, the pairs of sides in perpendicular relationship to each other. An active display area providing a unitary visual display is located within the plate perimeter. In the invention, this active display area is divided into at least first and second display areas, a visual output of said first and second display areas being separately driven. In some embodiments, one or both of the display areas is subdivided into first and second subdisplay areas, with the visual output of the first and second subdisplay areas being separately driven. | 12-03-2009 |
| 20090256851 | METHOD FOR REDUCING VIDEO IMAGE LATENCY - Image latency is reduced in a video display system where an image is displayed for a stroke video frame period. The system has a display device and a plurality of memory buffers, each of which is adapted to receive image data (in a receiving condition) or to display data to the display device (in a display condition). The stroke video frame period is divided into at least two time periods and the number of memory buffers provided is at least the number of time periods per stroke video frame period. One of the memory buffers is in the display condition for a first time period, with the remaining memory buffers in the receiving condition. At the end of the time period, the memory buffers are rotated so that the displayed memory buffer moves to the receiving condition and one of the receiving buffers moves into the display condition. | 10-15-2009 |
| 20090251473 | RESOLVING IMAGE / DATA MISMATCH VIA ON-OFF PATTERN - A two-dimensional panel, particularly a liquid crystal display device, has a maximum display area with a width of (T×M) addressable channels. The addressable channels are addressed through a plurality of T source channel integrated circuits (ICs), with each source channel IC having M source channels. The number of addressable channels exceeds the number of channels of data in an image display data array having a width of W pixels, each pixel comprising P subpixels in the width dimension. The excess addressable channels are distributed symmetrically across the width dimension of the displayed image. In other embodiments the number of addressable channels is less than the number of channels of data and excess channels of data are excluded symmetrically across the width dimension of the displayed image. Further embodiments distribute excess addressable channels symmetrically across the height dimension or exclude excess channels of data symmetrically across the height dimension. | 10-08-2009 |
