AMAZING MICROELECTRONIC CORP. Patent applications |
Patent application number | Title | Published |
20150145557 | SERIAL TRANSMISSION DRIVING METHOD - The present invention discloses a serial transmission driving method, wherein a serial transmission driving device (STD) is connected with a first terminal (FT) and a second terminal (ST) of an equivalent load capacitor through a first differential bus (FDB) and a second differential bus (SDB). FDB and SDB are respectively connected with a high-potential terminal (HPT) and a low-potential terminal (LPT) through a first equivalent resistor and a second equivalent resistor. STD receives a trigger signal (TS) appearing during the transition between a turn-on signal (Ton) and a turn-off signal (Toff), generates a first potential (FP) and a second potential (SP) greater than FP according to TS, and respectively applies FP and SP to SDB and FDB. FP and SP fast change the potential of FT to be greater than that of ST. HPT and LPT maintain potentials of FDB and SDB until Toff ends. | 05-28-2015 |
20150041848 | SILICON-CONTROLLED RECTIFICATION DEVICE WITH HIGH EFFICIENCY - A silicon-controlled rectification device with high efficiency is disclosed, which comprises a P-type region surrounding an N-type region. A first P-type heavily doped area is arranged in the N-type region and connected with a high-voltage terminal. A plurality of second N-type heavily doped areas is arranged in the N-type region. A plurality of second P-type heavily doped areas is closer to the second N-type heavily doped areas than the first N-type heavily doped area and arranged in the P-type region. At least one third N-type heavily doped area is arranged in the P-type region and connected with a low-voltage terminal. Alternatively or in combination, the second N-type heavily doped areas and the second P-type heavily doped areas are respectively arranged in the P-type region and the N-type region. | 02-12-2015 |
20140106064 | METHOD FOR FABRICATING A PLANAR MICRO-TUBE DISCHARGER STRUCTURE - A method for fabricating a semiconductor-based planar micro-tube discharger structure is provided, including the steps of forming on a substrate two patterned electrodes separated by a gap and at least one separating block arranged in the gap, forming an insulating layer over the patterned electrodes and the separating block., and filling the insulating layer into the gap. At least two discharge paths are formed. The method can fabricate a plurality of discharge paths in a semiconductor structure, the structure having very high reliability and reusability. | 04-17-2014 |
20140063663 | POWER-RAIL ELECTRO-STATIC DISCHARGE (ESD) CLAMP CIRCUIT - A power-rail ESD clamp circuit with a silicon controlled rectifier and a control module is provided. The silicon controlled rectifier is connected to a high voltage level and a low voltage level for bearing a current flow. The control module is connected to the silicon controlled rectifier in parallel, and includes a PMOS, a NMOS, at least one output diode, a resistor and a conducting string. The silicon controlled rectifier is a P+ or N+ triggered silicon controlled rectifier. By employing the novel power-rail ESD clamp circuit, it is extraordinarily advantageous of reducing both a standby leakage current and layout area while implementation. | 03-06-2014 |
20120068299 | TRANSIENT VOLTAGE SUPPRESSORS - The present invention relates a transient voltage suppressor (TVS) for directional ESD protection. The TVS includes: a conductivity type substrate; a first type lightly doped region, having a first type heavily doped region arranged therein; a second type lightly doped region, having a second type heavily doped region and a third type heavily doped region arranged therein; a third type lightly doped region, having a fourth type heavily doped region arranged therein; a plurality of closed isolation trenches, arranged on the conductivity type substrate, wherein at least one of the plurality of closed isolation trenches is neighbored one of the type lightly doped regions; and a first pin. Accordingly, the TVS of present invention may adaptively provide effective ESD protection under positive and negative ESD stresses, improve the efficiency of ESD protection within the limited layout area. | 03-22-2012 |
20120025350 | VERTICAL TRANSIENT VOLTAGE SUPPRESSORS - A vertical transient voltage suppressor for protecting an electronic device is disclosed. The vertical transient voltage includes a conductivity type substrate having highly doping concentration; a first type lightly doped region is arranged on the conductivity type substrate, wherein the conductivity type substrate and the first type lightly doped region respectively belong to opposite types; a first type heavily doped region and a second type heavily doped region are arranged in the first type lightly doped region, wherein the first and second type heavily doped regions and the conductivity type substrate belong to same types; and a deep first type heavily doped region is arranged on the conductivity type substrate and neighbors the first type lightly doped region, wherein the deep first type heavily doped region and the first type lightly doped region respectively belong to opposite types, and wherein the deep first type heavily doped region is coupled to the first type heavily doped region. | 02-02-2012 |
20120018778 | ESD PROTECTION DEVICE WITH VERTICAL TRANSISTOR STRUCTURE - A new ESD protection device with an integrated-circuit vertical transistor structure is disclosed, which includes a heavily doped p-type substrate (P | 01-26-2012 |
20110214902 | PACKAGE STRUCTURE AND ELECTRONIC APPARATUS OF THE SAME - A package structure and an electronic apparatus of the package structure are disclosed. The package structure includes a substrate and a plurality of pins. The plurality of pins is disposed on the substrate. The plurality of pins is interlaced to each other, so that a line along a specific direction will only pass one of the plurality of pins at most. | 09-08-2011 |
20110110539 | SELF-OSCILLATING AUDIO AMPLIFIER AND METHOD FOR RESTRAINING THE IMPROVED SELF-OSCILLATING AUDIO AMPLIFIER - An improved self-oscillating audio amplifier and a method for restraining audio distortion of the self-oscillating audio amplifier are disclosed. The improved self-oscillating audio amplifier comprises a distortion restraint unit configured to detect whether modulated audio signals outputted from the self-oscillating audio amplifier is distorted and, if so, to restrain the distortion. The method for restraining audio distortion of the self-oscillating audio amplifier includes the following steps of: determining whether the modulated audio signals outputted from an audio amplifier positive output terminal is distorted by a first flip-flop set, and if yes, restraining the distortion of the modulated audio signals outputted from the audio amplifier positive output terminal; and outputting the modulated audio signals to drive a speaker by the audio amplifier positive output terminal and an audio amplifier negative output terminal. | 05-12-2011 |
20110110538 | POWER AMPLIFIER AND METHOD FOR RESTRAINING POWER OF IMPROVED POWER AMPLIFIER - The present invention is related to an improved power amplifier and a method for restraining power of the improved power amplifier. The improved power amplifier has an output power restraint unit, and the output power restraint unit is capable of restraining output power of the improved power amplifier when the output power is exceedingly large. A method for restraining power of a power amplifier, the method comprises the steps of: determining whether power of output powers signal are exceedingly large through a power signal transformation unit, if yes, adjusting two variable resistor of an input amplifier unit for adjusting the power of the power signals, and outputting the adjusted power signals for driving a load via output terminals of the power amplifier. | 05-12-2011 |
20110109386 | CLASS D AMPLIFIER CAPABLE OF SETTING RESTRAINT POWER - A Class D amplifier capable of setting restraint power is provided, which comprises: an audio amplification unit, a pulse width modulation (PWM) unit, a first pre-drive unit, a second pre-drive unit, a first power transistor set, a second power transistor set and a power restraint unit. The power restraint unit has a comparator circuit and a power restraint circuit. The comparator circuit is configured to compare the level of first/second amplified audio signals against the level of a first reference voltage that is externally settable. When the high level of the first/second amplified audio signals is higher than the level of the first reference voltage, the comparator circuit outputs a first comparison signal and a second comparison signal to the power restraint circuit to restrain the power. | 05-12-2011 |
20100315754 | TRANSIENT VOLTAGE DETECTION CIRCUIT - The invention discloses a transient voltage detection circuit suitable for an electronic system. The electronic system includes a high voltage line and a low voltage line. The transient voltage detection circuit includes at least one detection circuit and a judge module. Each detection circuit includes a P-typed transistor and/or an N-typed transistor, a capacitor and a detection node. The transistor is coupled with the capacitor, and the detection node is located between the transistor and the capacitor. The judge module is coupled to each of the detection nodes. The judge module generates a judgment according to voltage levels of the detection nodes. Accordingly, the transient voltage detection circuit is formed. The electronic system may selectively execute a protective action according to the judgment. | 12-16-2010 |
20100253427 | CLASS-D AMPLIFIER - The invention discloses a class-D amplifier, which is used for driving a two-terminal load according to a set of analog signals. The D-class amplifier includes a pulse-width modulation (PWM) circuit, a signal processing circuit and a driving amplifier circuit. The PWM circuit receives the set of analog signals and converts them into a set of PWM signals with identical phase. The signal processing circuit generates a set of pulse signals which are attached to the set of PWM signals respectively. The driving amplifier circuit is coupled between the signal processing circuit and the two-terminal load. The driving amplifier circuit receives and amplifies the set of PWM signals. According to the set of PWM signals, the driving amplification circuit drives the two-terminal in a filterless way. | 10-07-2010 |
20100155774 | BI-DIRECTIONAL TRANSIENT VOLTAGE SUPPRESSION DEVICE AND FORMING METHOD THEREOF - A bidirectional transient voltage suppression device is disclosed. The bi-directional transient voltage suppression device comprises a semiconductor die. The semiconductor die has a multi-layer structure comprising a semiconductor substrate of a first conductivity type, a buried layer of a second conductivity type, an epitaxial layer, and five diffused regions. The buried layer and the semiconductor substrate form a first semiconductor junction. The first diffused region of the second conductivity type and the semiconductor substrate form a second semiconductor junction. The fourth diffused region of the first conductivity type and the third diffused region of the second conductivity type form a third semiconductor junction. The fifth diffused region of the first conductivity type and the second diffused region of the second conductivity type form a fourth semiconductor junction. | 06-24-2010 |
20090296293 | ESD PROTECTION CIRCUIT FOR DIFFERENTIAL I/O PAIR - An ESD protection circuit for a differential I/O pair is provided. The circuit includes an ESD detection circuit, a discharge device, and four diodes. The first diode is coupled between the first I/O pin and the discharge device in a forward direction toward the discharge device. The second diode is coupled between the second I/O pin and the discharge device in a forward direction toward the second I/O pin. The third diode is coupled between the discharge device and the positive power line in a forward direction toward the positive power line. The fourth diode is coupled between the discharge device and the negative power line in a forward direction toward the discharge device. Via an output end, the ESD detection circuit triggers the discharge device during ESD events. | 12-03-2009 |
20090287435 | SYSTEM-LEVEL ESD DETECTION CIRCUIT - An ESD detection circuit for detecting a level of an ESD voltage on a power rail is provided. The ESD detection circuit includes a resistive component, a diode unit, and a controller. The resistive component is coupled between a detection node and a ground node corresponding to the power rail. The diode unit is coupled between the power rail and the detection node in a forward direction toward the power rail. The controller, coupled to the detection node, is used for determining the level of the ESD voltage based on the voltage of the detection node and the breakdown voltage of the diode unit. | 11-19-2009 |