| ADVANCED MICRO DEVICES Patent applications |
| Patent application number | Title | Published |
|---|
| 20100205408 | Speculative Region: Hardware Support for Selective Transactional Memory Access Annotation Using Instruction Prefix - A computer system and method is disclosed for executing selectively annotated transactional regions. The system is configured to determine whether an instruction within a plurality of instructions in a transactional region includes a given prefix. The prefix indicates that one or more memory operations performed by the processor to complete the instruction are to be executed as part of an atomic transaction. The atomic transaction can include one or more other memory operations performed by the processor to complete one or more others of the plurality of instructions in the transactional region. | 08-12-2010 |
| 20090287895 | Secure Memory Access System - A secure memory access system includes a memory control module, at least one direct memory access module, and a plurality of input/output interface modules. The direct memory access module is operative to transfer information between all of the input/output interface modules and the memory control module in response to transfer configuration information. | 11-19-2009 |
| 20090168854 | De-Emphasis Circuit for a Voltage Mode Driver Used to Communicate Via a Differential Communication Link - A circuit for de-emphasizing information transmitted via a differential communication link includes a voltage mode differential circuit and a bi-directional current source circuit. The voltage mode differential circuit includes a first and second output terminal. The voltage mode differential circuit provides a first voltage via the first output terminal and second voltage via the second output terminal in response to a differential input voltage. The bi-directional current source circuit is operatively coupled between the first and second terminals. The bi-directional current source circuit selectively provides current in a first and second direction between the first and second terminals based on the first and second voltage. | 07-02-2009 |
| 20090087114 | Response Time Compression Using a Complexity Value of Image Information - An apparatus includes a control module and an activity module. The control module provides error control information based on a target number of bits and an actual number of bits required to pack at least one compressed block of image information. The activity module provides a quantization factor based on the error control information and a complexity value of the at least one compressed block of image information. The quantization factor is used to pack the at least one compressed block of image information into a bitstream comprising the target number of bits. | 04-02-2009 |
| 20090087108 | Intra Motion Prediction for Response Time Compensation - An apparatus for a response time compensation system includes a plurality of complexity modules and a motion vector module. The complexity modules determine a plurality of complexity values based on current image information and prior image information. The motion vector module determines a desired complexity value based on a lowest of complexity values. The motion vector determines a desired motion vector based on the lowest of the plurality of complexity values. The desired complexity value and the desired motion vector are used to compress the current image information into a compressed bitstream. The compressed bitstream is used by the response time compensation system to provide display element response time compensation information for a display. | 04-02-2009 |
| 20090087107 | Compression Method and Apparatus for Response Time Compensation - An apparatus for response time compensation includes a compression module, a decompression module, a display element response time compensation module, and a bypass control module. The compression module compresses a current frame to produce a compressed previous frame of image information. The decompression module decompresses the compressed previous frame of image information to produce a decompressed previous frame of image information. The display element response time compensation module provides display compensation information for a display based on the current frame and the decompressed previous frame. The bypass control module causes the current frame information to selectively bypass the compression module, the decompression module, and/or the display element response time compensation module based on display mode information. | 04-02-2009 |
| 20090077274 | Multi-Priority Communication in a Differential Serial Communication Link - A circuit includes a high priority circuit and a non-high priority circuit. The high priority circuit is operative to communicate high priority information to a single path of a differential serial communication link. The non-high priority circuit communicates non-high priority information to the single path. The high priority information is communicated prior to the non-high priority information. In one example, the circuit includes a flow control distributor operatively coupled to the high priority circuit and the non-high priority circuit. The flow control distributor distributes a total number of flow control credits into high priority credits and non-high priority credits. The flow control distributor controls communication of the high priority information based on the high priority credits. The flow control distributor controls communication of the non-high priority information based on the non-high priority credits. | 03-19-2009 |
