| Advanced Analogic Technologies, Inc. Patent applications |
| Patent application number | Title | Published |
|---|
| 20110260246 | Isolated Transistor - A transistor is formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. | 10-27-2011 |
| 20110248691 | Method Of Starting DC/DC Converter Using Synchronous Freewheeling MOSFET - A DC/DC converter including an inductor and a capacitor is started by connecting an input voltage to the inductor and shunting a current around the inductor so as to pre-charge the capacitor to a predetermined voltage. | 10-13-2011 |
| 20110201171 | Processes For Forming Isolation Structures For Integrated Circuit Devices - Processes for forming isolation structures for semiconductor devices include forming a submerged floor isolation region and a filed trench which together enclose an isolated pocket of the substrate. One process aligns the trench to the floor isolation region. In another process a second, narrower trench is formed in the isolated pocket and filled with a dielectric material while the dielectric material is deposited so as to line the walls and floor of the first trench. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same. | 08-18-2011 |
| 20110018593 | MOSFET gate drive with reduced power loss - A gate driver for a power MOSFET in, for example, a DC-DC converter switches the MOSFET between a fully-on condition and a low-current condition instead of switching the MOSFET between fully-on and fully-off conditions. The amount of charge that must be transferred to charge and discharge the gate of the MOSFET is thereby reduced, and the efficiency of the MOSFET is improved. A trimming process is used to adjust the magnitude of the voltage supplied by the gate driver to the gate of the power MOSFET in the low-current condition. | 01-27-2011 |
| 20110012196 | Isolated drain-centric lateral MOSFET - A lateral MOSFET formed in a substrate of a first conductivity type includes a gate formed atop a gate dielectric layer over a surface of the substrate, a drain region of a second conductivity type, a source region of a second conductivity type, and a body region of the first conductivity type which extends under the gate. The body region may have a non-monotonic vertical doping profile with a portion located deeper in the substrate having a higher doping concentration than a portion located shallower in the substrate. The lateral MOSFET is drain-centric, with the source region and a dielectric-filled trench surrounding the drain region. | 01-20-2011 |
| 20100232081 | Method and Apparatus for Over-voltage Protection With Breakdown-Voltage Tracking Sense Element - A power integrated circuit with internal over-voltage protection includes a power transistor monolithically integrated with a sense element and a control circuit. The power transistor is connected to an output terminal that is connected (or is connectable) to an external load. The sense element is connected to the output terminal in parallel with the power transistor. The sense element is constructed to be similar to the power transistor except that the sense element has a lower breakdown voltage. When the voltage of the output terminal exceeds the breakdown voltage of the sense element a breakdown current flows from the gate of the sense element to the control circuit. Inside the control circuit, a comparator or other over-voltage protection circuit monitors this feedback and controls the power transistor accordingly to protect the power integrated circuit from damage. | 09-16-2010 |
| 20100231172 | High Efficiency Switching Linear Battery Charger with Low Power Dissipation - A battery charger for a portable electronic device includes a linear charger to generate a substantially constant current for charging the battery and a switching voltage regulator to convert power supplied by an external adapter to a supply voltage for the linear charger. A feedback circuit controls operation of the switching voltage regulator so that the voltage supplied to the linear charger is substantially equal to the combination of the battery voltage and the drain-to-source voltage of the linear charger. In this way, power dissipation by the linear charger is minimized without requiring the use of a high accuracy current limited adapter. | 09-16-2010 |
| 20100230790 | Semiconductor Carrier for Multi-Chip Packaging - A power semiconductor product includes a carrier attached to a leadframe. An insulating layer is formed on the carrier and two or more conductive plates are patterned on the insulating layer. A control IC is attached to one of these conductive plates and a power transistor is attached to the other. Bond wires connect the first conductive plate to a pin on the leadframe. Additional bond wires attach the control IC to pins on the leadframe and form connections between the control IC and the power transistor. | 09-16-2010 |
| 20100149713 | Current Limit Control with Current Limit Detector - Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include circuitry to limit currents so as not to exceed a pre-programmed current limit. Various embodiments of the present invention include devices and methods for detecting pre-programmed current limits and for limiting currents in response to such detection. In some embodiments, both the current limit detector and the current limit controller circuitry include scaled current switches. The scaling may be substantially similar between the programmed-current limit detector and the current limit controller circuitry. | 06-17-2010 |
| 20100133611 | Isolated transistor - A transistor is formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. | 06-03-2010 |
| 20100079114 | SYSTEMS AND METHODS FOR CHARGING A BATTERY WITH A DIGITAL CHARGE REDUCTION LOOP - Exemplary systems and methods for charging a battery with a digital charge reduction loop are described herein. In some embodiments, a system comprises an exemplary digital charge reduction loop which comprises a circuit for determining a charge-current adjustment signal, a counter for generating a digital count value, and a digital-to-analog converter. The circuit for determining a charge-current adjustment signal may base the determination on a source voltage of an input source. The counter may generate a digital count value based on the charge-current adjustment signal. The digital-to-analog converter (DAC) may generate a DAC control signal based on the digital count value of the counter, the DAC control signal being representative of an amount of charge current to be used to charge a battery. | 04-01-2010 |
| 20100055864 | Method of forming isolation structure for semiconductor integrated circuit substrate - Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths. | 03-04-2010 |
| 20100045248 | Bi-directional Boost-Buck Voltage Converter - A bi-directional Boost-Buck voltage converter includes a controller, a high-voltage capacitor, a lower-voltage battery, a resistive load, an inductor, and three or four switches, and provides a mechanism to efficiently provide power to the resistive load from the battery. It uses two configurations of the switches to configure the battery, the inductor, and the capacitor in a boost converter configuration to charge the capacitor from the battery. It uses two different configurations of the switches to configure the capacitor, the inductor, and the resistive load in a buck converter configuration to discharge the capacitor through the inductor and the resistive load. | 02-25-2010 |
| 20100045245 | Control Method for DC/DC Converters and Switching Regulators - A circuit for controlling a switching regulator includes a switching control circuit configured to operate one or more switches in a repeating sequence that includes a first state in which an inductor is coupled between an input supply and a load so that an increasing current passes from the input supply through the inductor and a second state in which the inductor is coupled between ground and the load so that a decreasing current passes through the inductor to the load; a circuit configured to cause the switching circuit to select the second state when the magnitude of the increasing current has reached a predetermined level; and a timing circuit configured to cause the switching circuit to select the second state for a predetermined period of time after the initiation of each second first. | 02-25-2010 |
| 20100002473 | Multiple-Output Dual-Polarity DC/DC Converters and Voltage Regulators - A multi-output dual polarity inductive boost converter includes an inductor, a first output node, a second output node, and a switching network, the switching network configured to provide the following modes of circuit operation: a first mode where the positive electrode of the inductor is connected to an input voltage and the negative electrode of the inductor is connected to ground; 2) a second mode the negative electrode of the inductor is connected to ground and the positive electrode of the inductor is connected in sequence to one or more of the fourth and fifth output nodes; and 3) a third mode where the positive electrode of the inductor is connected to the input voltage and the negative electrode of the inductor is connected in sequence to one or more of the first, second and third output nodes. | 01-07-2010 |
| 20100001704 | Programmable Step-Down Switching Voltage Regulators with Adaptive Power MOSFETs - A step-down switching voltage regulator includes M high-side switches connected between an input voltage and a node; N synchronous rectifiers connected between the node Vx and a ground voltage and an inductor connected between an input voltage and a node Vx and an inductor connected between the node Vx and an output node. An interface circuit decodes a control signal to identify: 1) a subset (m) of the high-side switches, 2) a subset (n) of the synchronous rectifiers. A control circuit drives the high-side switches and synchronous rectifiers in a repeating sequence that includes an inductor charging phase where the high-side switches in the subset m are activated to connect the node Vx to the input voltage; and an inductor discharging phase where the synchronous rectifiers in the subset n are activated to connect the node Vx to the ground voltage. | 01-07-2010 |
| 20100001703 | Programmable Step-Up Switching Voltage Regulators with Adaptive Power MOSFETs - A step-up switching voltage regulator includes an inductor connected between an input voltage and a node Vx, M low-side switches connected between the node Vx and a ground voltage and N synchronous rectifiers connected between the node Vx and an output node. An interface circuit that decodes a control signal to identify: 1) a subset (m) of the low-side switches, 2) a subset (n) of the synchronous rectifiers, and 3) a reference voltage V | 01-07-2010 |
| 20090236683 | Isolation structures for integrated circuits - A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate. | 09-24-2009 |
| 20090215237 | Method of forming lateral trench MOSFET with direct trench polysilicon contact - A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional surface polysilicon bridge layer. The conductive plug is formed in a substantially vertical hole in the dielectric layer. The gate bus segment may be wider than the device segment of the trench. A method includes forming a shallow trench isolation (STI) while the conductive material in the trench is etched. | 08-27-2009 |
| 20090206808 | Method for Generating an Internal Compensation Network of a Pole and Two Zeros to Compensate High Frequency Voltage Mode Switching Regulators - A method for controlling a switching voltage regulator that includes generating a feedback voltage that is proportional to the output voltage of the voltage regulator; generating a voltage proportional to the duty-cycle of the inductor charging and discharging phases as a function of the difference between the feedback voltage and a reference voltage; and adding a dominate pole and two zeros to the function used to generate the voltage proportional to the duty-cycle of the inductor charging and discharging phases. | 08-20-2009 |
| 20090206402 | Lateral Trench MOSFET with Bi-Directional Voltage Blocking - A lateral trench DMOS device formed in a substrate of a first conductivity type includes a trench extending downward from a surface of the substrate, the trench lined with a dielectric layer and containing a gate electrode. The device includes a source region of a second conductivity type adjacent the surface of the substrate and a sidewall of the trench, a drain region of the second conductivity type adjacent the surface of the substrate and spaced apart from the source region, a body region of the first conductivity type adjacent the source region and the sidewall of the trench, a drift region of the second conductivity type adjacent the body region, the sidewall of the trench and the drain region; and a body contact region of the first conductivity type disposed in the body region and spaced apart from the source region. | 08-20-2009 |
| 20090206397 | Lateral Trench MOSFET with Conformal Depletion-Assist Layer - A lateral trench DMOS device formed in a substrate of a first conductivity type includes a vertical trench lined with a dielectric layer and containing a gate electrode. A source region of a second conductivity is adjacent the surface of the substrate and a sidewall of the trench. A drain region of the second conductivity type is adjacent the surface of the substrate and spaced apart from the source region. A field oxide region is disposed at the surface of the substrate between the source region and the drain region and a drift region of the second conductivity type extends laterally from the trench sidewall to the drain region. A body region of a first conductivity type is disposed between the source region and the drift region, the body region adjacent the trench sidewall where the body region has a profile that is conformal to the field oxide region. | 08-20-2009 |
| 20090102493 | Power Integrated Circuit with Bond-Wire Current Sense - An integrated circuit product includes: 1) a package, 2) a semiconductor die mounted within the package, 3) a first terminal and a second terminal for connecting the integrated circuit product to an external circuit, 4) one or more bond wires for transferring a current received at the first terminal to the second terminal; and 5) a circuit included in the semiconductor die that measures a voltage difference attributable to the resistance of the bond wires to measure the magnitude of the current passing through the first terminal. | 04-23-2009 |
| 20090102440 | Buck-Boost Switching Voltage Regulator - A buck-boost switching regulator includes two buck switches and two boost switches. Two ramp voltages VY and VY are generated. The voltage VY is compared to a voltage VEA | 04-23-2009 |
| 20090102439 | Step-up DC/DC voltage converter with improved transient current capability - A DC/DC voltage converter includes an inductive switching voltage regulator and a capacitive charge pump connected in series between the input and output terminals of the converter. The charge pump has a second input terminal connected to the input terminal of the converter. This reduces the series resistance in the current path by which charge is transferred from the capacitor in the charge pump to the output capacitor and thereby improves the ability of the converter to respond to rapid changes in current required by the load. | 04-23-2009 |
| 20090059630 | High-efficiency DC/DC voltage converter including capacitive switching pre-converter and down inductive switching post-regulator - A DC/DC converter includes a pre-converter stage, which may include a charge pump, and a post-regulator stage, which may include a Buck converter. The duty factor of the post-regulator stage is controlled by a feedback path that extends from the output terminal of the DC/DC converter to an input terminal in the post-regulator stage. The pre-converter steps the input DC voltage up or down by a positive or negative integral or fractional value, and the post-regulator steps the voltage down by a variable amount depending on the duty factor at which the post-regulator is driven. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios. | 03-05-2009 |
| 20090045788 | High Voltage SEPIC Converter - A SEPIC converter with over-voltage protection includes a high-side inductor that connects a node V | 02-19-2009 |
| 20090040794 | Time-Multiplexed Multi-Output DC/DC Converters and Voltage Regulators - A boost switching converter with multiple outputs includes an inductor is connected between an input supply (typically a battery) and a node V | 02-12-2009 |
| 20090039947 | Time-Multiplexed-Capacitor DC/DC Converter with Multiple Outputs - A multiple output DC-to-DC voltage converter using a new time-multiplexed-capacitor converter algorithm and related circuit topologies is herein disclosed. One embodiment of this invention includes a flying capacitor, a first output node, a second output node, and a switching network. The switching network configured to provide the following modes of circuit operation: 1) a first mode where the positive electrode of the flying capacitor is connected to an input voltage and the negative electrode of the flying capacitor is connected to ground; 2) a second mode where the negative electrode of the flying capacitor is connected to the input voltage and the positive electrode of the flying capacitor is connected to the first output node; and 3) a third mode where the positive electrode of the flying capacitor is connected to ground and the negative electrode of the flying capacitor is connected to the second output node. | 02-12-2009 |
| 20090039869 | Cascode Current Sensor For Discrete Power Semiconductor Devices - A cascode current sensor includes a main MOSFET and a sense MOSFET. The drain terminal of the main MOSFET is connected to a power device whose current is to be monitored, and the source and gate terminals of the main MOSFET are connected to the source and gate terminals, respectively, of the sense MOSFET. The drain voltages of the main and sense MOSFETs are equalized, in one embodiment by using a variable current source and negative feedback. The gate width of the main MOSFET is typically larger than the gate width of the sense MOSFET. Using the size ratio of the gate widths, the current in the main MOSFET is measured by sensing the magnitude of the current in the sense MOSFET. Inserting the relatively large MOSFET in the power circuit minimizes power loss. | 02-12-2009 |
| 20090039711 | Dual-Polarity Multi-Output DC/DC Converters and Voltage Regulators - A two-output dual polarity inductive boost converter includes an inductor, a first output node, a second output node, and a switching network, the switching network configured to provide the following modes of circuit operation: 1) a first mode where the positive electrode of the inductor is connected to an input voltage and the negative electrode of the inductor is connected to ground; 2) a second mode where the positive electrode of the inductor is connected to the first output node and the negative electrode of the inductor is connected to the second output node; and 3) a third mode where the positive electrode of the inductor is connected to the input voltage and the negative electrode of the inductor is connected to the second output node. | 02-12-2009 |
| 20090034137 | ESD protection for bipolar-CMOS-DMOS integrated circuit devices - An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage. | 02-05-2009 |
| 20090034136 | ESD protection for bipolar-CMOS-DMOS integrated circuit devices - An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage. | 02-05-2009 |
| 20090032876 | ESD protection for bipolar-CMOS-DMOS integrated circuit devices - An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage. | 02-05-2009 |
| 20090010035 | Boost and up-down switching regulator with synchronous freewheeling MOSFET - A freewheeling MOSFET is connected in parallel with the inductor in a switched DC/DC converter. When the freewheeling MOSFET is turned on during the switching operation of the converter, while the low-side and energy transfer MOSFETs are turned off, the inductor current circulates or “freewheels” through the freewheeling MOSFET. The frequency of the converter is thereby made independent of the lengths of the magnetizing and energy transfer stages, allowing far greater flexibility in operating and converter and overcoming numerous problems associated with conventional DC/DC converters. For example, the converter may operate in either step-up or step-down mode and may even transition for one mode to the other as the values of the input voltage and desired output voltage vary. | 01-08-2009 |
| 20080293214 | Method of fabricating trench-constrained isolation diffusion for semiconductor devices - A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices can be spaced more closely together on the substrate, and the packing density of the devices can be increased. Also trench constrained doped region diffuse faster and deeper than unconstrained diffusions, thereby reducing the time and temperature needed to complete a desired depth diffusion. The technique may be used for semiconductor devices such as bipolar transistors as well as isolation regions that electrically isolate the devices from each other. In one group of embodiments, a buried layer is formed at an interface between an epitaxial layer and a substrate, at a location generally below the dopant in the mesa. When the substrate is subjected to thermal processing, the buried layer diffuses upward, the dopant in the mesa diffuses downward until the two dopants merge to form an isolation region or a sinker extending downward from the surface of the epitaxial layer to the buried layer. In another embodiment, dopant is implanted between dielectrically filled trenches at a high energy up to several MeV, then diffused, combining the benefits of deep implantation and trenched constrained diffusion to achive deep diffusions with a minimal thermal budget. | 11-27-2008 |
| 20080291711 | Step-down switching regulator with freewheeling diode - A freewheeling DC/DC step-down converter includes a high-side MOSFET, an inductor and an output capacitor connected between the input voltage and ground. A freewheeling clamp, which includes a freewheeling MOSFET and diode, is connected across the inductor. When the high-side MOSFET is turned off, a current circulates through the inductor and freewheeling clamp rather than to ground, improving the efficiency of the converter. The converter has softer diode recovery and less voltage overshoot and noise than conventional Buck converters and features unique benefits during light-load conditions. | 11-27-2008 |
| 20080290911 | MOSFET gate drive with reduced power loss - A gate driver for a power MOSFET in, for example, a DC-DC converter switches the MOSFET between a fully-on condition and a low-current condition instead of switching the MOSFET between fully-on and fully-off conditions. The amount of charge that must be transferred to charge and discharge the gate of the MOSFET is thereby reduced, and the efficiency of the MOSFET is improved. A feedback circuit may be used to assure that the magnitude of current in the power MOSFET in its low-current condition is correct. Alternatively, a trimming process may be used to correct the magnitude of the voltage supplied by the gate driver to the gate of the power MOSFET in the low-current condition. | 11-27-2008 |
| 20080290452 | Trench-constrained isolation diffusion for integrated circuit die - A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices can be spaced more closely together on the substrate, and the packing density of the devices can be increased. Also trench constrained doped region diffuse faster and deeper than unconstrained diffusions, thereby reducing the time and temperature needed to complete a desired depth diffusion. The technique may be used for semiconductor devices such as bipolar transistors as well as isolation regions that electrically isolate the devices from each other. In one group of embodiments, a buried layer is formed at an interface between an epitaxial layer and a substrate, at a location generally below the dopant in the mesa. When the substrate is subjected to thermal processing, the buried layer diffuses upward, the dopant in the mesa diffuses downward until the two dopants merge to form an isolation region or a sinker extending downward from the surface of the epitaxial layer to the buried layer. In another embodiment, dopant is implanted between dielectrically filled trenches at a high energy up to several MeV, then diffused, combining the benefits of deep implantation and trenched constrained diffusion to achieve deep diffusions with a minimal thermal budget. | 11-27-2008 |
| 20080290451 | Isolation structures for integrated circuits - A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate. | 11-27-2008 |
| 20080290450 | Isolation structures for integrated circuits - A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate. | 11-27-2008 |
| 20080290449 | Isolation structures for integrated circuits - A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate. | 11-27-2008 |
| 20080258687 | High Efficiency PWM Switching Mode with High Accuracy Linear Mode Li-Ion Battery Charger - A battery charger includes: a step-down switching converter connected to provide power at a predetermined average current from an input voltage V+ to an output node V | 10-23-2008 |
| 20080258686 | Method for Detecting Removal of a Battery from a Battery Charger - A method for detecting removal of a battery from a battery charger includes 1) incrementing an event counter and resetting an interval counter each time the voltage present at the output node exceeds a predetermined voltage; 2) resetting the event counter each time the interval counter exceeds a predetermined maximum time between events; and 3) asserting a signal indicating the absence of a battery connected between the positive and negative output nodes each time event counter exceeds a predetermined number of events. | 10-23-2008 |
| 20080254592 | Method of forming isolation structure for semiconductor integrated circuit substrate - Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths. | 10-16-2008 |
| 20080253152 | Method for Reducing Body Diode Conduction in NMOS Synchronous Rectifiers - A switching regulator that practices the current invention includes a high-side switch M1 connected between an input voltage and a node L | 10-16-2008 |
| 20080252372 | Power-MOSFETs with Improved Efficiency for Multi-channel Class-D Audio Amplifiers and Packaging Thereof - A stereo class-D audio system includes a first die including four monolithically integrated NMOS high-side devices and a second a second die including four monolithically integrated PMOS low-side devices. The audio system also includes a set of electrical contacts for connecting the high and low-side devices to components within the a stereo class-D audio system, the set of electrical contacts including at least one supply contact for connecting the drains of the high-side devices to a supply voltage (V | 10-16-2008 |
| 20080252274 | Pseudo Fixed Frequency Switch-Mode DC/DC Voltage Regulator Control Method - A method for controlling a step down regulator includes (a) generating a first feedback signal as a function of the voltage at the output node; (b) generating a second feedback signal as a function of the voltage at the input node; (c) maintaining the on-time of the low-side switch at a fixed duration; and (d) varying the on-time of the high-side switch to be proportional to the first feedback signal and inversely proportional to the second feedback signal so that the switching frequency of the high and low side switches is approximately constant. | 10-16-2008 |
| 20080237783 | Isolated bipolar transistor - A bipolar transistor is formed in an isolation structure comprising a floor isolation region, a dielectric filled trench above the floor isolation region and a sidewall isolation region extending downward from the bottom of the trench to the floor isolation region. This structure provides a relatively deep isolated pocket in a semiconductor substrate while limiting the depth of the trench that must be etched in the substrate. | 10-02-2008 |
| 20080237782 | Isolated rectifier diode - An isolated diode comprises a floor isolation region, a dielectric-filled trench and a sidewall region extending from a bottom of the trench at least to the floor isolation region. The floor isolation region, dielectric-filled trench and a sidewall region are comprised in one terminal (anode or cathode) of the diode and together form an isolated pocket in which the other terminal of the diode is formed. In one embodiment the terminals of the diode are separated by a second dielectric-filled trench and sidewall region. | 10-02-2008 |
| 20080237706 | Lateral MOSFET - A lateral MOSFET formed in a substrate of a first conductivity type includes a gate formed atop a gate dielectric layer over a surface of the substrate, a drain region of a second conductivity type, a source region of a second conductivity type, and a body region of the first conductivity type which extends under the gate. The body region may have a non-monotonic vertical doping profile with a portion located deeper in the substrate having a higher doping concentration than a portion located shallower in the substrate. The lateral MOSFET may be drain-centric, with the source region and an optional dielectric-filled trench surrounding the drain region. | 10-02-2008 |
| 20080237704 | Isolated trench MOSFET - An isolation structure for a semiconductor device comprises a floor isolation region, a dielectric filled trench above the floor isolation region and a sidewall isolation region extending downward from the bottom of the trench to the floor isolation region. This structure provides a relatively deep isolated pocket in a semiconductor substrate while limiting the depth of the trench that must be etched in the substrate. A MOSFET is formed in the isolated pocket. | 10-02-2008 |
| 20080237656 | Isolated junction field-effect transistor - An isolation structure for a semiconductor device comprises a floor isolation region, a dielectric filled trench above the floor isolation region and a sidewall isolation region extending downward from the bottom of the trench to the floor isolation region. This structure provides a relatively deep isolated pocket in a semiconductor substrate while limiting the depth of the trench that must be etched in the substrate. An isolated junction field-effect transistor is formed in the isolated pocket. | 10-02-2008 |
| 20080230812 | Isolated junction field-effect transistor - Various integrated circuit devices, in particular a junction field-effect transistor (JFET), are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described. | 09-25-2008 |
| 20080217729 | Isolation structures for integrated circuit devices - An isolated CMOS pair of transistors formed in a P-type semiconductor substrate includes an N-type submerged floor isolation region and a filled trench extending downward from the surface of the substrate to the floor isolation region. Together the floor isolation region and the filled trench form an isolated pocket of the substrate which contains a P-channel MOSFET in an N-well and an N-channel MOSFET in a P-well. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same. | 09-11-2008 |
| 20080217699 | Isolated Bipolar Transistor - An isolated bipolar transistor formed in a P-type semiconductor substrate includes an N-type submerged floor isolation region and a filled trench extending downward from the surface of the substrate to the floor isolation region. Together the floor isolation region and the filled trench form an isolated pocket of the substrate which contains the bipolar transistor. The collector of the bipolar transistor may comprise the floor isolation region. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same. | 09-11-2008 |
| 20080213972 | Processes for forming isolation structures for integrated circuit devices - Processes for forming isolation structures for semiconductor devices include forming a submerged floor isolation region and a filed trench which together enclose an isolated pocket of the substrate. One process aligns the trench to the floor isolation region. In another process a second, narrower trench is formed in the isolated pocket and filled with a dielectric material while the dielectric material is deposited so as to line the walls and floor of the first trench. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same. | 09-04-2008 |
| 20080210980 | Isolated CMOS transistors - Isolated CMOS transistors formed in a P-type semiconductor substrate include an N-type submerged floor isolation region and a filled trench extending downward from the surface of the substrate to the floor isolation region. Together the floor isolation region and the filled trench form an isolated pocket of the substrate which contains a P-channel MOSFET in an N-well and an N-channel MOSFET in a P-well. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same. | 09-04-2008 |
| 20080203991 | DC-DC Converter that Includes a High Frequency Power MESFET Gate Drive Circuit - A DC-DC converter that includes a high frequency power MESFET gate drive circuit is provided. The gate drive circuits are intended to be used in switching regulators where at least one switching device is an N-channel MESFET. For regulators of this type, the gate drive circuits provide gate drive at the correct voltage to ensure that MESFETs are neither under driven (resulting in incorrect circuit operation) nor over driven (resulting in MESFET damage or excess current or power loss). | 08-28-2008 |
| 20080203543 | Semiconductor integrated circuit substrate containing isolation structures - Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths. | 08-28-2008 |
| 20080203520 | Isolation structure for semiconductor integrated circuit substrate - Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths. | 08-28-2008 |
| 20080197908 | Cascode Power Switch for use in a High-Frequency Power MESFET Buck Switching Power Supply - A cascode power switch for use in a MESFET based switching regulator includes a MOSFET in series with a normally-off MESFET. The cascode power switch is typically connected in between a power source and a node Vx. The node Vx is connected to an output node via an inductor and to ground via a Schottky diode or a second MESFET or both. A control circuit drives the MESFET (and the second MESFET) so that the inductor is alternately connected to the battery and to ground. The MOSFET is switched off during sleep or standby modes to minimize leakage current through the MESFET. The MOSFET is therefore switched at a low frequency compared to the MESFET and does not contribute significantly to switching losses in the converter. | 08-21-2008 |
| 20080197827 | Reverse Current Comparator Circuit and Method for Switching Regulators - A reverse current comparator for use in switching regulators includes a differential stage configured to encode the difference in voltage between an N and a P input. The differential stage feeds one or more gain stages. At least one of the gain stages includes one or more hysteresis devices. When the voltage of the N input exceeds the voltage of the P input by a predetermined margin, the hysteresis device causes the regulator to enter a triggered state in which it outputs a non-zero output voltage. Subsequent changes to the N and P inputs do not change the regulator output until a RESET input is asserted and which point the regulator enters a reset state and is ready to be triggered. | 08-21-2008 |
| 20080197446 | Isolated diode - Various integrated circuit devices, in particular a diode, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described. | 08-21-2008 |
| 20080197445 | Isolation and termination structures for semiconductor die - Various integrated circuit devices, including a lateral DMOS transistor, a quasi-vertical DMOS transistor, a junction field-effect transistor (JFET), a depletion-mode MOSFET, and a diode, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described. | 08-21-2008 |
| 20080197408 | Isolated quasi-vertical DMOS transistor - Various integrated circuit devices, in particular a quasi-vertical DMOS transistor, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described. | 08-21-2008 |
