Infineon Technologies Patent applications |
Patent application number | Title | Published |
20110169673 | TIME-TO-DIGITAL CONVERTER WITH BUILT-IN SELF TEST - Apparatuses and methods related to time-to-digital converters (TDCs) are herein described. Generally, a time-to-digital converter is a device which measures a time period or time interval and outputs a digital value representing the measured time period. In an implementation, an apparatus is provided comprising a time-to-digital converter circuit, which further comprises a built-in self test (BIST). The built-in self test may be implemented using one or more oscillators coupled to the time-to-digital converter via one or more multiplexer devices. | 07-14-2011 |
20100069085 | Method and System for Sharing a Clock Reference Signal within an Integrated Mobile Device - A method and system of a GPS system controlling a voltage of an input signal to an oscillator, the oscillator producing a clock reference signal to the GPS system and a modem system, such that a frequency of the clock reference signal is altered to synchronize the modem system with a corresponding network while the GPS system remains in a locked state. | 03-18-2010 |
20090210602 | MODIFYING PERIODIC SIGNALS PRODUCED BY MICROCONTROLLER - Multiple modules are connected to a signal output module via first and second busses. Different commands may be transmitted on the two busses. Both busses may be hierarchically constructed so that all units are connected one after the other in a chain like manner on the busses. The modules cooperate to transition an output signal between different duty cycles and activate and deactivate responsive to timer comparisons. | 08-20-2009 |
20090121778 | Anti-Shock Methods for Processing Capacitive Sensor Signals - A low impedance coupling to bias voltage dissipates abnormal charge levels within a microphone in response to a shock event such as dropping or bumping. High impedance coupling to bias voltage is thereafter restored. | 05-14-2009 |
20080297267 | Voltage controlled oscillator circuit and a method for configuring a voltage controlled oscillator circuit - The voltage controlled oscillator (VCO) circuit comprises a tank circuit, a first tuning section comprising first capacitor elements wherein each one of the first capacitor elements is individually utilizable for the tank circuit, and a second tuning section comprising second capacitor elements wherein each one of the second capacitor elements is individually utilizable for the tank circuit and the capacitance of each one of the second capacitor elements is continuously adjustable in a predetermined capacitance range in dependence on a tuning voltage. | 12-04-2008 |
20080272735 | Circuit arrangement and method for transferring electrical charge between accumulator arrangement - A circuit arrangement for transferring electrical charge between accumulators of an accumulator arrangement includes a number of first series circuits, each connecting in parallel to one of the accumulators, and each comprising a switching element and an inductive storage element connected in series to the load path of the switching element. The circuit arrangement also includes a further series circuit connected in parallel to the accumulator arrangement and comprising a further switching element having a load path and a control terminal, and a further inductive element connected in series to the load path, the further inductive element being inductively coupled to the inductive elements of the first series circuits. The circuit arrangement also includes a control circuit comprising a number of first control outputs connected to the control terminals of the switching elements of the first series circuits, and a further control output connected to the control terminal of the further switching element. | 11-06-2008 |
20080246518 | Method for driving a transistor half-bridge - A method drives a transistor half-bridge. The method includes measuring a delay time between an edge of an input signal and an corresponding edge of a phase signal, and saving the delay time as a saved delay time value. The phase signal is the output of the transistor half-bridge. In the method, the following steps are repeated until the saved delay time value differs from the delay time by more than a given threshold:
| 10-09-2008 |
20080232511 | COMBINED MIXER AND POLYPHASE DECIMATOR - Some embodiments discussed relate to an apparatus and method for processing signals, comprising receiving an input signal and forming a stream of digital samples of the input signal by sampling at a sampling frequency and mixing the stream of digital samples using a mixer sequence having a sine sequence and a cosine sequence based on the sampling frequency to generate an input sequence, each of the sine sequence and the cosine sequence including a plurality of components in an arrangement such that at least one of the components has a zero value and the remaining components has a non-zero value, and filtering the input sequence using a plurality of polyphase filter parts, each corresponding to the non-zero components of the sine sequence and the cosine sequence, and selectively combining the outputs of the polyphase filter parts to generate an in-phase sequence and a quadrature sequence. | 09-25-2008 |
20080224217 | MUGFET SWITCH - An electronic circuit on a semiconductor substrate having isolated multiple field effect transistor circuit blocks is disclosed. In some embodiment, an apparatus includes a substrate, a first semiconductor circuit formed above the substrate, a second semiconductor circuit formed above the substrate, and a MuGFET device overlying the substrate and electrically coupled to the first semiconductor circuit and the second semiconductor circuit, wherein the MuGFET device provides a signal path between the first semiconductor circuit and the second semiconductor circuit in response to an input signal. | 09-18-2008 |
20080224178 | RESISTIVE MEMORY AND METHOD - A memory device includes a multi gate field effect transistor (MuGFET) having a fin with a contact area. A programmable memory element abuts the fin contact area. | 09-18-2008 |
20080215920 | PROGRAM CODE TRACE SIGNATURE - A processor generates a signature value indicating a sequence of executed instructions, and the signature value is compared to signature values calculated for two or more possible sequences of executed instructions to determine which instruction sequence was executed. The signature is generated via a signature generator during program execution, and is provided external to the processor via a signature message. | 09-04-2008 |
20080212392 | MULTIPLE PORT MUGFET SRAM - A circuit includes a multi gate field effect transistor based static random access memory device having a cross coupled inverter cell. A first set of multi gate field effect transistor access devices are coupled to the memory device to provide a first port. A second set of multi gate field effect transistor access devices are coupled to the memory device to provide a second port. Further ports may be provided in further embodiments. | 09-04-2008 |
20080204291 | DIGITAL-TO-ANALOG CONVERTER WITH LOGARITHMIC SELECTABLE RESPONSE AND METHODS - Embodiments of a digital-to-analog converter (DAC) with a logarithmic response and methods for converting digital signals to analog are generally described herein. Other embodiments may be described and claimed. In some embodiments, the DAC includes a wedge-shaped resistive array having a plurality of linearly-spaced contact nodes and a switching array to selectively couple one of the contact nodes with an analog output based on a control signal. Each of the contact nodes may provide a corresponding reference voltage that varies logarithmically with respect to the linearly-spaced contact nodes. | 08-28-2008 |
20080198778 | AUDIO COMMUNICATION DEVICE AND METHODS FOR REDUCING ECHOES BY INSERTING A TRAINING SEQUENCE UNDER A SPECTRAL MASK - Embodiments of an audio communication device and methods for reducing echoes are generally described herein. Other embodiments may be described and claimed. In some embodiments, echo-reduction circuitry may insert a training signal into digital audio signals at or below a noise floor and in a non-audible portion of the frequency spectrum based on a spectral mask. The training signal may be generated from a spectrum estimate and a training sequence. An adaptive filter may generate an echo-cancellation signal using filter coefficients generated from the training sequence and return-path signals. The echo-cancellation signal may remove echo signals from the return-path signals. | 08-21-2008 |