Inventors list |
Agents list |
Assignees list |
List by place |
Classification tree browser |
Top 100 Inventors |
Top 100 Agents |
Top 100 Assignees |
Cadence Design Systems, Inc.
SAN JOSE, CA US
1. 20090271167 PEAK POWER DETECTION IN DIGITAL DESIGNS USING EMULATION SYSTEMS 10-29-20092. 20090144683 AUTOMATED DEBUGGING METHOD AND SYSTEM FOR OVER-CONSTRAINED CIRCUIT VERIFICATION ENVIRONMENT 06-04-2009
3. 20090144681 AUTOMATED DEBUGGING METHOD AND SYSTEM FOR OVER-CONSTRAINED CIRCUIT VERIFICATION ENVIRONMENT 06-04-2009
4. 20090144680 AUTOMATED DEBUGGING METHOD AND SYSTEM FOR OVER-CONSTRAINED CIRCUIT VERIFICATION ENVIRONMENT 06-04-2009
5. 20090083685 METHOD FOR GENERATING OPTIMIZED CONSTRAINT SYSTEMS FOR RETIMABLE DIGITAL DESIGNS 03-26-2009
6. 20080284453 IC TEST VECTOR GENERATOR FOR SYNCHRONIZED PHYSICAL PROBING 11-20-2008
7. 20080270105 Method and apparatus for controlling power in an emulation system 10-30-2008
8. 20080235640 Method and apparatus for performing static analysis optimization in a design verification system 09-25-2008