GRANDIS, INC. Patent applications |
Patent application number | Title | Published |
20140063921 | METHOD AND SYSTEM FOR PROVIDING INVERTED DUAL MAGNETIC TUNNELING JUNCTION ELEMENTS - A method and system for providing a magnetic junction residing on a substrate and usable in a magnetic device are described. The magnetic junction includes a first pinned layer, a first nonmagnetic spacer layer having a first thickness, a free layer, a second nonmagnetic spacer layer having a second thickness greater than the first thickness, and a second pinned layer. The first nonmagnetic spacer layer resides between the pinned layer and the free layer. The first pinned layer resides between the free layer and the substrate. The second nonmagnetic spacer layer is between the free layer and the second pinned layer. Further, the magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. | 03-06-2014 |
20140032812 | METHOD AND DESIGN FOR HIGH PERFORMANCE NON-VOLATILE MEMORY - A non-volatile memory (NVM) system compatible with double data rate, single data rate, or other high speed serial burst operation. The NVM system includes input and output circuits adapted to synchronously send or receive back-to-back continuous bursts of serial data at twice the frequency of any clock input. Each burst is J bits in length. The NVM system includes read and write circuits that are adapted to read or write J bits of data at a time and in parallel, for each of a multitude of parallel data paths. Data is latched such that write time is similar for each bit and is extended to the time it takes to transmit an entire burst. Consequently, the need for small and fast sensing circuits on every column of a memory array, and fast write time at twice the frequency of the fastest clock input, are relieved. | 01-30-2014 |
20120257448 | Multi-Cell Per Memory-Bit Circuit and Method - A write circuit is adapted to provide a same logical bit to each of a multitude of memory cells for storage. Each of the multitude of memory cells stores either the bit or a complement of the bit in response to the write circuit. A read circuit is adapted to receive the bits stored in the multitude of memory cells and to generate an output value defined by the stored bits in accordance with a predefined rule. The predefined rule may be characterized by a statistical mode of the bits stored in the plurality of memory cells. Storage errors in a minority of the multitude of memory cells may be ignored at the cost of lower memory density. The predefined rule may be characterized by a first weight assigned to bits 1 and a second weight assigned to bits 0. | 10-11-2012 |
20120246507 | PARALLEL MEMORY ERROR DETECTION AND CORRECTION - A system implementing parallel memory error detection and correction divides data having a word length of K bits into multiple N-bit portions. The system has a separate error processing subsystem for each of the N-bit portions, and utilizes each error processing subsystem to process the associated N-bit portion of the K-bit input data. During memory write operations, each error processing subsystem generates parity information for the N-bit data, and writes the N-bit data and parity information into a separate memory array that corresponds to the error processing subsystem. During memory read operations, each error processing subsystem reads N-bits of data and the associated parity information. If, based on the parity information, an error is detected from the N-bit data, the error processing subsystem attempts to correct the error. The corrected N-bit data from each of the error processing subsystems are combined to reproduce the K-bit word. | 09-27-2012 |
20120228685 | MAGNETIC MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A magnetic memory device and a method for manufacturing the same are disclosed. The magnetic memory device includes a plurality of gates formed on a semiconductor substrate, a source line connected to a source/drain region shared between the gates neighboring with each other, a plurality of magnetic tunnel junctions connected to non-sharing source/drain regions of the gates on a one-to-one basis, and a bit line connected to the magnetic tunnel junctions. The magnetic memory device applies a magnetic memory cell to a memory so as to manufacture a higher-integration magnetic memory, and uses the magnetic memory cell based on a transistor of a DRAM cell, resulting in an increase in the availability of the magnetic memory. | 09-13-2012 |
20120206167 | Multi-Supply Symmetric Driver Circuit and Timing Method - Circuit includes, in part, random access memory cells, column decoders, row decoders, and write driver circuit. Driver circuit is responsive to data and control signals. Writing data includes multiple write phases, each phase driving predetermined current through selected cell by driver setting predetermined voltages to first and second lines. Voltages are in sets such that sequential voltages of each set correspond to respective phase. During writing of first data to selected cell, driver circuit causes first signal line to be at second voltage set and second signal line to be at first voltage set. Second voltage set is greater than first voltage set. During writing of second data to selected cell, driver cause first signal line to be at third voltage set and second signal line to be at fourth voltage set. Third voltage set is smaller than the fourth voltage set. | 08-16-2012 |
20120170357 | METHOD AND SYSTEM FOR PROVIDING MULTIPLE LOGIC CELLS IN A SINGLE STACK - A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a pinned layer, a plurality of nonmagnetic spacer layers, and a plurality of free layers. The free layers are interleaved with the nonmagnetic spacer layers. A first nonmagnetic spacer layer of the nonmagnetic spacer layers is between the free layers and the pinned layer. Each of the free layers is configured to be switchable between stable magnetic states when a write current is passed through the magnetic junction. Each of the free layers has a critical switching current density. The critical switching current density of one of the free layers changes monotonically from the critical switching current density of an adjacent free layer. The adjacent free layer is between the pinned layer and the one of the plurality of free layers. | 07-05-2012 |
20120168885 | METHOD AND SYSTEM FOR PROVIDING MAGNETIC LAYERS HAVING INSERTION LAYERS FOR USE IN SPIN TRANSFER TORQUE MEMORIES - A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. At least one of the pinned layer and the free layer includes a magnetic substructure. The magnetic substructure includes at least two magnetic layers interleaved with at least one insertion layer. Each insertion layer includes at least one of Cr, Ta, Ti, W, Ru, V, Cu, Mg, aluminum oxide, and MgO. The magnetic layers are exchange coupled. | 07-05-2012 |
20120155156 | METHOD AND SYSTEM FOR PROVIDING MAGNETIC TUNNELING JUNCTION ELEMENTS HAVING IMPROVED PERFORMANCE THROUGH CAPPING LAYER INDUCED PERPENDICULAR ANISOTROPY AND MEMORIES USING SUCH MAGNETIC ELEMENTS - A method and system for providing a magnetic element and a magnetic memory utilizing the magnetic element are described. The magnetic element is used in a magnetic device that includes a contact electrically coupled to the magnetic element. The method and system include providing pinned, nonmagnetic spacer, and free layers. The free layer has an out-of-plane demagnetization energy and a perpendicular magnetic anisotropy corresponding to a perpendicular anisotropy energy that is less than the out-of-plane demagnetization energy. The nonmagnetic spacer layer is between the pinned and free layers. The method and system also include providing a perpendicular capping layer adjoining the free layer and the contact. The perpendicular capping layer induces at least part of the perpendicular magnetic anisotropy in the free layer. The magnetic element is configured to allow the free layer to be switched between magnetic states when a write current is passed through the magnetic element. | 06-21-2012 |
20120127804 | Memory Write Error Correction Circuit - Memory circuit includes; an array, row decoder, column decoder, addressing circuit to receive an address of the data bit, control logic receiving commands and transmitting control signals to memory system blocks, and sensing and write driver circuits coupled to a selected column. A hidden read compare circuit couples between the sensing circuit and write driver, which couples an error flag to the control logic circuit responsive to a comparison between a data bit in the input latch and a data-out read from the memory array. A write error address tag memory is responsive to the error flag and is coupled to the addressing circuit via a bidirectional bus. A data input output circuit having first and second bidirectional buses to transmit and receive said data bit is provided. Write error address tag memory stores the address if the error flag is set and provides the address during a re-write operation. | 05-24-2012 |
20120112295 | METHOD AND SYSTEM FOR PROVIDING HYBRID MAGNETIC TUNNELING JUNCTION ELEMENTS WITH IMPROVED SWITCHING - A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer has an easy cone magnetic anisotropy. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. | 05-10-2012 |
20120075927 | Magnetic Element Having Perpendicular Anisotropy With Enhanced Efficiency - Techniques and magnetic devices associated with a magnetic element that includes a fixed layer having a fixed layer magnetization and perpendicular anisotropy, a nonmagnetic spacer layer, and a free layer having a changeable free layer magnetization and perpendicular anisotropy. | 03-29-2012 |
20120039119 | METHOD AND SYSTEM FOR PROVIDING MAGNETIC TUNNELING JUNCTION ELEMENTS HAVING A BIAXIAL ANISOTROPY - A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer has a magnetic anisotropy, at least a portion of which is a biaxial anisotropy. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. | 02-16-2012 |
20120020159 | NON-VOLATILE STATIC RAM CELL CIRCUIT AND TIMING METHOD - A non-volatile static random access memory cell and includes a bistable regenerative circuit coupled to first and second transistors and to first and second non-volatile memory cells. Methods of use include directly transferring a complementary data bit between the non-volatile memory cell and the bistable regenerative circuit. Alternatively, complementary data from the bistable regenerative circuit may be regenerated by a sense amplifier and a second bistable regenerative circuit before being transferred to non-volatile memory cells in a column of memory cells. The bistable regenerative circuit may be reset to ground potential. Applications using the non-volatile SRAM cell with direct read out from the bistable regenerative circuit include a non-volatile flip-flop or non-volatile multiplexer. | 01-26-2012 |
20120012953 | METHOD AND SYSTEM FOR PROVIDING MAGNETIC TUNNELING JUNCTION ELEMENTS HAVING LAMINATED FREE LAYERS AND MEMORIES USING SUCH MAGNETIC ELEMENTS - A method and system for providing a magnetic substructure usable in a magnetic device, as well as a magnetic element and memory using the substructure are described. The magnetic substructure includes a plurality of ferromagnetic layers and a plurality of nonmagnetic layers. The plurality of ferromagnetic layers are interleaved with the plurality of nonmagnetic layers. The plurality of ferromagnetic layers are immiscible with and chemically stable with respect to the plurality of nonmagnetic layers. The plurality of ferromagnetic layers are substantially free of a magnetically dead layer-producing interaction with the plurality of nonmagnetic layers. Further, the plurality of nonmagnetic layers induce a perpendicular anisotropy in the plurality of ferromagnetic layers. The magnetic substructure is configured to be switchable between a plurality of stable magnetic states when a write current is passed through the magnetic substructure. | 01-19-2012 |
20110299330 | PSEUDO PAGE MODE MEMORY ARCHITECTURE AND METHOD - A non-volatile memory array includes a plurality of word-lines and a plurality of columns. One of the columns further includes a bistable regenerative circuit coupled to a first, a second, a third, and a fourth signal lines. The column also includes a non-volatile memory cell having current carrying terminals coupled to the first and second signal lines and a control terminal coupled to one of the plurality of word-lines. The column further includes a first transistor and a second transistor. The first transistor is coupled to the first terminal of the bistable regenerative circuit, and to a fifth signal line. The second transistor has a first current carrying terminal coupled to the second terminal of the bistable regenerative circuit, and a second current carrying terminal coupled to a sixth signal line. The gate terminals of the first and second transistors are coupled to a seventh signal line. | 12-08-2011 |
20110273928 | METHOD AND SYSTEM FOR PROVIDING A MAGNETIC MAGNETIC FIELD ALIGNED SPIN TRANSFER TORQUE RANDOM ACCESS MEMORY - A method and system for providing a magnetic memory are described. The method and system include providing magnetic storage cells, bit lines coupled with the magnetic storage cells, preset lines, and word lines coupled with the magnetic storage cells. Each magnetic storage cell includes magnetic element(s). The bit lines drive write current(s) through selected storage cell(s) of the magnetic storage cells to write to the selected storage cell(s). The preset lines drive preset current(s) in proximity to but not through the selected storage cell(s). The preset current(s) generate magnetic field(s) to orient the magnetic element(s) of the selected storage cell(s) in a direction. The word lines enable the selected storage cell(s) for writing. Either the bit lines reside between the preset lines and the storage cells or the preset lines reside between the storage cells and on a storage cell side of the bit lines. | 11-10-2011 |
20110254585 | METHOD AND SYSTEM FOR PROVIDING SPIN TRANSFER BASED LOGIC DEVICES - A method and system for providing a logic device are described. The logic device includes a plurality of magnetic input/channel regions, at least one magnetic sensor region, and at least one sensor coupled with the at least one magnetic sensor region. Each of the magnetic input/channel regions is magnetically biased in a first direction. The magnetic sensor region(s) are magnetically biased in a second direction different from the first direction such that at least one domain wall resides in the magnetic input/channel regions if the logic device is in a quiescent state. The sensor(s) output a signal based on a magnetic state of the magnetic sensor region(s). The input/channel regions and the magnetic sensor region(s) are configured such that the domain wall(s) may move into the magnetic sensor region(s) in response to a logic signal being provided to at least a portion of the magnetic input regions. | 10-20-2011 |
20110241141 | Magnetic Element Having Low Saturation Magnetization - A magnetic device including a magnetic element is described. The magnetic element includes a fixed layer having a fixed layer magnetization, a spacer layer that is nonmagnetic, and a free layer having a free layer magnetization. The free layer is changeable due to spin transfer when a write current above a threshold is passed through the first free layer. The free layer is includes low saturation magnetization materials. | 10-06-2011 |
20110210410 | Magnetic shielding in magnetic multilayer structures - Techniques and device designs associated with devices having magnetically shielded magnetic or magnetoresistive tunnel junctions (MTJs) and spin valves that are configured to operate based on spin-transfer torque switching. | 09-01-2011 |
20110141804 | METHOD AND SYSTEM FOR PROVIDING DUAL MAGNETIC TUNNELING JUNCTIONS USABLE IN SPIN TRANSFER TORQUE MAGNETIC MEMORIES - A method and system for providing a magnetic junction usable in a magnetic memory are described. The magnetic junction includes first and second pinned layers, first and second nonmagnetic spacer layers, and a free layer. The pinned layers are nonmagnetic layer-free and self-pinned. In some aspects, the magnetic junction is configured to allow the free and second pinned layers to be switched between stable magnetic states when write currents are passed therethrough. The magnetic junction has greater than two stable states. In other aspects, the magnetic junction includes at least third and fourth spacer layers, a second free layer therebetween, and a third pinned layer having a pinned layer magnetic moment, being nonmagnetic layer-free, and being coupled to the second pinned layer. The magnetic junction is configured to allow the free layers to be switched between stable magnetic states when write currents are passed therethrough. | 06-16-2011 |
20110141802 | METHOD AND SYSTEM FOR PROVIDING A HIGH DENSITY MEMORY CELL FOR SPIN TRANSFER TORQUE RANDOM ACCESS MEMORY - A method and system for providing a magnetic memory are described. The method and system include providing a plurality of magnetic storage cells, a plurality of bit lines corresponding to the magnetic storage cells, a plurality of word lines corresponding to the magnetic storage cells, and a common voltage plane coupled with the magnetic storage cells. Each of the magnetic storage cells includes at least one magnetic element and at least one selection device coupled with the magnetic element(s). The magnetic element(s) are programmable using at least one write current driven through the magnetic element(s). The common voltage plane is coupled with the memory cells. The write current(s) flow between the common voltage plane, the magnetic element(s), and at least one of the bit lines. | 06-16-2011 |
20110140217 | SPIN TRANSFER MAGNETIC ELEMENT WITH FREE LAYERS HAVING HIGH PERPENDICULAR ANISOTROPY AND IN-PLANE EQUILIBRIUM MAGNETIZATION - A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes pinned, nonmagnetic spacer, and free layers. The spacer layer resides between the pinned and free layers. The free layer can be switched using spin transfer when a write current is passed through the magnetic element. The free layer includes a first ferromagnetic layer and a second ferromagnetic layer. The second ferromagnetic layer has a very high perpendicular anisotropy and an out-of-plane demagnetization energy. The very high perpendicular anisotropy energy is greater than the out-of-plane demagnetization energy of the second layer. | 06-16-2011 |
20110102948 | METHOD AND SYSTEM FOR PROVIDING DUAL MAGNETIC TUNNELING JUNCTIONS USABLE IN SPIN TRANSFER TORQUE MAGNETIC MEMORIES - A method and system for providing a magnetic junction usable in a magnetic memory are described. The magnetic junction includes first and second pinned layers, first and second nonmagnetic spacer layers, and a free layer. The first pinned layer has a first pinned layer magnetic moment and is nonmagnetic layer-free. The first nonmagnetic spacer layer resides between the first pinned and free layers. The free layer resides between the first and second nonmagnetic spacer layers. The second pinned layer has a second pinned layer magnetic moment and is nonmagnetic layer-free. The second nonmagnetic spacer layer resides between the free and second pinned layers. The first and second pinned layer magnetic moments are antiferromagnetically coupled and self-pinned. The magnetic junction is configured to allow the free layer to be switched between stable magnetic states when a write current is passed through the magnetic junction. | 05-05-2011 |
20110076784 | Fabrication of Magnetic Element Arrays - Techniques for fabricating an array of magnetic elements to form memory and other devices with a high areal density. | 03-31-2011 |
20110064969 | Magnetic Element Having Perpendicular Anisotropy With Enhanced Efficiency - Techniques and magnetic devices associated with a magnetic element that includes a fixed layer having a fixed layer magnetization and perpendicular anisotropy, a nonmagnetic spacer layer, and a free layer having a changeable free layer magnetization and perpendicular anisotropy. | 03-17-2011 |
20110063898 | METHOD AND SYSTEM FOR PROVIDING A HIERARCHICAL DATA PATH FOR SPIN TRANSFER TORQUE RANDOM ACCESS MEMORY - A method and system for providing a magnetic memory are described. The method and system include providing memory array tiles (MATs), intermediate circuitry, global bit lines, global word lines, and global circuitry. Each MAT includes magnetic storage cells, bit lines, and word lines. Each of the magnetic storage cells includes at least one magnetic element and at least one selection device. The magnetic element(s) are programmable using write current(s) driven through the magnetic element(s). The bit lines and the word lines correspond to the magnetic storage cells. The intermediate circuitry controls read and write operations within the MATs. Each global bit line corresponds to a first portion of the plurality of MATs. Each global word line corresponds to a second portion of the MATs. The global circuitry selects and drives part of the global bit lines and part of the global word lines for the read and write operations. | 03-17-2011 |
20110063897 | DIFFERENTIAL READ AND WRITE ARCHITECTURE - A memory cell includes a pair of magnetic tunnel junctions and a pair of associated transistors. The magnetic tunnel junctions of the pair are differentially disposed so that in response to the applied voltages, when one them stores a logic one, the other one stores a logic zero. Accordingly, the read operation margin is increased by a factor of two. The true and complementary bit lines of the differential memory cell are coupled to a sense amplifier. Consequently, the need for using reference bit lines is eliminated. | 03-17-2011 |
20110032644 | METHOD AND SYSTEM FOR PROVIDING MAGNETIC TUNNELING JUNCTION ELEMENTS HAVING IMPROVED PERFORMANCE THROUGH CAPPING LAYER INDUCED PERPENDICULAR ANISOTROPY AND MEMORIES USING SUCH MAGNETIC ELEMENTS - A method and system for providing a magnetic element and a magnetic memory utilizing the magnetic element are described. The magnetic element is used in a magnetic device that includes a contact electrically coupled to the magnetic element. The method and system include providing pinned, nonmagnetic spacer, and free layers. The free layer has an out-of-plane demagnetization energy and a perpendicular magnetic anisotropy corresponding to a perpendicular anisotropy energy that is less than the out-of-plane demagnetization energy. The nonmagnetic spacer layer is between the pinned and free layers. The method and system also include providing a perpendicular capping layer adjoining the free layer and the contact. The perpendicular capping layer induces at least part of the perpendicular magnetic anisotropy in the free layer. The magnetic element is configured to allow the free layer to be switched between magnetic states when a write current is passed through the magnetic element. | 02-10-2011 |
20110031569 | METHOD AND SYSTEM FOR PROVIDING MAGNETIC TUNNELING JUNCTION ELEMENTS HAVING IMPROVED PERFORMANCE THROUGH CAPPING LAYER INDUCED PERPENDICULAR ANISOTROPY AND MEMORIES USING SUCH MAGNETIC ELEMENTS - A method and system for providing a magnetic element and a magnetic memory utilizing the magnetic element are described. The magnetic element is used in a magnetic device that includes a contact electrically coupled to the magnetic element. The method and system include providing pinned, nonmagnetic spacer, and free layers. The free layer has an out-of-plane demagnetization energy and a perpendicular magnetic anisotropy corresponding to a perpendicular anisotropy energy that is less than the out-of-plane demagnetization energy. The nonmagnetic spacer layer is between the pinned and free layers. The method and system also include providing a perpendicular capping layer adjoining the free layer and the contact. The perpendicular capping layer induces at least part of the perpendicular magnetic anisotropy in the free layer. The magnetic element is configured to allow the free layer to be switched between magnetic states when a write current is passed through the magnetic element. | 02-10-2011 |
20110012215 | SPIN TRANSFER MAGNETIC ELEMENT WITH FREE LAYERS HAVING HIGH PERPENDICULAR ANISOTROPY AND IN-PLANE EQUILIBRIUM MAGNETIZATION - A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes pinned, nonmagnetic spacer, and free layers. The spacer layer resides between the pinned and free layers. The free layer can be switched using spin transfer when a write current is passed through the magnetic element. The free layer includes a first ferromagnetic layer and a second ferromagnetic layer. The second ferromagnetic layer has a very high perpendicular anisotropy and an out-of-plane demagnetization energy. The very high perpendicular anisotropy energy is greater than the out-of-plane demagnetization energy of the second layer. | 01-20-2011 |
20100247967 | MAGNETIC ELEMENT UTILIZING FREE LAYER ENGINEERING - A method and system for providing a magnetic element are described. The method and system include providing a pinned layer, a barrier layer, and a free layer. The free layer includes a first ferromagnetic layer, a second ferromagnetic layer, and an intermediate layer between the first ferromagnetic layer and the second ferromagnetic layer. The barrier layer resides between the pinned layer and the free layer and includes MgO. The first ferromagnetic layer resides between the barrier layer and the intermediate layer. The first ferromagnetic layer includes at least one of CoFeX and CoNiFeX, with X being selected from the group of B, P, Si, Nb, Zr, Hf, Ta, Ti, and being greater than zero atomic percent and not more than thirty atomic percent. The first ferromagnetic layer is ferromagnetically coupled with the second ferromagnetic layer. The intermediate layer is configured such that the first ferromagnetic layer has a first crystalline orientation and the second ferromagnetic layer has a second crystalline orientation different from the first ferromagnetic layer. | 09-30-2010 |
20100140726 | METHOD AND SYSTEM FOR PROVIDING MAGNETIC ELEMENTS HAVING ENHANCED MAGNETIC ANISOTROPY AND MEMORIES USING SUCH MAGNETIC ELEMENTS - A method and system for providing a magnetic element are described. The magnetic element includes pinned and free layers, a nonmagnetic spacer layer between the free and pinned layers, and a stability structure. The free layer is between the spacer layer and the stability structure. The free layer has a free layer magnetization, at least one free layer easy axis, and at least one hard axis. The stability structure includes magnetic layers and is configured to decrease a first magnetic energy corresponding to the free layer magnetization being aligned with the at least one easy axis without decreasing a second magnetic energy corresponding to the free layer magnetization being aligned with the at least one hard axis. The magnetic element is configured to allow the free layer magnetization to be switched to between states when a write current is passed through the magnetic element. | 06-10-2010 |
20090213640 | CURRENT DRIVEN MEMORY CELLS HAVING ENHANCED CURRENT AND ENHANCED CURRENT SYMMETRY - A method and system for providing and using a magnetic memory is described. The method and system include providing a plurality of magnetic storage cells. Each magnetic storage cell includes a magnetic element and a selection device coupled with the magnetic element. The magnetic element is programmed by write currents driven through the magnetic element in a first or second direction. In one aspect, the method and system include providing a voltage supply and a voltage pump coupled with the magnetic storage cells and the voltage supply. The voltage supply provides a supply voltage. The voltage pump provides to the selection device a bias voltage having a magnitude greater than the supply voltage. Another aspect includes providing a silicon on oxide transistor as the selection device. Another aspect includes providing to the body of the transistor a body bias voltage that is a first voltage when the transistor is off and a second voltage when the transistor is on. | 08-27-2009 |
20090185410 | METHOD AND SYSTEM FOR PROVIDING SPIN TRANSFER TUNNELING MAGNETIC MEMORIES UTILIZING UNIDIRECTIONAL POLARITY SELECTION DEVICES - A magnetic memory cell and a magnetic memory incorporating the cell are described. The magnetic memory cell includes at least one magnetic element and a plurality of unidirectional polarity selection devices. The magnetic element(s) are programmable using write current(s) driven through the magnetic element. The unidirectional polarity selection devices are connected in parallel and such that they have opposing polarities. The magnetic memory may include a plurality of magnetic storage cells, a plurality of bit lines corresponding to the plurality of magnetic storage cells, and a plurality of source lines corresponding to the plurality of magnetic storage cells. | 07-23-2009 |
20090040855 | METHOD AND SYSTEM FOR PROVIDING A SENSE AMPLIFIER AND DRIVE CIRCUIT FOR SPIN TRANSFER TORQUE MAGNETIC RANDOM ACCESS MEMORY - A method and system for providing a magnetic memory are described. The method and system include a plurality of magnetic storage cells, a plurality of bit lines, at least one reference line, and at least one sense amplifier. Each magnetic storage cell includes magnetic element(s) and selection device(s). The magnetic element(s) are programmable using write current(s) driven through the magnetic element. The bit and source lines correspond to the magnetic storage cells. The sense amplifier(s) are coupled with the bit lines and reference line(s), and include logic and a plurality of stages. The stages include first and second stages. The first stage converts at least current signal to at least one differential voltage signal. The second stage amplifies the at least one differential voltage signal. The logic selectively disablies at least one of the first and second stages in the absence of a read operation and enabling the first and second stages during the read operation. | 02-12-2009 |
20080310219 | METHOD AND SYSTEM FOR PROVIDING A MAGNETIC ELEMENT AND MAGNETIC MEMORY BEING UNIDIRECTIONAL WRITING ENABLED - A method and system for providing a magnetic element and memory utilizing the magnetic element are described. The magnetic element includes a reference layer, a nonferromagnetic spacer layer, and a free layer. The reference layer has a resettable magnetization that is set in a selected direction by a magnetic field generated externally to the reference layer. The reference layer is also magnetically thermally unstable at an operating temperature range and has K | 12-18-2008 |
20080310213 | METHOD AND SYSTEM FOR PROVIDING SPIN TRANSFER TUNNELING MAGNETIC MEMORIES UTILIZING NON-PLANAR TRANSISTORS - A magnetic memory cell and a magnetic memory incorporating the cell are described. The magnetic memory cell includes at least one magnetic element and at least one non-planar selection device. The magnetic element(s) are programmable using write current(s) driven through the magnetic element. The magnetic memory may include a plurality of magnetic storage cells, a plurality of bit lines corresponding to the plurality of magnetic storage cells, and a plurality of source lines corresponding to the plurality of magnetic storage cells. | 12-18-2008 |
20080291721 | METHOD AND SYSTEM FOR PROVIDING A SPIN TRANSFER DEVICE WITH IMPROVED SWITCHING CHARACTERISTICS - A method and system for providing a magnetic element is described. The magnetic element includes a first pinned layer, a first spacer layer, a free layer, a second spacer layer, and a second pinned layer. The first and second pinned layers have first and magnetizations oriented in first and second directions, respectively. The first and second spacer layers are nonferromagnetic. The first and second spacer layers are between the free layer and the first and second pinned layers, respectively. The magnetic element is configured either to allow the free layer to be switched to each of multiple states when both a unidirectional write current is passed through the magnetic element and the magnetic element is subjected to a magnetic field corresponding to the each states or to allow the free layer to be switched to each of the plurality of states utilizing a write current and an additional magnetic field that is applied from at least one of the first pinned layer and the second pinned layer substantially only if the write current is also applied. | 11-27-2008 |
20080230819 | SPIN TRANSFER MAGNETIC ELEMENT WITH FREE LAYERS HAVING HIGH PERPENDICULAR ANISOTROPY AND IN-PLAN EQUILIBRIUM MAGNETIZATION - A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes pinned, nonmagnetic spacer, and free layers. The spacer layer resides between the pinned and free layers. The free layer can be switched using spin transfer when a write current is passed through the magnetic element. The free layer includes a first ferromagnetic layer and a second ferromagnetic layer. The second ferromagnetic layer has a very high perpendicular anisotropy and an out-of-plane demagnetization energy. The very high perpendicular anisotropy energy is greater than the out-of-plane demagnetization energy of the second layer. | 09-25-2008 |