LAM RESEARCH Patent applications |
Patent application number | Title | Published |
20110152151 | Post Deposition Wafer Cleaning Formulation - Methods and systems for cleaning corrosion product of a metallic capping layer from the surface of a substrate are provided. According to one embodiment, a treatment solution includes a surfactant, a complexing agent, and a pH adjuster. The surfactant is configured to enhance wetting of the substrate surface, and inhibit further corrosion of the capping layer. The complexing agent is configured to bind to metal ions which have desorbed from the substrate surface. The pH adjuster is configured to adjust the pH to a desired level, so as to promote desorption of the corrosion product from the substrate surface. | 06-23-2011 |
20110117328 | Barrier Layer Configurations and Methods for Processing Microelectronic Topographies Having Barrier Layers - A microelectronic topography includes a dielectric layer (DL) with a surface higher than an adjacent bulk metal feature (BMF) and further includes a barrier layer (BL) upon the BMF and extending higher than the DL. Another microelectronic topography includes a BL with a metal-oxide layer having a metal element concentration which is disproportionate relative to concentrations of the element within metal alloy layers on either side of the metal-oxide layer. A method includes forming a BL upon a BMF such that portions of a first DL adjacent to the BMF are exposed, selectively depositing a second DL upon the BL, cleaning the topography thereafter, and blanket depositing a third DL upon the cleaned topography. Another method includes polishing a microelectronic topography such that a metallization layer is coplanar with a DL and further includes spraying a deionized water based fluid upon the polished topography to remove debris from the DL. | 05-19-2011 |
20100184301 | Methods for Preventing Precipitation of Etch Byproducts During an Etch Process and/or Subsequent Rinse Process - Methods for processing a microelectronic topography include selectively etching a layer of the topography using an etch solution which includes a fluid in a supercritical or liquid state. In some embodiments, the etch process may include introducing a fresh composition of the etch solution into a process chamber while simultaneously venting the chamber to inhibit the precipitation of etch byproducts. A rinse solution including the fluid in a supercritical or liquid state may be introduced into the chamber subsequent to the etch process. In some cases, the rinse solution may include one or more polar cosolvents, such as acids, polar alcohols, and/or water mixed with the fluid to help inhibit etch byproduct precipitation. In addition or alternatively, at least one of the etch solution and rinse solution may include a chemistry which is configured to modify dissolved etch byproducts within an ambient of the topography to inhibit etch byproduct precipitation. | 07-22-2010 |
20100159208 | Barrier Layer Configurations and Methods for Processing Microelectronic Topographies Having Barrier Layers - A microelectronic topography includes a dielectric layer (DL) with a surface higher than an adjacent bulk metal feature (BMF) and further includes a barrier layer (BL) upon the BMF and extending higher than the DL. Another microelectronic topography includes a BL with a metal-oxide layer having a metal element concentration which is disproportionate relative to concentrations of the element within metal alloy layers on either side of the metal-oxide layer. A method includes forming a BL upon a BMF such that portions of a first DL adjacent to the BMF are exposed, selectively depositing a second DL upon the BL, cleaning the topography thereafter, and blanket depositing a third DL upon the cleaned topography. Another method includes polishing a microelectronic topography such that a metallization layer is coplanar with a DL and further includes spraying a deionized water based fluid upon the polished topography to remove debris from the DL. | 06-24-2010 |
20100072169 | Methods and Systems for Preventing Feature Collapse During Microelectronic Topography Fabrication - Methods for preventing feature collapse subsequent to etching a layer encasing the features include adding a non-aqueous liquid to a microelectronic topography having remnants of an aqueous liquid arranged upon its surface and subsequently exposing the topography to a pressurized chamber including a fluid at or greater than its saturated vapor pressure or critical pressure. The methods include flushing from the pressurized chamber liquid arranged upon the topography and, thereafter, venting the chamber in a manner sufficient to prevent liquid formation therein. The topography features may be submerged in a liquid while pressurizing the chamber. A process chamber used to prevent feature collapse includes a substrate holder for supporting a microelectronic topography, a vessel configured to contain the substrate holder, and a sealable region surrounding the substrate holder and the vessel. The chamber is configured to sequester wet chemistry supplied to the vessel from metallic surfaces of the sealable region. | 03-25-2010 |
20100062164 | Methods and Solutions for Preventing the Formation of Metal Particulate Defect Matter Upon a Substrate After a Plating Process - Methods and solutions for preventing the formation of metal particulate defect matter upon a substrate after plating processes are provided. In particular, solutions are provided which are free of oxidizing agents and include a non-metal pH adjusting agent in sufficient concentration such that the solution has a pH between approximately 7.5 and approximately 12.0. In some cases, a solution may include a chelating agent. In addition or alternatively, a solution may include at least two different types of complexing agents each offering a single point of attachment for binding metal ions via respectively different functional groups. In any case, at least one of the complexing agents or the chelating agent includes a non-amine or non-imine functional group. An embodiment of a method for processing a substrate includes plating a metal layer upon the substrate and subsequently exposing the substrate to a solution comprising the aforementioned make-up. | 03-11-2010 |
20100008014 | METHOD AND APPARATUS FOR SUCURELY DECHUCKING WAFERS - A wafer stage installed in a process chamber for safely dechucking a wafer is provided. In one embodiment, the wafer stage comprises: a chuck support for supporting a chuck; a chuck mounted on the chuck support for receiving and attaching a wafer thereto; a support lift means for supporting the wafer; a driving means coupled to the support lift means for gradually raising the support lift means to contact the wafer in response to a variable quantity; a controller for receiving the variable quantity; and a regulating means coupled to the driving means and to the controller, the regulating means for controlling the variable quantity going to the driving means when a predetermined variable quantity is detected. | 01-14-2010 |