HIMAX MEDIA SOLUTIONS, INC. Patent applications |
Patent application number | Title | Published |
20140348428 | DYNAMIC RANGE-ADJUSTMENT APPARATUSES AND METHODS - A dynamic range-adjustment apparatus is provided. The apparatus includes: an input unit for receiving an original image; an histogram equalization unit, coupled to the input unit, for performing contrast enhancement on the original image to produce a contrast-enhanced image; a factor-determination unit, coupled to the input unit and the histogram equalization unit, for determining a first factor based on the gray level of a pixel of the original image and the tone of the corresponding pixel of the contrast-enhanced image; and an adjustment unit, coupled to the input unit, the histogram equalization unit and the factor-determination unit. | 11-27-2014 |
20140348416 | STEREO IMAGE RECTIFICATION APPARATUS AND METHOD - A stereo image rectification apparatus includes: an input unit, for receiving a first image from a first camera and a second image from a second camera, wherein the first and the second camera are affine cameras; a feature point determination unit, for determining at least one first feature point on the first image and at least one second feature point on the second image, wherein both the first feature point on the first image and the second feature point on the second image correspond to the same imaginary object; and a warping matrix establishing unit, for establishing a warping matrix for mapping the first image to the second image by: calculating the elements of the warping matrix in regard to the mapping between the x- and y-coordinates of the first feature points and the y-coordinates of the second feature points | 11-27-2014 |
20140152715 | FRAME RATE CONVERTER AND TIMING CONTROLLER AND PROCESSING APPARATUS AND METHOD THEREOF - A frame rate converter includes: a receiving circuit for receiving an input image data and accordingly outputting an output image data, the input image data having a plurality of data segments with information of a plurality of color components of pixels of a frame, respectively, wherein each of the data segments includes information of a same color component only; a frame buffer for storing the output image data; and a first multiplexer for selecting one of the output image data outputted from the receiving circuit and the output image data buffered in the frame buffer as an output of the frame rate converter. The first multiplexer outputs the output image data buffered in the frame buffer at least once after outputting the output image data outputted from the receiving circuit to generate at least one duplication of the frame. | 06-05-2014 |
20140029866 | IMAGE ENHANCEMENT SYSTEM AND METHOD - An image enhancement system and method include a high-pass filter (HPF) configured to pass high-frequency spatial components of an input image to generate a high-pass image; an adder configured to add the high-pass image to the input image, thereby resulting in an enhanced image; and an over-enhancement detection unit configured to detect tendency of the input image towards overshoot or undershoot. An output of the over-enhancement detection unit is used to prevent overshoot or undershoot in the enhanced image. | 01-30-2014 |
20130162701 | SYSTEM AND A METHOD OF ADAPTIVELY CONTROLLING AN LED BACKLIGHT - The present invention is directed to a system and method of adaptively controlling a light-emitting diode (LED) backlight. A content analyzer analyzes luminance of image data to be displayed on a display panel. An LED current controller controls illumination of the LED backlight via an LED driver according to an analysis result of the content analyzer. The LED current controller over-drives the LED backlight such that a drive current flowing in the LED backlight is above a normal current, when the analysis result of the content analyzer indicates that the luminance of image data is above a predetermined value. | 06-27-2013 |
20130028312 | JOINT DECISION FEEDBACK EQUALIZER AND TRELLIS DECODER - The present invention is directed to joint decision feedback equalizer (DFE) and Trellis decoder adaptable to an Ethernet transceiver. A Trellis coded modulation (TCM) decoder includes a one-dimensional branch metric unit (1D-BMU) configured to calculate 1D branch metrics; a four-dimensional branch metric unit (4D-BMU) configured to combine the 1D branch metrics to generate 4D branch metrics; an add-compare-select unit (ACSU) configured to perform add, compare and select (ACS) operations on the 4D branch metrics for each state to obtain path metrics; and a survivor memory unit (SMU) configured to store and keep track of symbols. A decision feedback unit (DFU) is coupled to receive the symbols from the SMU in order to estimate inter-symbol interference (ISI) quantity, which is then fed back to the 1D-BMU. | 01-31-2013 |
20130028311 | RECOVERABLE ETHERNET RECEIVER - The present invention is directed to a recoverable Ethernet receiver. A joint decision feedback equalizer (DFE) and Trellis decoder is configured to decode a receiving signal to result in a received symbol, and configured to generate a check-idle value which is used to indicate an idle mode. A physical coding sublayer (PCS) block is configured to generate a seed value and a polarity characterization according to the received symbol, with the joint DFE and Trellis decoder generating the check-idle value according to the seed value and the polarity characterization. | 01-31-2013 |
20130028299 | ADAPTIVE ETHERNET TRANSCEIVER WITH JOINT DECISION FEEDBACK EQUALIZER AND TRELLIS DECODER - An adaptive Ethernet transceiver is disclosed. A joint decision feedback equalizer (DFE) and Trellis decoder is configured to decode a receiving signal. A decoder control unit is configured to adaptively disable a portion of the joint DFE and Trellis decoder in a non-specified link speed mode. | 01-31-2013 |
20120308115 | Method for Adjusting 3-D Images by Using Human Visual Model - The present disclosure provides a method for adjusting 3-D images converted from 2-D images by using a human visual model. Steps of the method include inputting a 2-D image, dividing the 2-D image into a plurality of blocks, forming a matrix of blocks, obtaining a depth value of each of the plurality of blocks, adjusting the depth value of each of the plurality of blocks according to a position of each of the plurality of blocks, obtaining adjusted depth information of the 2-D image, wherein the adjusted depth information comprises an adjusted depth value of each of the plurality of blocks of the 2-D image, and using depth image based rendering (DIBR) to generate a set of 3-D images according to the adjusted depth information and the 2-D image. | 12-06-2012 |
20120293488 | STEREO IMAGE CORRECTION SYSTEM AND METHOD - The invention is directed to a stereo image correction system and method. A shift unit vertically shifts one image of a stereo image pair with a shifted amount, and a depth generator generates a depth map of the shifted image pair. A high-pass filter processes the depth map to result in a filtered output, and an analysis unit determines a matching point according to the filtered outputs and the corresponding shifted amounts, wherein the shifted amount at the matching point is determined as a matched shifted amount. A compensation unit vertically shifts the image to be shifted of the stereo image pair with the matched shifted amount. | 11-22-2012 |
20120274626 | Stereoscopic Image Generating Apparatus and Method - A depth map generating device. A first depth information extractor extracts a first depth information from a main two dimensional (2D) image according to a first algorithm and generates a first depth map corresponding to the main 2D image. A second depth information extractor extracts a second depth information from a sub 2D image according to a second algorithm and generates a second depth map corresponding to the sub 2D image. A mixer mixes the first depth map and the second depth map according to adjustable weighting factors to generate a mixed depth map. The mixed depth map is utilized for converting the main 2D image to a set of three dimensional (3D) images. | 11-01-2012 |
20120274489 | SUCCESSIVE APPROXIMATION REGISTER ADC WITH A WINDOW PREDICTIVE FUNCTION - A successive approximation register (SAR) analog-to-digital converter (ADC) is disclosed. A first and second capacitor DACs receive a first and second input signals respectively. A first coarse comparator compares an output of the first capacitor DAC with a window reference voltage, a second coarse comparator compares an output of the second capacitor DAC with the window reference voltage, and a fine comparator compares the output of the first capacitor DAC with the output of the second capacitor DAC. A SAR controller receives outputs of the first and second coarse comparators to determine whether the outputs of the first and second capacitor DACs are within a predictive window determined by the window reference voltage. The SAR controller bypasses at least one phase of analog-to-digital conversion of the SAR ADC when the outputs of the first capacitor DAC and the second capacitor DAC are determined to be within the predictive window. The SAR controller decodes the outputs of the first and second coarse comparators and the fine comparator to obtain a converted output of the SAR ADC. | 11-01-2012 |
20120256962 | Video Processing Apparatus and Method for Extending the Vertical Blanking Interval - A video processing apparatus. A first scaling module receives original images according to an original pixel clock and performs adjustments on the original images according to a first scaling ratio to generate first scaled images. A frame buffer buffers the first scaled images. A controller controls the frame buffer to receive the first scaled images according to a first pixel clock and output the first scaled images according to a second pixel clock. A second scaling module receives the first scaled images and performs adjustments on the first scaled images according to a second scaling ratio to generate second scaled images. A length of a vertical blanking interval of the second scaled images is longer than a length of a vertical blanking interval of the original images. | 10-11-2012 |
20120250801 | Intersymbol Interference Removal Method - An ISI removing method for a received signal executed by a receiver in an OFDM system to estimate a frequency-domain data signal carried on the received signal is provided. The method comprises the steps of: removing the first interference of known signal of the received signal; estimating a first data signal according to the received signal; performing a hard decision operation on the first data signal to generate a first frequency-domain signal; performing an Inverse Fast Fourier Transform operation on the first frequency-domain signal to generate a first time-domain signal; creating a tailing signal according to the first time-domain signal; removing a preamble signal from the received signal to generate a second signal; combining the first time-domain signal and the second signal to estimate the frequency-domain data signal. | 10-04-2012 |
20120230453 | CHANNEL ESTIMATION AND SYMBOL BOUNDARY DETECTION METHOD - A channel estimation method for use with a received signal by a receiver is disclosed. The received signal comprises multiple data bursts which are transmitted to the receiver via multiple path channels, with each of the data bursts having a plurality of preamble symbols which are decoded. The channel estimation method includes the following steps: firstly, at least one correlation pattern is generated according to the decoded preamble symbols. Then, a cross correlation of the correlation pattern with the received signal is performed to yield at least one correlation result of channel impulse response (CIR). Wherein, the symbol boundary of the received signal is decided according to the correlation result. | 09-13-2012 |
20120182287 | STEREO IMAGE DISPLAYING METHOD - A stereo image displaying method adapted to a polarizing panel is provided. The stereo image displaying method includes the following steps. An original first eye image and the original second eye image are received. Each of the odd pixel data rows of the original first eye image is interpolation operated with at least one of two adjacent even pixel data rows of original the first eye image to serve as one of a plurality of pixel data rows of a first eye image of a display frame. Each of the even pixel data rows of the original second eye image is interpolation operated with at least one of two adjacent odd pixel data rows of the original second eye image to serve as one of a plurality of pixel data rows of a second eye image of the display frame. The display frame is applied on the polarizing panel. | 07-19-2012 |
20120179933 | PATTERN-DEPENDENT ERROR CORRECTION METHOD AND SYSTEM - A pattern-dependent error correction method and system for a code group alignment finite state machine (FSM) are disclosed. A state corrector generates a start-of-stream delimiter (SSD) detected signal to the FSM when the FSM is in an idle state and at least one condition due to a lost SSD signal is met; and the state corrector generates an idle detected signal to the FSM when at least one condition due to a lost idle signal is met. A pattern corrector generates a corrected code pattern {J,K} to FSM when the FSM is in an idle state and at least one condition due to a false idle state is met; and the pattern corrector generates a corrected code pattern {T,R} to the FSM when the FSM is in a data state, a start of stream state or a data error state, and at least one condition due to a false packet end is met. | 07-12-2012 |
20120140026 | 2D-to-3D COLOR COMPENSATION SYSTEM AND METHOD THEREOF - A 2D-to-3D color compensation method for compensating color processing in a display device is disclosed. The display device is coupled with a 2D-to-3D conversion box. The method includes the following steps: firstly, the 2D-to-3D conversion box sends out a combined calibration pattern to the display device. Then, the display device performs image processing for the combined calibration pattern. Subsequently, detect a difference value between the combined calibration pattern processed by the display device and the original combined calibration pattern. Finally, adjust the combined calibration pattern according to the difference value. | 06-07-2012 |
20120127288 | 2D-to-3D DELAY COMPENSATION SYSTEM AND METHOD THEREOF - A 2D-to-3D delay compensation method for making a pair of shutter glasses be synchronization with a display device's playback of a video source is disclosed. The display device is coupled with a 2D-to-3D conversion box. The method includes the following steps: firstly, the 2D-to-3D conversion box sends out a calibration pattern to the display device. Then, a shutter control signal is sent out after waiting a delay time to switch on and off the left and right lenses of the pair of shutter glasses. Subsequently, the calibration pattern is detected. Finally, determine whether the delay time must be adjusted or not according to the detecting result. | 05-24-2012 |
20120117442 | System and method for handling forward error correction code blocks in a receiver - A receiver apparatus can identify a plurality of patterns corresponding to scrambled synchronization bytes of a transport stream in a number of successive signal frames containing FEC code blocks, determine a pattern distribution into which most of the patterns identified in the successive signal frames map, and generate a synchronization signal locked to a distribution of the FEC code blocks associated with the pattern distribution. With this synchronization signal, FEC code blocks can be timely handled in a reliable manner through a FEC decoder, making the receiver apparatus more efficient and robust. In other embodiments, methods of handling FEC code blocks in a receiver apparatus are also described. | 05-10-2012 |
20120117439 | System and method of decoding LDPC code blocks - A receiver apparatus comprises a LDPC decoder that can apply an accelerated belief propagation method for iteratively decoding each code block. When the number of iterations reaches a certain threshold value, the accelerated belief propagation method can adjust the initial condition used in each iteration. The initial condition is adjusted so as to enhance the likelihood of convergence in the iterative method. As a result, performance of the decoder and receiver apparatus can be improved. | 05-10-2012 |
20120099600 | TRANSCEIVER HAVING HEAC AND ETHERNET CONNECTIONS - A transceiver having HEAC and Ethernet connections is disclosed. An active hybrid & common-mode bias (AHCB) unit facilitates the transmission of differential transmission signals and the reception of first differential reception signals. An Ethernet line gate controllably configures the pairing among first and second differential Ethernet signals, the differential transmission signals and second differential reception signals. An Ethernet physical-layer (PHY) transceiving unit receives both or one of the first and second differential reception signals and the differential transmission signals, followed by processing the reception signals at a physical layer. | 04-26-2012 |
20120087598 | Video Processing System and Method Thereof for Compensating Boundary of Image - A method is used for compensating a boundary of an image, in which each scan line in the image is shifted by a corresponding line shift amount. The method determines a boundary region for the image and moves each pixel in a scan line from an original position to a new position within the boundary region, in which the new position is determined according to the width of the boundary region, the original position, and a line shift amount, and the scan line is shifted by the line shift amount. Then, the method interpolates at least one pixel into the scan line according to the moved pixels for generating a compensated image. | 04-12-2012 |
20120086588 | SYSTEM AND A METHOD OF CORRECTING BASELINE WANDER - A system and method of correcting baseline wander (BLW) are disclosed. An analog-to-digital converter (ADC) converts an analog input to a digital output, and a slicer maps the digital output to one of a plurality of predefined values. A BLW correction unit generates a BLW correction value according to a difference between an input and an output of the slicer. A correction controller generates a fine correction value and a coarse correction value according to the BLW correction value. Specifically, the fine correction value is used to correct the digital output of the ADC, and the coarse correction value is used to correct the analog input of the ADC. | 04-12-2012 |
20120082267 | SYSTEM AND A METHOD OF REGULATING A SLICER FOR A COMMUNICATION RECEIVER - The invention is directed to a system and method of regulating a slicer for a communication receiver. A zero-crossing accumulator receives a slicer output from the slicer and accordingly determines a zero-crossing length of the slicer output. A threshold decision unit regulates at least one threshold value of the slicer according to the zero-crossing length. | 04-05-2012 |
20120069038 | Image Processing Method and Image Display System Utilizing the Same - An image display system including an adjuster, a first analysis module, a second analysis module and a brightness compensation module is disclosed. The adjuster utilizes a specific method and a depth information to adjust a processed image to generate a first image and a second image. The first analysis module analyzes the first image to obtain a first image distribution result. The second analysis module analyzes the second image to obtain a second image distribution result. The brightness compensation module adjusts brightness of the first and the second images according to the first and the second image distribution results. The adjusted first image serves as a left-eye image component and the adjusted second image serves as a right-eye image component. | 03-22-2012 |
20120008852 | SYSTEM AND METHOD OF ENHANCING DEPTH OF A 3D IMAGE - A system and method of enhancing depth of a three-dimensional (3D) image are disclosed. A depth generator generates at least one depth map associated with an image. A depth enhancer enhances the depth map by stretching a depth histogram associated with the depth map, wherein the depth histogram is a distribution of depth levels of pixels of the image. | 01-12-2012 |
20110298987 | CIRCUIT FOR PERFORMING MOTION ESTIMATION AND MOTION COMPENSATION - Circuits for performing motion estimation (ME) and motion compensation (MC) are disclosed. In the ME circuit, rows of a first register are correspondingly coupled to rows of a first memory that stores a search range of a first frame, and rows of a second register are correspondingly coupled to rows of a second memory that stores a search range of a second frame. Block-matching metric calculations are performed through the search range to obtain a motion vector (MV). In the MC circuit, first multiplexers couples each row of a first register to corresponding row of a first memory, and each macro block (MB) may accordingly be selected from the first memory and loaded into the first register. Second multiplexers couples each row of a second register to corresponding row of a second memory, and each MB may accordingly be selected from the second memory and loaded into the second register. | 12-08-2011 |
20110296269 | RECEIVER WITH CAPABILITY OF CORRECTING ERROR - A receiver with capability of correcting error is disclosed. A soft slicer generates quantized data and associated soft data. A decoder with error recovery generates decoded quantized data and a soft sequence, and is capable of correcting one bit of the quantized data. A serial-to-parallel (S/P) converter with code corrector generates parallel data, and is capable of correcting two bits of de-scrambled data bits. | 12-01-2011 |
20110255596 | FRAME RATE UP CONVERSION SYSTEM AND METHOD - The invention is directed to a frame rate up conversion (FRUC) system and method. A motion estimation (ME) unit is configured to generate at least one motion vector (MV) according to a frame input. A triple-line buffer based motion compensation (MC) unit is configured to generate an interpolated frame according to the MV, a reference frame and a current frame, thereby generating a frame output with a frame rate higher than a frame rate of the frame input. | 10-20-2011 |
20110254867 | ADAPTIVE COLOR-TEMPERATURE CALIBRATION SYSTEM AND METHOD - An adaptive color-temperature calibration system and method are disclosed. A chrominance generation unit generates a chrominance criterion according to an input pixel. A matrix generation unit generates a calibration matrix according to the chrominance criterion and a basis matrix. A color calibration unit then performs color-temperature calibration on the input pixel according to the generated calibration matrix, thereby generating an output pixel. | 10-20-2011 |
20110249870 | METHOD OF OCCLUSION HANDLING - In a method of occlusion handling, a reference frame and a current frame are first provided, and at least one foreground object is determined. At least a covered region or an uncovered region with respect to the foreground object is determined. The covered region is then interpolated exclusively accordingly to the current frame, or the uncovered region is interpolated exclusively according to the reference frame. | 10-13-2011 |
20110249188 | METHOD OF BLOCK-BASED MOTION ESTIMATION - In a method of block-based motion estimation a motion vector map is obtained by obtaining a motion vector of each macroblock (MB) in the current frame with respect to the reference frame. The motion vector of each MB in an interpolated frame is then determined according to the motion vector map. | 10-13-2011 |
20110243473 | IMAGE ENHANCEMENT METHOD AND APPARATUSES UTILIZING THE SAME - An image enhancement apparatus is provided. The image enhancement apparatus includes a global tone mapping curve generator, a local tone mapping curve generator, a reference gamma voltage generator and an image generator. The global tone mapping curve generator generates a global tone mapping curve for an input image according to global characteristic(s) of the input image. The local tone mapping curve generator generates a local tone mapping curve for each image partition within the input image according to the global tone mapping curve and further a feature of the image partition. The reference gamma voltage generator generates a plurality of reference gamma voltages for each image partition according to the corresponding local tone mapping curve for the image partition. The image generator generates an output image according to the reference gamma voltages of the image partitions and the input image. | 10-06-2011 |
20110235738 | SYSTEM AND METHOD FOR GENERATING TEST PATTERNS OF BASELINE WANDER - A system and method for generating test patterns of baseline wander, such as worst-case test patterns commonly referred to as killer packets. The number of steps required to cycle an output of a multi-level encoder in order to arrive at an anticipated level is determined. A test packet generator then generates the test patterns according to the determined steps and the state of a scrambler. | 09-29-2011 |
20110221762 | CONTENT-ADAPTIVE OVERDRIVE SYSTEM AND METHOD FOR A DISPLAY PANEL - A content-adaptive overdrive system and method, for a display panel, include a frame difference device and an overdrive device. The frame difference device generates a frame difference map according to a current frame and a previous frame. The frame difference map includes a number of flags respectively indicating similarity between corresponding pixels or blocks of the current frame and the previous frame. The overdrive device adaptively performs an overdrive function based on the frame difference map, the current frame, the previous frame and an overdrive lookup table, hence resulting in an overdrived frame. | 09-15-2011 |
20110184540 | VOLUME ADJUSTING METHOD FOR DIGITAL AUDIO SIGNAL - A method for adjusting the volume of a digital audio signal includes detecting a level in accordance with an audio input signal, determining a gain value in accordance with the detected level, and outputting an audio output signal in accordance with the gain value and the audio input signal. Accordingly, weak audio signals such as background noise in silent periods may be compressed to reduce interference to the human listening experience during such silent periods. | 07-28-2011 |
20110164711 | DECODER AND METHOD FOR ADAPTIVELY GENERATING A CLOCK WINDOW - A decoder and related method adaptively generate a clock window. A falling edge of a horizontal synchronization signal is detected, and the time difference between an actual frame code and a predefined frame code is determined. The beginning and the end of the clock window are then adaptively determined based on the falling edge and the time difference, such that symbol timing recovery through received clock run-in signals may be performed within the generated clock window. | 07-07-2011 |
20110148500 | SAMPLE HOLD CIRCUIT AND METHOD THEREOF FOR ELIMINATING OFFSET VOLTAGE OF ANALOG SIGNAL - A sample hold circuit and a method for eliminating the offset voltage of the analog signal are provided. The sample hold circuit includes a sample unit, a plurality of capacitors, a control unit and a hold unit. When the sample hold circuit is in a first state, the sample unit samples an analog signal. When the sample hold circuit is in a second state, the capacitors eliminate a DC offset voltage of the analog signal sampled by the sample unit, and the hold unit outputs an AC signal of the analog signal sampled by the sample unit. The control unit adjusts a number of the capacitances coupled to a common voltage according to a magnitude of the DC offset voltage, thus to determine the capacitance for eliminating the DC offset voltage. | 06-23-2011 |
20110140947 | ANALOG-TO-DIGITAL CONVERSION UNIT AND ANALOG-TO-DIGITAL CONVERTING METHOD THEREOF - An analog-to-digital conversion unit (ADC unit) and an analog-to-digital converting method (ADC method) are provided. The ADC unit has a plurality of sub analog-to-digital converters and an encoding unit. Each of the employed sub analog-to-digital converters is coupled to two threshold voltages non-successive in terms of levels arrangement, compares the input voltage with the two threshold voltages and outputs two bits according to the comparison results. In this way, the difference between the two threshold voltages coupled by each of the sub analog-to-digital converters can be larger, which is advantageous in advancing the analog-to-digital converting accuracy. | 06-16-2011 |
20110140939 | SAMPLE HOLD CIRCUIT AND METHOD FOR SAMPLING AND HOLDING SIGNAL - A sample hold circuit and a method for sampling and holding a signal are provided. The sample hold circuit includes a sample unit, a direct current (DC) voltage elimination unit, and a hold unit. When the sample hold circuit is in a first state, the sample unit samples an input signal, and the DC voltage elimination unit lowers a predetermined percentage of the DC voltage in the input signal sampled by the sample unit. When the sample hold circuit is in a second state, the DC voltage elimination unit eliminates the residual percentage of the DC voltage, and the hold unit outputs the alternating current (AC) signal in the input signal sampled by the sample unit. | 06-16-2011 |
20110134046 | DISPLAY DEVICE - A display device including a remote control unit and a display panel unit is provided. The display panel unit includes a plurality of optical receivers and a track recognizer. The remote control unit emits a light beam. The optical receivers receive the light beam and convert the light beam into a plurality of sensing voltages. The track recognizer generates a control command according to the sensing voltages so that the display panel unit sets an on-screen display (OSD). | 06-09-2011 |
20110119545 | METHOD AND SYSTEM OF RECEIVING DATA WITH ENHANCED PARTIAL MATCHING - A method and system of receiving data with enhanced partial matching is disclosed. A received word is compared with the frame code to determine mismatch bit(s). Subsequently, a determination is made whether the mismatch bit(s) are at positions of defined critical bits. If the mismatch bit(s) are not critical, the received word is then affirmed. | 05-19-2011 |
20110096988 | IMAGE ENHANCEMENT METHOD AND APPARATUSES UTILIZING THE SAME - An image enhancement apparatus is provided. The image enhancement apparatus includes a global contrast curve generator, a local contrast curve generator and an image generator. The global contrast curve generator generates a global contrast curve for an input image according to a global histogram of the input image. The local contrast curve generator generates a local contrast curve for each image partition within the input image according to the global contrast curve and further a feature of the image partition. The image generator generates an output image by enhancing a contrast of each image partition according to the local contrast curve for the image partition and the input image, and merging the enhanced image partitions. | 04-28-2011 |
20110095737 | VOLTAGE REGULATOR, AND INTEGRATED CIRCUIT USING THE SAME - A voltage regulator and an integrated circuit using the voltage regulator is provided. The voltage regulator has a bandgap reference circuit, an operational amplifier, a power transistor and a voltage divider. The bandgap reference circuit generates a bandgap reference voltage. The operational amplifier receives the bandgap reference voltage and a feedback voltage to output a control signal for the power transistor. The power transistor is powered by a first voltage source and transforms the first voltage source to a second voltage source according to the control signal. The second voltage source is divided by the voltage divider to generate the feedback voltage and is further used in powering the bandgap reference circuit and the operational amplifier. | 04-28-2011 |
20110085081 | VIDEO HORIZONTAL SYNCHRONIZER - A video horizontal synchronizer outputting a line timing signal and an indicating flag of a received video signal for use in a video signal post-processing unit, including a filter outputting a wide bandwidth filtered and a narrow bandwidth filtered signals of the received video signal, a dynamic slicer threshold generator generating a slicer threshold, a timing recovery circuit generating a phase error and the line timing signal, a phase error statistics circuit averaging the phase error to generate a average phase error, a HSYNC checker generating a matching flag indicating whether a periodic pattern appears in the narrow bandwidth filtered signal according to the line timing signal, and a finite state machine controlling the dynamic slicer threshold generator, the timing recovery circuit, the phase error statistics circuit and the HSYNC checker and generating an indicating flag when the average phase error is small enough and the matching flag is confirmed. | 04-14-2011 |
20110060431 | AUDIO OUTPUT DEVICES - An audio output device is provided and includes a signal source, a detector, a plurality of digital-to-analog converters, and a plurality of amplifiers. The signal source generates a plurality of digital signals. The detector receives the digital signals and detects states of the digital signals to generate a plurality of control signals according to the detection results respectively. The digital-to-analog converters receive the digital signals and convert the digital signals to a plurality of analog signals, respectively. The amplifiers receive the analog signals and generate a plurality of amplified signals according to the control signals, respectively. | 03-10-2011 |
20110058739 | SYSTEM AND METHOD OF CONTRAST ENHANCEMENT - A system and method of contrast enhancement is disclosed. A contrast enhancement unit processes an input pixel to generate a contrast-enhanced pixel, and a delta unit subtracts the input pixel from the contrast-enhanced pixel, thereby resulting in a difference value. Multiple delayed difference values generated by a delay unit are low-pass filtered to generate a refined difference value. An adding unit adds back the refined difference value to the input pixel, thereby resulting in an output pixel that is contrast-enhanced without noise boost. | 03-10-2011 |
20110058692 | AUDIO OUTPUT DEVICES - An audio output device is provided and includes a power source, a controller, a signal generating circuit, and a first amplifier. The power source provides a supply voltage signal. The controller receives the supply voltage signal. The controller further compares the supply voltage signal with a threshold voltage signal and generates a control signal according to the comparison result. The signal generating circuit generates a first analog signal. The first amplifier receives the first analog signal and generates a first amplified signal according to the control signal. | 03-10-2011 |
20110032426 | VIDEO STANDARD DETECTOR AND OPERATION METHOD THEREOF - A video standard detector and operation method thereof are provided. The video standard detector includes a low pass filter (LPF) unit and a standard detector unit. The LPF filters a baseband signal. The feature detector detects vertical synchronization information of the baseband signal and horizontal synchronization information of the baseband signal using the output of the LPF, and determines the video standard corresponding to the baseband signal according to the vertical synchronization information and the horizontal synchronization information. | 02-10-2011 |
20110025926 | SOUND INTERMEDIATE FREQUENCY DEMODULATOR AND SOUND INTERMEDIATE FREQUENCY DETECTING METHOD THEREOF - A sound-IF demodulator including a first demodulating unit and a second demodulating unit and a sound-IF detecting method thereof are provided. A sound de-matrix unit is adapted to generate a driving signal by de-matrixing outputs of the sound-IF demodulator. The first demodulating unit generates a first demodulated signal to the sound de-matrix unit by demodulating the first carrier signal. The second demodulating unit detects the signal quality of the sound signal and generates a second demodulated signal to the sound de-matrix unit and/or the first demodulating unit by demodulating the second carrier signal. When the second demodulating unit is idle, the second demodulating unit is programmed to select a corresponding standard among a plurality of predetermined standards for the sound signal according to the signal quality of the sound signal, so that the sound-IF demodulator is programmed to demodulate the sound signal in the corresponding standard. | 02-03-2011 |
20110019091 | Method and System of Automatically Correcting a Sampling Clock in a Digital Video System - A method and system of automatically correcting a sampling clock in a digital video system are disclosed. Sampling clocks with different phases are generated and subjected in turn to analog-to-digital conversion (ADC). A difference of at least a pair of neighboring data out of the ADC with respect to each phase is determined. A maximum difference is determined, and the sampling clock with the phase corresponding to the maximum difference is thus generated. | 01-27-2011 |
20110004810 | Method and System of Receiving Data with Enhanced Error Correction - A method and system of receiving data with enhanced error correction is disclosed. One or more reliability bits associated with each received data bit are generated, for example, by a soft-decision slicer. Subsequently, one or more errors of the data bits may be corrected according to the associated reliability bit(s). | 01-06-2011 |
20100315548 | APPARATUS AND METHOD FOR FRAME RATE UP CONVERSION - A method for frame rate up conversion is provided. The method includes the steps of: receiving a plurality of consecutive input video frames; detecting luminance information for a current frame; and generating a first output frame according to the luminance information for the current frame and a preceding frame before the current frame and generating a second output frame according to the luminance information for the current frame and a succeeding frame after the current frame, wherein the second output frame is outputted after the first output frame. | 12-16-2010 |
20100309385 | DIGITAL INTERMEDIATE FREQUENCY DEMODULATOR - The invention discloses a digital IF demodulator for processing a digital IF signal converted from a radio frequency (RF) signal, including an NCO, a down conversion circuit, a PIF carrier recovery circuit and a video baseband demodulator. The NCO outputs a sine value and a cosine value. The down conversion circuit outputs a first zero IF signal including a first real part signal and a first imaginary part signal, according to the digital IF signal, the sine value and the cosine value. The PIF carrier recovery circuit outputs a loop error signal for the NCO and a second zero IF signal, according to the first zero IF signal and a video synchronization signal. The video baseband demodulator generates a composite video signal according to the second zero IF signal. | 12-09-2010 |
20100309218 | METHOD FOR COLOR CALIBRATION AND DEVICE USING THE SAME - A method for color calibration is provided. The method includes the steps of: providing an input color; obtaining luminance of the input color; determining a grey level of the input color according to luminance of the input color; determining a first calibration matrix and a second calibration matrix according to the grey level of the input color; generating a third calibration matrix according to the first calibration matrix, the second calibration matrix and the grey level of the input color; generating an output color according to the third calibration matrix and the input color. | 12-09-2010 |
20100309213 | Adaptive Stepping-Control System and Method for Dynamic Backlight Control - An adaptive stepping-control system and method for dynamic backlight control (DBLC) is disclosed. A stepping-control unit adjusts output of a dynamic backlight control (DBLC) device, such that the backlight luminance generated from a backlight unit may change smoothly. The amount of change of the backlight luminance per unit time (or stepping rate) varies according to the content of the image data. | 12-09-2010 |
20100309038 | ANALOG TO DIGITAL CONVERTER - An analog to digital converter is provided. The converter comprises a first stage, an adjustment unit and a digital error correction logic. The first stage has a first sensing range and receives a first voltage to generate a first digital code. The adjustment unit adjusts the first sensing range of the first stage. The digital error correction logic receives and corrects the first digital code to generate a digital code corresponding to the first voltage. | 12-09-2010 |
20100296569 | DIGITAL DEMODULATING APPARATUS FOR TIMING ERROR DETECTION - The invention discloses a digital demodulating apparatus for timing error detection, including a numerically controlled oscillator, an equalizer unit, a decoder and a timing error detector. The numerically controlled oscillator generates a first sequence signal according to an input sequence signal and a timing error sequence signal. The equalizer unit equalizes the first sequence signal to generate an equalized sequence signal. The decoder decodes the equalized sequence signal to generate to generate an output sequence signal. The timing error detector generates the timing error sequence signal according to the first sequence signal and one of the equalized sequence signal and the output sequence signal. | 11-25-2010 |
20100283646 | ANALOG TO DIGITAL CONVERTER - An analog to digital converter is provided. The converter comprises a dither gain generator, a first stage, a multiplier, a second stage and a digital error correction logic. The dither gain generator generates a dither gain. The first stage receives a first voltage to generate a first digital code and a second voltage. The multiplier is coupled to the first stage and multiplies the second voltage with the dither gain to generate a third voltage. The second stage receives the third voltage to generate a second digital code. The digital error correction logic receives and corrects the first digital code and the second digital code to generate a digital code corresponding to the first voltage. | 11-11-2010 |
20100283641 | ANALOG TO DIGITAL CONVERTER - An analog to digital converter is provided. The converter comprises a dither gain generator, a first stage, an adder, a second stage, and a digital error correction logic. The dither gain generator generates a dither gain. The first stage receives a first voltage to generate a first digital code and a second voltage. The adder is coupled to the first stage and adds the dither voltage to the second voltage to generate a third voltage. The second stage receives the third voltage to generate a second digital code. The digital error correction logic receives and corrects the first digital code and the second digital code to generate a digital code corresponding to the first voltage. | 11-11-2010 |
20100268977 | METHOD AND APPARATUS FOR ACCESSING MEMORY UNITS - An apparatus for accessing a memory is provided, and comprises a first device, a second device, an adjusting unit, a buffer and a memory. The first device operates at a first clock. The second device operates at a second clock. The buffer reads data from the second device to be written to the memory unit and reads from the memory unit to be read by the first device. The adjusting unit masks a portion of pulses of the first clock to generate an adjusted clock, wherein the first device reads the buffer according to the adjusted clock. The apparatus for accessing a memory is a video processor, and the first device and the second device are an input unit and an output unit of the video processor. | 10-21-2010 |
20100240334 | Broadcast Receiver and Method for Regulating the Same - A broadcast receiver includes a tuner circuit and a demodulator circuit. The tuner circuit tunes a radio frequency (RF) signal to output an intermediate frequency (IF) signal. The demodulator circuit demodulates the IF signal from the tuner circuit and outputs a command signal based on the quality of the IF signal, for changing a take over point (TOP) value, preset in the tuner circuit, at which one amplitude gain control (AGC) stopping and another taking over. A method for regulating a broadcast receiver is also disclosed herein. | 09-23-2010 |
20100238357 | AUDIO/VIDEO SIGNAL PROCESSOR - An audio/video signal processor is provided and includes a first chip, a bus, and a second chip. The first chip comprises receives at least one input signal with display and sound information through at least one I/O interface and converts the input signal to generate a converted signal. The bus is communicated with the first chip. The second chip receives the converted signal through the bus and processes the converted signal to generate a display and sound signal for displaying and playing. The first chip and the second chip are packaged by the same packaging manner, such as quad flat package (QFP), with the second chip fabricated by a more advanced process than the first chip. | 09-23-2010 |
20100226442 | BIT STREAM BUFFER CONTROLLER AND ITS METHOD - A bit-stream buffer controller for a video decoder includes a first FIFO, a second FIFO, and an interrupt controller. The first FIFO is configured to store an input bit-stream. The second FIFO is configured to store a payload extracted from the input bit-stream. The interrupt controller is configured to generate an interrupt signal according to a fullness status of the first FIFO and the second FIFO such that the video decoder may be switched to load the payload without checking the fullness status each time the payload is loaded. | 09-09-2010 |
20100226424 | TAP/GROUP-REVIVABLE DECISION FEEDBACK EQUALIZING METHOD AND EQUALIZER USING THE SAME - A tap/group-revivable decision feedback equalizing method and equalizer using the same is disclosed. The equalizer includes a feed-forward filter and a feedback filter each with a plurality of taps divided in groups. The tap/group-revivable decision equalizing method includes training all the taps to generate their tap coefficients, and selecting all the taps of any of the groups with a tap coefficient greater than a predetermined value and selecting a number of taps of any of the groups without a tap coefficient greater than the predetermined value, but with a neighboring group with a tap coefficient greater than the predetermined value are selected, and having the selected taps utilized for equalization. | 09-09-2010 |
20100201553 | A/D Converter and Method for Enhancing Resolution of Digital Signal - A method for enhancing resolution of digital signals converted from analog signals is provided. The method includes the steps of: converting an analog input signal into N-bit digital outputs, where N is a positive integer; interpolating the N-bit digital outputs to add one or more least significant bit orders for the N-bit digital outputs; generating one or more dither values as least significant bits corresponding to the least significant bit orders; and superimposing the dither values on the interpolation of the N-bit digital outputs. An A/D converter is also disclosed herein. | 08-12-2010 |
20100182053 | SINE/COSINE VALUE GENERATION APPARATUS - An apparatus for generating sine/cosine values of an input phase is disclosed. The apparatus includes a phase projector, an LUT-arithmetic unit, a temp sine/cosine generator and a sine/cosine value generator. The phase projector maps the input phase angle into an octant phase and determines an octant index indicating which octant the input phase angle actually locates and a flag indicating whether or not the input phase happens to be pi/4, 3*pi/4, 5*pi/4 or 7*pi/4. The LUT-arithmetic unit receives the octant phase for provision of its corresponding sine/cosine values. The temp sine/cosine generator receives the corresponding sine/cosine values of the octant phase for provision of temp sine/cosine values based on the flag. The sine/cosine value generator selectively swaps and inverts the temp sine/cosine values as the sine/cosine values of the input phase based on a swap index derived from the octant index. | 07-22-2010 |
20100149112 | OSD CONTROL SYSTEM AND OSD CONTROL METHOD FOR CONTROLLING DISPLAY PANEL PROPERTIES ACCORDING TO SENSED TOUCH MOVEMENTS - An OSD control system is provided and includes a display device. The display device includes a panel for displaying image data, a touch pad disposed around the panel, a display controller and a touch sensor controller. The touch pad includes touchable keys for sensing touch movements thereon and transferring interrupt signals upon sensing the touch movements. The display controller receives key status signals and controls display properties of the panel according to the key status signals. The touch sensor controller receives the interrupt signals, recognizes types and corresponding positions of the touch movements in response to the interrupt signals, and generates the key status signals according to the type and the positions of the touch movements. | 06-17-2010 |
20100141832 | Method of Converting Frame Rate of Video Signal - A method of converting a frame rate of a video signal includes the steps of: receiving a pulldown film sequence existing in or converted from a sequence of successive-in-time frames of the video signal, in which the pulldown film sequence comprises a plurality of diverse original frames each having a corresponding number of duplicate frames; modifying the original frames; performing estimation of at least one motion vector associated with the modified original frames; and interpolating new frames between the modified original frames in accordance with the motion vector. | 06-10-2010 |
20100134470 | Liquid Crystal Display and Source Driving Circuit Thereof - A source driving circuit includes a gamma voltage generator, a common voltage generator and a driver. The gamma voltage generator receives gamma data from a timing controller through reduced swing differential signaling (RSDS) transmission interface to generate corresponding gamma voltages. The common voltage generator receives common voltage data from the timing controller to generate a corresponding common voltage. The driver receives image data from the timing controller through the RSDS transmission interface, the gamma voltages from the gamma voltage generator and the common voltage from the common voltage generator for modifying the image data using the gamma voltages and the common voltage and transmitting the modified image data to a panel of the liquid crystal display. | 06-03-2010 |
20100111240 | Method to Track a Target Frequency of an Input Signal - A digital demodulator adapted in a receiver and a digital demodulation method are provided. The digital demodulator comprises: a phase splitter, a complex multiplier, an AFC, a limiter, a phase detector, a re-tracker, a post-multiplier and an oscillator. The phase splitter generates a complex signal from the input signal. The complex multiplier multiplies the complex signal by both first and second phase signals to generate first and second base band signals. The AFC generates a first output signal. The limiter generates a trend signal and the re-tracker generates a tuning signal from the first output signal. The phase detector multiplies the trend and second base signal and adjusts the multiplied signal based on the tuning signal. The oscillator generates the first and second phase signals according to the output of the phase detector. The post-multiplier multiplies the trend signal by the first and second base band signals for output. | 05-06-2010 |
20100088637 | Display Control Device and Display Control Method - A display control device to control settings of a display is provided. The display control device comprises a photo sensor, a determining module and a controller. The photo sensor detects a user hand at different timings to generate a plurality of images. The determining module analyzes the images to generate a series of gesture signals for the user hand. The controller generates a control signal to display an on-screen display menu once activated, and to select options within the on-screen display menu and control the setting of the selected option based on the gesture signals such that the display can be adjusted accordingly. | 04-08-2010 |
20100046541 | Method and System for Generating a Packet Identifier Table from a Received Transport Stream - One embodiment of the present invention sets forth a method of generating a packet identifier table that comprises reading a packet identifier value from a received transport stream packet, identifying a type of data contained in the received transport stream packet, and generating a table with mapping information between the packet identifier value and the identified type of data. | 02-25-2010 |
20100013871 | BACKLIGHT CONTROLLER, DISPLAY DEVICE USING THE SAME AND METHOD FOR CONTROLLING BACKLIGHT MODULE - A backlight controller, a display device using the same and a method for controlling a backlight module are provided. The backlight controller includes a temporal weighting module and a dimming controlling module. The temporal weighting module calculates a weight sum of a first backlight luminance provided in a current frame and a target backlight luminance to serve as an adjusted backlight luminance. The target backlight luminance is obtained according to an image content of the current frame. The dimming controlling module increases or decreases the adjusted backlight luminance by a step value according to the target backlight luminance and generates a second backlight luminance provided in a next frame. Therefore, a backlight luminance of the backlight module not only can be smoothly adjusted to the target backlight luminance at high speed for avoiding backlight flicker, but also can be adaptive to image content for saving electric power consumption. | 01-21-2010 |
20090303390 | Method for separating luminance and chrominance of composite TV analog signal - A method for separating luminance and chrominance of a composite TV analog signal includes the steps of: measuring first differences between horizontal neighbor pixels, second differences between vertical neighbor pixels and third differences between temporal neighbor pixels encoded in the composite TV analog signal; comparing the first, second and third differences with one another to obtain a minimum difference used as a factor of a weighting function; and filtering the composite TV analog signal simultaneously by a two-dimensional (2D) comb filter and a three-dimensional (3D) comb filter according to the weighting function on the basis of the minimum difference to obtain a luminance signal and a chrominance signal, in which magnitudes of a part of the composite TV analog signal filtered by the 2D comb filter and magnitudes of the other part of the composite TV analog signal filtered by the 3D comb filter are determined by the weighting function. | 12-10-2009 |
20090278601 | Preamplifier and method for calibrating offsets therein - A preamplifier includes cascade-connected amplifying circuits, and at least one of the cascade-connected amplifying circuits includes a differential switch pair circuit, a comparator and energy storing elements. The differential switch pair circuit has a pair of differential inputs and a pair of differential outputs. The comparator -outputs a comparison signal by comparing the differential outputs. The energy storing elements are respectively and selectively coupled to one of the differential outputs based on the comparison signal to adjust potential of the differential outputs. A method for calibrating offsets in a preamplifier is also disclosed herein. | 11-12-2009 |
20090262249 | Interpolated frame generating method - An interpolated frame generating method is provided. The interpolated frame generating method comprises the steps of: providing a first frame and a second frame; calculating a first motion vector having a first x-component with a first x-length along the x-axis and a y-component with a first y-length along the y-axis; determining the first x-length and the y-length is an odd integral number of pixels; generating a second motion vector comprising: a second x-component with a second x-length smaller than the first x-length and a second y-component with a second y-length smaller than the first y-length, wherein the second x-length and the second y-length are an integral number of pixels respectively; the direction of the second x-component and y-component is the same as the first x-component and y-component respectively; and generating an interpolated frame between the first and the second frame according to the first frame and the second motion vector. | 10-22-2009 |