NXP B.V. Patent applications |
Patent application number | Title | Published |
20160142119 | BEAM FORMING WITH DOUBLE-NULL-STEERING FOR IN-BAND ON-CHANNEL RECEPTION - Various exemplary embodiments relate to a method for improving reception of transmissions with first adjacent interference signals, the method including selecting one or more time samples from each of two or more antennas; generating a lower first adjacent interference (LFAI) signal, a desired signal, and an upper first adjacent interference (UFAI) signal for each of the time samples; calculating a lower weighting co-efficient based on the LFAI signal; calculating a middle weighting co-efficient based on the desired signal; calculating a upper weighting co-efficient based on the UFAI signal; combining the lower weighting co-efficient with a filtered LFAI signal into a weighted lower signal; combining the middle weighting co-efficient with a filtered desired signal into a weighted middle signal; combining the upper weighting co-efficient with a filtered UFAI signal into a weighted upper signal; and combining the weighted lower signal, the weighted middle signal, and the weighted upper signal. | 05-19-2016 |
20160134629 | BINDING MOBILE DEVICE SECURE SOFTWARE COMPONENTS TO THE SIM - Various embodiments include a method for binding a secure software application to a mobile device wherein the mobile device includes a processor and a subscriber identity module (SIM) card, including transmitting, by the processor, an authentication challenge to the SIM card; receiving an authentication response from the SIM card; verifying the authentication response from the SIM card; and enabling the secure software application when the authentication response from the SIM card is verified. | 05-12-2016 |
20160131752 | MIMO RADAR SYSTEM - Various exemplary embodiments relate to a method for detecting an object using radar system having M transmit antennas, N receive antennas, and a processor, including: receiving, by the processor, N×M digital signals, wherein the N receivers receive M received signals corresponding to M sequences of encoded transmitted signals resulting in N×M digital signals; processing the N×M digital signals to produce N×M first range/relative velocity matrices; applying a phase compensation to N×(M−1) first range/relative velocity matrices to compensate for a difference in range between the N×(M−1) first range/relative velocity matrices and the Mth range/velocity matrix; decoding the M phase compensated range/relative velocity matrices for the N receivers using an inverse of the transmit encoding to produce M decoded phase range/relative velocity matrices for the N receivers; detecting objects using the M range/relative velocity matrices for the N receivers to produce a detection vector. | 05-12-2016 |
20160124454 | LOW QUIESCENT CURRENT VOLTAGE REGULATOR WITH HIGH LOAD-CURRENT CAPABILITY - Embodiments of voltage regulators and methods for operating a voltage regulator are described. In one embodiment, a voltage regulator includes a set of current mirror circuits configured to convert an input voltage into an output voltage and a voltage buffer circuit configured to buffer a reference voltage for the set of current mirror circuits. The set of current mirror circuits form a positive feedback loop. Other embodiments are also described. | 05-05-2016 |
20160124086 | RADAR AMBIGUITY RESOLVING DETECTOR - Various exemplary embodiments relate to a method for determining the velocity of an object using radar system having a processor, including: receiving, by a processor, a first digital signal corresponding to a first transmit signal; receiving, by the processor, a second digital signal corresponding to a second transmit signal; processing the first digital signal to produce a first range/relative velocity matrix; detecting objects in the first range/relative velocity matrix to produce a first detection vector; unfolding the first detection vector; processing the second digital signal to produce a second range/relative velocity matrix; interpolating the second range/relative velocity matrix in the relative velocity direction wherein the interpolated second range/relative velocity matrix has a frequency spacing corresponding to the frequency spacing of the first range/relative range velocity matrix in the relative velocity direction; detecting objects in the second range/relative velocity matrix to produce a second detection vector; unfolding the second detection vector; and determining a true velocity of the detected objects based upon the unfolded first and second detection vectors. | 05-05-2016 |
20160119362 | DATA PROCESSING SYSTEM, METHOD OF INITIALIZING A DATA PROCESSING SYSTEM, AND COMPUTER PROGRAM PRODUCT - A data processing system is conceived, which comprises at least two security levels and key material stored at a specific one of said security levels, wherein the key material is tagged with a minimum security level at which the key material may be stored. | 04-28-2016 |
20160118357 | PACKAGED SEMICONDUCTOR DEVICE WITH INTERIOR POLYGONAL PADS - Embodiments of a packaged semiconductor device with interior polygon pads are disclosed. One embodiment includes a semiconductor chip and a package structure defining a rectangular boundary and having a bottom surface that includes interior polygonal pads exposed at the bottom surface of the package structure and located on a centerline of the bottom surface of the package structure and edge polygonal pads exposed at the bottom surface of the package structure, located at an edge of the rectangular boundary, and including one edge polygonal pad in the vicinity of each corner of the rectangular boundary. The interior polygonal pads are configured such that a line running between at least one vertex of each of the interior polygonal pads is parallel to an edge of the rectangular boundary of the package structure. | 04-28-2016 |
20160116924 | METHOD AND SYSTEM FOR EXTENDING THE LIFETIME OF MULTI-CORE INTEGRATED CIRCUIT DEVICES - Embodiments of a method and system are disclosed. One embodiment of an integrated circuit device is disclosed. The integrated circuit device includes first and second processor cores configured to perform a respective first and second set of functional processing. The integrated circuit device also includes a core-specific process state monitor associated with the first processor core, a core-specific process state monitor associated with the second processor core, a core-specific aging monitor associated with the first processor core, a core-specific aging monitor associated with the second processor core, a power management unit, a clock generation unit, and a control system configured to individually control operating points of the first and second processor cores and workload in response to feedback from the core-specific process state monitors and from the core-specific aging monitors. | 04-28-2016 |
20160105196 | DIRECT SIGMA-DELTA RECEIVER - A sigma delta receiver achieves increased stability and noise reduction. The sigma delta receiver includes a first integrator stage, an isolation stage, a second integrator stage, and a quantization stage. The first integrator stage receives an analog radio frequency (RF) signal from an antenna and generates an analog baseband signal based on the analog RF signal. The isolation stage is coupled to an output of the first integrator stage. The isolation stage receives the analog baseband signal from the first integrator stage and amplifies the analog baseband signal. The second integrator stage is coupled to an output of the isolation stage to receive the analog baseband signal. The second integrator stage further amplifies the analog baseband signal. The quantization stage converts the analog baseband signal to a digital signal, and outputs the digital signal. | 04-14-2016 |
20160104148 | COMMUNICATION SYSTEM, A METHOD OF INITIATING A TRANSACTION, A BASE STATION AND A TRANSPONDER - A communication system for initiating a transaction between a first communication device and a second communication device is disclosed. In an embodiment, one the first and second communication devices generates a transaction initiation code and transmits the transaction initiation code to the other one of the first and second communication devices and at least one of the first and second communication devices outputs output information based on the transaction initiation code to a user. One of the first and second communication devices receives user information from the user, and for initiates the transaction between the first and the second communication device if compatibility is discovered between the transaction initiation code and the user information. | 04-14-2016 |
20160086934 | LIL ENHANCED ESD-PNP IN A BCD - Disclosed is a PNP ESD integrated circuit, including a substrate, an active region formed within the substrate, the active region including at least one base region of a second conductivity type, a plurality of collector regions of a first conductivity type formed within the active region, a plurality of emitter regions of the first conductivity type formed within the active region, and a local interconnect layer (LIL) contacting the plurality of emitter regions and the plurality of collector regions, the LIL including cooling fin contacts formed on the collector regions to enhance the current handling capacity of the collector regions. | 03-24-2016 |
20160084952 | PERSONAL RADAR ASSISTANCE - Various exemplary embodiments relate to a radar device for detecting objects that intersect an area, the device including a mount attachment; a radar sensor; an output interface; a memory storing one or more environment parameters; a processor in communication with the radar sensor, the output interface, and the memory, the processor being configured to: receive, from the radar sensor, signal information; retrieve, from the memory, environment parameters; calculate, based on the signal information, the distance relative to the sensor of one or more objects; calculate an area based on at least one of the environment parameters; and determine that at least one of the one or more objects intersect the area. | 03-24-2016 |
20160079970 | RESISTIVE DIVIDER CIRCUIT FOR A DIFFERENTIAL SIGNAL COMMUNICATIONS RECEIVER - A resistive divider circuit for differential signaling is disclosed. The resistive divider includes a first branch and a second branch and each branch has an input, a first resistive component comprised of a number of unit resistors, a second resistive component comprised of a number of unit resistors, and an output connected between the first resistive component and the second resistive component, the output forming a differential mode output. The first resistive component and the second resistive component are comprised of an equal number of unit resistors. | 03-17-2016 |
20160078250 | REMAPPING CONSTANT POINTS IN A WHITE-BOX IMPLEMENTATION - A non-transitory machine-readable storage medium encoded with instructions for execution by a keyed cryptographic operation by a cryptographic system mapping an input message to an output message, wherein the cryptographic operation includes at least one round including a non-linear mapping function configured to map input data to output data, including: instructions for determining that the input data has a diversification number less than a diversification level threshold number; instructions for remapping the input data to a remapped input data, wherein the remapped input data corresponds to an input data having a diversification number greater than or equal to the diversification threshold value, and instructions for inputting the remapped input data into the non-linear mapping function to obtain output data. | 03-17-2016 |
20160071748 | PNEUMATIC WAFER EXPANSION - A die expansion tool and method for expanding foil of a foil carrier connected to a frame is disclosed. In the embodiment, the die expansion tool has an inner body within a cavity formed by an outer body. The frame of the foil carrier can be positioned within the outer body and a wafer attached to the foil of the foil carrier can be positioned over the inner body. A pressurized fluid system, also within the cavity of the outer body, is positioned such that the pressurized fluid system can move the frame axially around the inner body and expand the foil. | 03-10-2016 |
20160056832 | DIGITAL-TO-ANALOG CONVERTER (DAC), METHOD FOR OPERATING A DAC AND TRANSCEIVER CIRCUIT - Embodiments of digital-to-analog converters (DACs), methods for operating a DAC, and transceiver circuits are described. In one embodiment, a DAC includes an input terminal configured to receive a digital signal, a converter circuit configured to convert the digital signal into an analog signal using first-order interpolation allowing low electromagnetic emissions, and an output terminal configured to output the analog signal. Other embodiments are also described. | 02-25-2016 |
20160050047 | Reduced Memory Iterative Baseband Processing - A receiver, including: a posteriori probability demodulator configured to receive an input digital signal and output demodulated data; a deinterleaver configured to deinterleave the demodulated data; a forward error correction (FEC) decoder configured to error correct the demodulated data; a FEC encoder configured to encode the error corrected demodulated data; an interleaver configured to interleave the FEC encoded data and output the interleaved FEC encoded data to the posteriori probability demodulator; and a symbol compressor/decompressor configured to compress symbol data from the a posteriori demodulator and store the compressed data in a symbol memory and configured to decompress compressed symbol data stored in the symbol memory. | 02-18-2016 |
20160049461 | METAL-INSULATOR-METAL (MIM) CAPACITOR - There is disclosed a metal-insulator-metal, MIM, capacitor. The MIM capacitor comprises a MIM stack formed within an interconnect metal layer. The interconnect metal layer is utilised as an electrical connection to a metal layer of the MIM stack. | 02-18-2016 |
20160049155 | ARTICLE OF MANUFACTURE, SYSTEM AND COMPUTER-READABLE STORAGE MEDIUM FOR PROCESSING AUDIO SIGNALS - Embodiments of an article of manufacture, a system for processing audio signals and a computer-readable storage medium containing program instructions for processing audio signals are described. In one embodiment, an article of manufacture comprising at least one non-transitory, tangible machine readable storage medium containing executable machine instructions for processing audio signals, where execution of the executable machine instructions by a processing device causes the processing device to perform steps, which include estimating a spectral difference between a first audio signal and a second audio signal that carry the same audio content, transforming the second audio signal based on the spectral difference and generating an output audio signal based on the transformed second audio signal. Other embodiments are also described. | 02-18-2016 |
20160036499 | COOPERATIVE ANTENNA-DIVERSITY RADIO RECEIVER - Various exemplary embodiments relate to a wireless communications system related method and vehicle including: a first communications device configured for attachment to a vehicle including: a first antenna group, a first receiver configured to receive a first instance of a message via the first antenna group, a first transmitter configured to transmit a second instance of the message via the first antenna group, and a first controller configured to cause transmission of the second instance via the first transmitter in response to the first receiver receiving the first instance; and a second communications device configured for attachment to the vehicle including: a second antenna group, a second receiver configured to receive data via the second antenna group, wherein the second receiver receives both the first instance and the second instance, and message combination circuitry configured to generate combined message by combining the first instance and the second instance. | 02-04-2016 |
20160033637 | METHOD OF SECURE RF RANGING UNDER STRONG MULTIPATH REFLECTIONS - A receiver, including: a tuner receiving an input signal; a signal processor configured to process the input signal; an automatic gain control (AGC) controller configured to: initialize the receiver in a low gain state; determine the presence of a signal; and increase the receiver gain to determine if a weak signal is present prior to a strong signal. | 02-04-2016 |
20160028569 | SCHEDULING MESSAGES USING MIXED MODULATION SETTINGS - Various exemplary embodiments relate to a wireless communications device and related method and machine-readable storage medium including: at least one antenna; a transmission circuit to transmit data via the at least one antenna and a wireless communications medium according to any of a plurality of modulation schemes; a reception circuit to receive data via the at least one antenna; an application controller to generate a series of messages having a message type and associated with an application; and a message scheduler to provide modulation settings to the transmission circuit for respective messages of the series to be transmitted according to different modulation schemes of the plurality of modulation schemes, wherein modulation schemes are chosen for transmission based on a modulation scheme pattern, whereby a first message is transmitted according to a first modulation scheme and a second message is transmitted according to a second modulation scheme. | 01-28-2016 |
20150381129 | VARIABLE GAIN TRANSIMPEDANCE AMPLIFIER - Embodiments of variable gain transimpedance amplifiers are described. In an embodiment, the variable gain transimpedance amplifier may include an amplifier coupled to an adjustable gain feedback network, the adjustable gain feedback network including a selectable set of Resistor-Capacitor (RC) branches, each RC branch having one or more unit RC elements, each unit RC element being comprised of a unit resistor and a unit capacitor arranged in parallel. | 12-31-2015 |
20150372989 | METHOD FOR INTRODUCING DEPENDENCE OF WHITE-BOX IMPLEMENTATION ON A SET OF STRINGS - A method of performing a cryptographic operation using a cryptographic implementation in a cryptographic system, including: receiving, by the cryptographic system, an identifying string value; receiving, by the cryptographic system, an input message; performing, by the cryptographic system, a keyed cryptographic operation mapping the input message into an output message wherein the output message is the correct result when the indentifying string value is one of a set of binding string values, wherein the set includes a plurality of binding string values. | 12-24-2015 |
20150372662 | WIRELESS CHARGER RECEIVER-SIDE COMMUNICATION INTERFERENCE ELIMINATION - Embodiments of an apparatus are disclosed. In an embodiment, a power receiver unit is disclosed. The power receiver unit includes a power pick-up unit, a communication modulator, and a filter. The power pick-up unit receives a wireless power signal. The communication modulator applies a modulation to the received wireless power signal. The filter suppresses a load signal from a load of the wireless charge receiver to prevent interference with the modulation. | 12-24-2015 |
20150371620 | SYSTEM AND METHOD FOR BLENDING MULTI-CHANNEL SIGNALS - Embodiments of systems and methods for blending multi-channel signals are described. In one embodiment, a method for blending multi-channel signals involves computing component signals from the multi-channel signals, cross-fading the component signals based on different temporal rates to generate cross-faded component signals and generating a blended multi-channel signal based on the cross-faded component signals. Other embodiments are also described. | 12-24-2015 |
20150365779 | ELECTROMAGNETIC INDUCTION RADIO - A electromagnetic induction wireless communication system including: a magnetic antenna; an electric antenna; a tuning capacitor coupled to the magnetic antenna configured to tune the magnetic antenna; a controller configured to control the operation of the communication system; a signal source coupled to the controller configured to produce a communication signal used to drive the magnetic antenna and the electric antenna; a voltage control unit coupled to the signal source configured to produce one of an amplitude difference, phase difference, and an amplitude and a phase difference between the communication signal used to drive the magnetic antenna and electric antenna. | 12-17-2015 |
20150349981 | SYSTEM AND METHOD FOR PERFORMING CHANNEL ESTIMATION ON AN OFDM SIGNAL - Embodiments of systems and methods for performing channel estimation on Orthogonal frequency-division multiplexing (OFDM) signals are described. In one embodiment, a method for performing channel estimation on an OFDM signal involves performing blind channel phase estimation on an OFDM signal to obtain channel phase information and performing blind channel magnitude estimation on the OFDM signal to obtain channel magnitude information. Each of performing blind channel phase estimation on the OFDM signal and performing blind channel magnitude estimation on the OFDM signal involves detecting and suppressing a signal path of the OFDM signal. Other embodiments are also described. | 12-03-2015 |
20150349849 | COMMUNICATION CIRCUIT AND APPROACH WITH MODULATION - Various aspects of the present disclosure involve communications, and more specifically wireless communications with modulation. As may be implemented in accordance with one or more embodiments, a rectifier having a plurality of active circuits operates in first and second modes to modulate signals communicated via an antenna as follows. The first mode is at least a half-active mode in which at least one of the active circuits passes the signal, and the second mode consumes less power than the first mode. A modulator modulates a waveform of the signal by selectively operating at least one of the plurality of active circuits, therein setting an impedance of the rectifier and modulating an amplitude of the signal. | 12-03-2015 |
20150349781 | MULTI-MODULUS FREQUENCY DIVIDER - A frequency divider circuit can achieve multi-modulus operation. The frequency divider includes clocking transistor devices, memory transistor circuits, write transistor devices, and a current source bias. The clocking transistor devices receive a differential input signal having a first frequency at an input of the frequency divider. The memory transistor circuits store signals based on the differential input signal from the clocking transistor devices. The write transistor devices make a divided frequency signal available at an output terminal. The current source bias is coupled to the clocking transistor devices. The current source bias applies a bias current to adapt the frequency divider to a common-mode at the input of the frequency divider. | 12-03-2015 |
20150346742 | ENERGY RECYCLING FOR A COST EFFECTIVE PLATFORM TO OPTIMIZE ENERGY EFFICIENCY FOR LOW POWERED SYSTEM - A system including: a voltage converter configured to convert a voltage from a power source to a different voltage; a memory coupled to the voltage converter; a digital logic circuit; and a level shifter coupled between the memory and digital logic circuit; wherein leakage current from the memory is stored in a capacitance in the digital logic circuit, wherein the voltage converter is further coupled to a node between the memory and digital logic circuit, and wherein the voltage converter is configured to: monitor a voltage at the node wherein the node has a desired operating voltage value; and adjust the voltage at the node when the voltage at the node varies from the desired operating voltage value. | 12-03-2015 |
20150346321 | SIGNAL-BASED DATA COMPRESSION - Aspects of the present disclosure are directed to apparatuses and methods involving the detection of signal characteristics. As may be implemented in accordance with one or more embodiments, an apparatus includes a radar or sonar transceiver that transmits signals and receives reflections of the transmitted signals. A data compression circuit determines a compression factor based on characteristics of the signals, such as may relate to a channel over which the signal passes and/or related aspects of an object from which the signals are reflected (e.g., velocity, trajectory and distance). Data representing the signals is compressed as a function of the determined compression factor. | 12-03-2015 |
20150346241 | BROAD-RANGE CURRENT MEASUREMENT USING VARIABLE RESISTANCE - An apparatus, method and integrated circuit for broad-range current measurement using variable resistance are disclosed. Embodiments of an apparatus for sensing current through a transistor device may include an interface configured to receive a current from the transistor device for sensing. In an embodiment, the apparatus may also include a sensor component coupled to the interface and configured to receive the current from the transistor device and to generate a responsive sensor voltage, the sensor component comprising an adjustable resistance component, a resistance value of the adjustable resistance component being selectable in response to a level of the current received at the interface. | 12-03-2015 |
20150346239 | BROAD-RANGE CURRENT MEASUREMENT USING DUTY CYCLING - An apparatus, method and integrated circuit for broad-range current measurement using duty cycling are disclosed. Embodiments of an apparatus for sensing current through a transistor device may include an interface configured to receive a current from the transistor device for sensing. Additionally, embodiments may include a sensor component coupled to the interface and configured to receive the current from the transistor device and to generate a responsive sensor voltage. Embodiments may also include a sense control circuit configured to control a duty cycle of the sensor component. | 12-03-2015 |
20150342098 | I/O DEVICE, METHOD FOR PROVIDING ESD PROTECTION FOR AN I/O DEVICE AND ESD PROTECTION DEVICE FOR AN I/O DEVICE - Embodiments of a method for providing electrostatic discharge (ESD) protection for an Input/Output (I/O) device, an ESD protection device for an I/O device, and an I/O device are described. In one embodiment, a method for providing ESD protection for an I/O device involves activating a switch device to turn off the I/O device during an ESD event and deactivating the switch device to turn on the I/O device in the absence of an ESD event. Other embodiments are also described. | 11-26-2015 |
20150341013 | COMMUNICATION CIRCUIT WITH IMPEDANCE MATCHING - Aspects of the present disclosure are directed to addressing impedance-matching issues. As may be implemented in connection with one or more embodiments, an apparatus includes an integrated circuit (IC) chip having a signal-connection terminal and processing circuitry that passes signals along a communication path that is within the IC chip and connected to the signal-connection terminal. Impedance-matching circuitry operates to provide impedance-matching for the communication path, therein mitigating signal loss due to impedance-mismatching. A chip-mounting structure secures the IC chip and electrically connects thereto at the signal-connection terminal. | 11-26-2015 |
20150332027 | PROGRAM CABLE OBFUSCATION BASED UPON RECENTLY EXECUTED PROGRAM CODE - A method of obscuring software code including a plurality of instructions, comprising: determining, by a processor, a number N prior instructions to a current instruction; encoding the current instruction based upon a first function, a second function, and the N prior instructions, wherein the second function is based upon the N prior instructions, and wherein the first function is based upon the current instruction and an output of the second function. | 11-19-2015 |
20150331609 | TIME MANAGEMENT USING TIME-DEPENDENT CHANGES TO MEMORY - A time manager controls one or more timing functions on a circuit. The time manager includes a data storage and a time calculator. The data storage device stores a first indication of a performance characteristic of a memory cell at a first time. The data storage device also stores a second indication of the performance characteristic of the memory cell at a second time. The time calculator is coupled to the data storage device. The time calculator calculates a time duration between the first time and the second time based on a change in the performance characteristic of the memory cell from the first indication to the second indication. | 11-19-2015 |
20150324585 | RETURN-ORIENTED PROGRAMMING AS AN OBFUSCATION TECHNIQUE - A method for obfuscating functionality of computer software is disclosed. In an embodiment, the method involves determining a first set of instructions needed to perform a target operation and a second set of instructions for at least one or more additional operations. The second set of instructions is tuned to contain instructions such that, by executing the second set of instructions, the function of the first set of instructions can be performed. Once the first and second sets of instruction are determined and tuned, a code library is created and code fragments in the library correspond to code needed to perform the function of the first set of instructions when executed. Instructions are then added to the second set of instructions such that, when executed, will cause the functionality of the first set of instructions to be achieved. | 11-12-2015 |
20150321643 | FIELD MEASUREMENT COMPENSATION - A system and method of locating a key are disclosed. The key is configured to communicate with a base station through a plurality of antennas that are coupled to the base station. The method includes turning off each of the plurality of antennas, turning on one of the plurality of antennas, measuring a first received signal strength, turning off the one of the plurality of antennas and measuring a second received signal strength. The key is determined to be located within a predefined area if the difference between the first received signal strength and the second received signal strength is above a preset threshold. | 11-12-2015 |
20150319545 | ELECTROMAGNETIC INDUCTION FIELD COMMUNICATION - Consistent with an example embodiment there is an electromagnetic induction field communication system, illustratively, for communicating on or around the body. Two transceivers (or receiver and transmitter) contain coils and capacitors suitable for generating an electromagnetic induction field surrounding the body and are capable of communicating therebetween. | 11-05-2015 |
20150318996 | SYSTEM AND METHOD FOR FILTERING DIGITAL CERTIFICATES - One example discloses a system for filtering digital certificates within a communications network, comprising: a first set of network-nodes, having a first attribute and a respective first set of digital certificates; a second set of network-nodes, having a second attribute and a respective second set of digital certificates; and a digital certificate authority, having a digital certificate validity list which includes the first and second sets of digital certificates; wherein the certificate authority filters the validity list based on the first attribute and transmits the filtered validity list to the first set of network nodes. Another example discloses a method for filtering digital certificates, comprising: maintaining a digital certificate validity list; identifying a set of network-nodes, having an attribute; filtering the validity list based on the attribute; and transmitting the filtered validity list to the set of network-nodes. | 11-05-2015 |
20150318932 | APPARATUS AND METHOD FOR WIRELESS BODY COMMUNICATION - An electromagnetic induction wireless transceiver including: a magnetic antenna; and a signal source configured to produce a communication signal used to drive the magnetic antenna to produce electromagnetic induction fields, wherein the transceiver when connected to a first location on a body is configured to communicate with another electromagnetic induction wireless transceiver connected to a second location on the body. | 11-05-2015 |
20150318896 | WIRELESS POWER DELIVERY AND DATA LINK - An electromagnetic induction wireless transceiver system including: a magnetic antenna; an electric antenna including first and second plates, the first plate being connectable to a body; and a power driver configured to produce a modulating signal used to drive the magnetic antenna and the electric antenna to produce electromagnetic induction fields, wherein the transceiver when connected to a body in a first location is configured to transmit power to a second electromagnetic induction wireless transceiver connected to a second location a distance from the first location, wherein the first and second locations are connected through magnetic and electric near-field coupling. | 11-05-2015 |
20150318782 | CAPACITANCE MULTIPLIER AND METHOD - Capacitance multiplier circuitry provides an increased equivalent capacitance, and may be implemented using a desirably small footprint. As may be implemented in accordance with one or more embodiments, a capacitor provides a first capacitance across first and second plates, and capacitance multiplier circuitry operates with the capacitor to provide a second equivalent capacitance that is a multiple of the first capacitance. The capacitance multiplier circuitry includes a first circuit path having a first resistor between the first plate and a common terminal, and a second circuit path having a switch and a second resistor between the second plate and the common terminal. An amplifier has differential inputs respectively corresponding to the first and second circuit paths and provides the second equivalent capacitance by controlling operation of the switch based upon the differential inputs and the respective resistances provided by the resistors in the first and second circuit paths. | 11-05-2015 |
20150318613 | BODY ANTENNA SYSTEM - An electromagnetic induction antenna including: a first inductor including windings; a second inductor including windings spaced apart from the first inductor; and an impedance connecting the first and second inductors; wherein the first and second inductor form a capacitor; wherein the capacitor is an electric field antenna, and wherein the inductor is a magnetic field antenna. | 11-05-2015 |
20150318603 | BODY COMMUNICATION ANTENNA - An electromagnetic induction wireless communication system including: a magnetic antenna; an electric antenna; a tuning capacitor coupled to the magnetic antenna configured to tune the magnetic antenna; a controller configured to control the operation of the communication system; a signal source coupled to the controller configured to produce a communication signal used to drive the magnetic antenna and the electric antenna; a voltage control unit coupled to the signal source configured to produce one of an amplitude difference, phase difference, and an amplitude and a phase difference between the communication signal used to drive the magnetic antenna and electric antenna. | 11-05-2015 |
20150312226 | METHOD FOR INCLUDING AN IMPLICIT INTEGRITY OR AUTHENTICITY CHECK INTO A WHITE-BOX IMPLEMENTATION - A method of performing a cryptographic operation using a cryptographic implementation in a cryptographic system, including: receiving, by the cryptographic system, an identifying string value; receiving, by the cryptographic system, an input message; performing, by the cryptographic system, a keyed cryptographic operation mapping the input message into an output message wherein the output message is the correct result when the indentifying string value equals a binding string value | 10-29-2015 |
20150312225 | SECURITY PATCH WITHOUT CHANGING THE KEY - A method of patching a cryptographic implementation without changing a key in a cryptographic system, including: sending a message from a first message set to the cryptographic implementation, wherein the first message uses a first portion of the cryptographic implementation; deciding to patch the cryptographic implementation; sending a second message from a second message set to the cryptographic implementation after deciding to patch the cryptographic implementation, wherein the second message use a second portion of the cryptographic implementation that is not used for any messages in the first message set. | 10-29-2015 |
20150312224 | IMPLEMENTING USE-DEPENDENT SECURITY SETTINGS IN A SINGLE WHITE-BOX IMPLEMENTATION - A method of enforcing security settings in a cryptographic system, including: receiving, by the cryptographic system, a first input message associated with a first security setting of a plurality of security settings; performing, by the cryptographic system, a keyed cryptographic operation mapping the first input message into a first output message, wherein the keyed cryptographic operation produces a correct output message when the cryptographic system is authorized for the first security setting, wherein each of the plurality of security settings has an associated set of input messages wherein the sets of input messages do not overlap. | 10-29-2015 |
20150312223 | REALIZING AUTHORIZATION VIA INCORRECT FUNCTIONAL BEHAVIOR OF A WHITE-BOX IMPLEMENTATION - A method of authorization in a cryptographic system that provides separate authorization for a plurality of different input message groups using a single cryptographic key, including: receiving, by the cryptographic system, a first input message from a first input message group; performing, by the cryptographic system, a keyed cryptographic operation mapping the first input message into a first output message, wherein the keyed cryptographic operation produces a correct output message when the cryptographic system is authorized for the first input message group, wherein the keyed cryptographic operation does not produce a correct output when the cryptographic system is not authorized for the first input message group, and wherein each of the plurality of input message groups has an associated set of input messages wherein the sets of input messages do not overlap. | 10-29-2015 |
20150312042 | INTERFACE COMPATIBLE APPROACH FOR GLUING WHITE-BOX IMPLEMENTATION TO SURROUNDING PROGRAM - A method of gluing a cryptographic implementation of a cryptographic function to a surrounding program in a cryptographic system, including: receiving, by the cryptographic system, an input message; receiving a computed value from the surrounding program; performing, by the cryptographic system, a keyed cryptographic operation mapping the input message into an output message using the computed value from the surrounding program, wherein the output message is a correct output message when the computed value has a correct value; and outputting the output message. | 10-29-2015 |
20150312039 | BEHAVIORAL FINGERPRINT IN A WHITE-BOX IMPLEMENTATION - A method of determining a fingerprint identification of a cryptographic implementation in a cryptographic system, including: receiving, by the cryptographic system, an input message that is a fingerprint identification message; performing, by the cryptographic system, a keyed cryptographic operation mapping the fingerprint identification message into an output message that includes a fingerprint identification; and outputting the output message. | 10-29-2015 |
20150311024 | ELECTRODE COATING FOR ELECTRON EMISSION DEVICES WITHIN CAVITIES - Embodiments of a method for forming a field emission diode for an electrostatic discharge device include forming a first electrode, a sacrificial layer, and a second electrode. The sacrificial layer separates the first and second electrodes. The method further includes forming a cavity between the first and second electrode by removing the sacrificial layer. The cavity separates the first and second electrodes. The method further includes depositing an electron emission material on at least one of the first and second electrodes through at least one access hole after formation of the first and second electrodes. The access hole is located remotely from a location of electron emission on the first and second electrode. | 10-29-2015 |
20150310193 | CONTROL FLOW FLATTENING FOR CODE OBFUSCATION WHERE THE NEXT BLOCK CALCULATION NEEDS RUN-TIME INFORMATION - A method of obscuring software code including a plurality of basic blocks wherein the basic blocks have an associated identifier (ID), including: determining, by a processor, for a first basic block first predecessor basic blocks, wherein first predecessor basic blocks jump to the first basic block and the first basic block jumps to a next basic block based upon a next basic block ID; producing, by the processor, a mask value based upon the IDs of first predecessor basic blocks, wherein the mask value identifies common bits of the IDs of the first predecessor basic blocks; and inserting, by the processor, an instruction in the first basic block to determine a next basic block ID based upon the mask value and an ID of one of the first predecessor basic blocks. | 10-29-2015 |
20150309860 | ADVANCED DAB FEC PROCESSING IN PACKET MODE UTILIZING TOKENS - In an embodiment, a method for performing forward error correction (FEC) on protected data packets is disclosed. The method involves creating a FEC table having columns for application data and columns for error-correction data (EC data). Then, a number of protected application data packets are received and placed in the FEC table. If an application data packet is received, then the application data from the packet is placed in the application data column. If an application data packet is not received, generated zeroes are placed in the application data column. Once the application data columns of the FEC table are full, EC data corresponding to the application data is received and placed in the EC data columns of the FEC table. The rows of the FEC table are then fed to the decoder for error correction. | 10-29-2015 |
20150303156 | SINGLE INLINE NO-LEAD SEMICONDUCTOR PACKAGE - Embodiments of a packaged semiconductor device with no leads are disclosed. One embodiment includes a semiconductor chip and a no leads package structure defining a boundary and having a bottom surface and includes three or more pads exposed at the bottom surface of the package structure. Each of the pads is located in a single inline row. | 10-22-2015 |
20150296330 | NEAR FIELD COMMUNICATION DEVICE - A near field communication (NFC) device for providing a communication path between a processing unit of the device and an external device is disclosed. A mobile device is also disclosed. An NFC integrated circuit (IC) is also disclosed. In an embodiment, an NFC IC includes a mobile host processor interface for communicating with a mobile host processor, a wireless interface for communicating with at least one of a contactless card and an external radio frequency (RF) reader, and a single wire protocol (SWP) interface for communicating with a secure element. In an embodiment, the NFC IC is configured to enable communications between the secure element and the mobile host processor by providing a channel for exchange of ISO 7816 commands between the mobile host processor and the secure element, wherein the ISO 7816 commands are carried over the SWP interface and the mobile host processor interface. | 10-15-2015 |
20150296291 | SMART PASSIVE SPEAKER DRIVE - A circuit embodied in a mobile device is disclosed. The circuit includes a headphone audio driver, a loudspeaker audio driver and a switch coupled to outputs of the headphone audio driver and the loudspeaker audio driver. The switch is configured to connect the output of the loudspeaker audio driver to an external speaker when an external speaker is connected to the mobile device. The external speaker may be detected using methods such as automatic accessory detection or impedance measurement or a user configuration or a use action. The circuit may also include an impedance detector to drive the switch based on an impedance measurement. A user interface is provided to enable a user of the mobile device to driver the switch based on user preferences. | 10-15-2015 |
20150295896 | METHOD AND APPARATUS FOR TRANSMITTING AN NFC APPLICATION VIA A SECURE CHANNEL INCLUDING A PROXY AND COMPUTING DEVICE - In a method for transmitting an NFC application, a secure channel is established by way of a proxy between a Trusted Service Manager and an NFC device via a computing device including the proxy and via an RFID reader being a part of the computing device. The NFC application received at the computing device from the Trusted Service Manager is channeled through the secure channel to the NFC device utilizing the proxy. | 10-15-2015 |
20150288213 | BATTERY CHARGING APPARATUS AND APPROACH - Various methods, apparatuses and systems are directed to battery-charging applications. As may be consistent with one or more embodiments discussed herein, a charging current for charging a battery is modulated, and the frequency of the modulated charging current is set based upon an impedance of the battery. Temperature of the battery is estimated based upon the impedance exhibited by the battery, while the battery is charged with the modulated charging current. In various implementations, the battery charging rate is controlled based on the estimated temperature. | 10-08-2015 |
20150285750 | Gas Sensor - In one example, a thermal conductivity gas sensor is disclosed. The sensor includes a sensing element and an amplification material coupled to the sensing element. The amplification material has a target gas dependent thermal diffusivity. The sensing element measures the thermal diffusivity of the amplification material to determine a target gas concentration. | 10-08-2015 |
20150280327 | RADAR ANTENNA SYSTEM - A device is described. The device includes a chip, a reflector, and an antenna. The reflector is disposed on a surface of the chip. The reflector is a metalized layer on the surface of the chip. | 10-01-2015 |
20150279803 | DIE INTERCONNECT - One example embodiment discloses a chip having a chip area, wherein the chip area includes: an overhang area; a rigid coupling area, having a set of rigid coupling points, located on one side of the overhang area; and a flexible coupling area, having a set of flexible coupling points, located on a side of the overhang area opposite to the a rigid coupling area. Another example embodiment discloses a method for fabricating a die interconnect, comprising: fabricating a rigid coupler area, having a set of rigid coupler points, within a chip having a chip area; defining an overhang area within the chip area and abutted to the rigid coupler area; and fabricating a flexible coupler area, having a set of flexible coupler points, within the chip area abutted to a side of the overhang area opposite to the rigid coupler area. | 10-01-2015 |
20150278674 | DUAL-INTERFACE IC CARD COMPONENTS AND METHOD FOR MANUFACTURING THE DUAL-INTERFACE IC CARD COMPONENTS - Dual-interface Integrated Circuit (IC) card components and methods for manufacturing the dual-interface IC card components are described. In an embodiment, a dual-interface IC card component includes a single-sided contact base structure, which includes a substrate with an electrical contact layer. On the single-sided contact base structure, one or more antenna contact leads are attached to the single-sided contact base structure to form a dual-interface contact structure by applying an adhesive material to partially cover an overlapping area of the at least one antenna contact and the substrate, which is a component of a dual-interface IC card. Other embodiments are also described. | 10-01-2015 |
20150278673 | DUAL INTERFACE IC CARD COMPONENTS AND METHOD FOR MANUFACTURING THE DUAL-INTERFACE IC CARD COMPONENTS - Dual-interface Integrated Circuit (IC) card components and methods for manufacturing the dual-interface IC card components are described. In an embodiment, a dual-interface IC card component includes a single-sided contact base structure, which includes a substrate with an electrical contact layer. On the single-sided contact base structure, one or more antenna contact leads are attached to the single-sided contact base structure to form a dual-interface contact structure, which is a component of a dual-interface IC card. Other embodiments are also described. | 10-01-2015 |
20150278489 | CONSTELLATION BASED DEVICE BINDING - A method of binding a software to a device is disclosed. Accordingly, during a setup of the software in the device, a unique identifier is derived from contents stored in the device and the derived unique identifier is encrypted. The derived unique identifier is then stored in a configuration of the software. During a next invocation of the software in the device, a new unique identifier is derived from the contents stored in the device. The newly derived unique identifier is then matched with the stored unique identifier. The execution of the software is terminated if the matching fails. | 10-01-2015 |
20150270951 | SECURITY MODULE FOR SECURE FUNCTION EXECUTION ON UNTRUSTED PLATFORM - A method of performing a secure function on data inputs by a security module, including: receiving an encrypted data value by the security module; decrypting the encrypted data value using a white-box decryption block cipher and encoding the decrypted data value, wherein the data value is invisible to an attacker; performing a function on the encoded data value and producing an encoded result of the function, wherein the data value and the result are invisible to the attacker; decoding the encoded result of the programmed function and then encrypting the result using a white-box encryption block cipher, wherein the result is invisible to the attacker. | 09-24-2015 |
20150270950 | SPLITTING S-BOXES IN A WHITE-BOX IMPLEMENTATION TO RESIST ATTACKS - A method of performing a keyed cryptographic operation mapping an input message to an output message, wherein the input message comprises m input data and the output message comprises m output data and wherein the cryptographic operation includes at least one round and the cryptographic operation specifies a substitution box for mapping input data into output data, including: transforming each of the m input data into n output data using n split substitution boxes, wherein the n split substitution boxes sum to the specified substitution box; and mixing and combining the m×n output data. | 09-24-2015 |
20150270949 | PROTECTING A WHITE-BOX IMPLEMENTATION AGAINST ATTACKS - A method of performing a keyed cryptographic operation mapping an input message to an output message, wherein the cryptographic operation includes at least one round including a non-linear mapping function configured to map input data to output data, including: splitting the input data into n split input data, wherein the splitting of the input data varies based upon the value of the input message; inputting each split input data into the non-linear mapping function to obtain n split output data, wherein a combination the n split output data indicates an output data, wherein the output data results when the input data is input to the non-linear mapping function. | 09-24-2015 |
20150263520 | POWER MANAGEMENT CIRCUIT AND A METHOD FOR OPERATING A POWER MANAGEMENT CIRCUIT - A power management circuit and a method for operating a power management circuit are described. In one embodiment, a power management circuit includes power switching modules. Power is supplied to each of the power switching modules by at least one of multiple power sources. Each of the power switching modules includes a latch circuit configured to have a definite state at power-up of a corresponding power source and a logic circuit configured to control power supplied from the corresponding power source in response to the definite state of the latch circuit, where the logic circuit includes a cross-coupled circuit. Other embodiments are also described. | 09-17-2015 |
20150263403 | TRANSMISSION LINE INTERCONNECT - One example discloses a transmission line interconnect, comprising: an antenna coupling surface; a transmission line coupling surface; and a dielectric molding compound electromagnetically coupling the antenna coupling surface to the transmission line coupling surface. Another example discloses a method of manufacture, for a transmission line interconnect, comprising: forming a dielectric molding compound; defining an antenna coupling surface on the dielectric molding compound; and defining a transmission line coupling surface on the dielectric molding compound whereby millimeter wave frequencies received at the antenna coupling surface are electromagnetically coupled to the transmission line coupling surface. | 09-17-2015 |
20150261458 | ONE-TIME PROGRAMMING IN REPROGRAMMABLE MEMORY - A portion of a reprogrammable storage device is used to implement permanent data storage. The storage device includes a plurality of electrically erasable memory elements and a controller. The plurality of electrically erasable memory elements are configured to store data. Each memory element is programmable a number of write cycles before reaching a write failure state. The controller is coupled to the plurality of memory elements. The controller includes a receiver and a write engine. The receiver receives an instruction to drive a selected memory element to the write failure state. The write engine repeatedly writes a data value, in a plurality of write operations, to the selected memory element until the write failure state of the selected memory element is established. | 09-17-2015 |
20150256362 | SPEED IMPROVEMENT FOR A DECISION FEEDBACK EQUALIZER - Circuits, apparatus, and methods are disclosed for decision feedback equalization. In one embodiment, an apparatus includes a plurality of time-interleaved slices for processing an input data stream. Each of the slices includes a sampler circuit, a multiplexer, and a latch. In each slice, the multiplexer and the sampler circuit provide sampled output data corresponding to one of a plurality of different versions of the input data stream at times designated uniquely for the slice, according to one or more selection signals. The selection signals are derived from a output of the multiplexer of at least one other of the time-interleaved slices. The latch provides a controlled output in response to the multiplexer and the sampler circuit, as a function of the designated unique times. | 09-10-2015 |
20150256063 | CHARGE PUMP CIRCUIT - A charge pump circuit is disclosed. The charge pump circuit includes a first circuit powered by a first supply voltage and configured to adjust a voltage of an output in response to first and second sets of control signals. The first circuit includes a set of transistors having respective switching voltages. A control circuit powered by a second voltage, less than the first supply voltage, is configured to generate the first and second sets of control signals. A voltage shifting circuit is configured to bias voltages of the first and second sets of control signals relative to the switching voltages. | 09-10-2015 |
20150254961 | TAMPER/DAMAGE DETECTION - Various aspects are directed to the detection of tampering, as may be applicable to retail goods and a variety of implementations. As may be consistent with one or more embodiments, an apparatus includes a loop conductor having first and second ends and contiguous conductive material extending in a loop between the ends. A detection circuit detects continuity of the loop conductor and characteristics of power that is provided to the loop conductor and is indicative of validity of the continuity detection. A communication circuit communicates a wireless signal indicative of the detected electrical characteristics, and an energy circuit powers the loop conductor, detection circuit and communication circuit via received wireless power. Other aspects are further directed to an interrogator that provides the wireless power and evaluates the wireless signal to detect tampering with the conductive loop and validity thereof. | 09-10-2015 |
20150254543 | SMART CARD - The invention proposes a smart card which comprises a digital signal processing receiver that can automatically identify the type of a smart card reader based on the error vector magnitude of signals received from the reader. The digital signal processing receiver is able to reconfigure itself at runtime in order to optimally minimize its power consumption in dependence on the type of reader it is communicating with. Furthermore, the invention proposes a new preamble structure that comprises a basic part and an optional additional part. | 09-10-2015 |
20150251665 | GPS BASED VEHICULAR CONTROL - One example embodiment discloses a GPS receiver having an antenna for receiving GPS signals and a cue generator generating a set of cues; a cue translator having: a cue extractor which selects a subset of the cues generated by the GPS receiver; a vehicle state input receiver receiving information from a vehicle controller indicating an operational state of a vehicle; and a vehicle action generator translating the cues and state into a set of vehicle action signals; and a vehicle controller coupled to the vehicle action generator and translating the vehicle action signals into vehicle commands which control the vehicle hardware or software systems. | 09-10-2015 |
20150241553 | FUNCTIONAL SAFETY MONITOR PIN - A radar data processing system is disclosed. The system includes a microcontroller and a data receiver-transmitter integrated circuit coupled to the microcontroller. The data receiver-transmitter integrated circuit includes a sensor and a dedicated error indicator pin. The data receiver-transmitter integrated circuit includes an inner safety monitor and the microcontroller includes an outer safety monitor. The inner safety monitor configured to receive and collate sensor data from the plurality of sensors and send, through the dedicated error indicator pin, a function warning signal to the outer safety monitor when the sensor data from the sensor is indicative of a functional irregularity. | 08-27-2015 |
20150241375 | ELECTROCHEMICAL SENSOR - An electrochemical sensor for sensing a target substance is disclosed. In one example, the sensor discloses an electrolyte matrix, wherein the matrix reposits an electrolyte; a working electrode coupled to the electrolyte matrix at a first location; a counter electrode coupled to the electrolyte matrix at a second location; an electrical circuit, coupled to the working electrode and the counter electrode, and capable of generating an output signal in response to an electrical current which flows between the working electrode and the counter electrode in response to a presence of the target substance. | 08-27-2015 |
20150236095 | Semiconductor Device - A semiconductor device and a method of making the same. The device includes a semiconductor substrate having an AlGaN layer on a GaN layer. The device also includes first contact and a second contact. The average thickness of the AlGaN layer varies between the first contact and the second contact, for modulating the density of an electron gas in the GaN layer between the first contact and the second contact. | 08-20-2015 |
20150236090 | TRANSISTOR WITH REDUCTED PARASITIC - Parasitic thyristor action may be mitigated in semiconductor devices by placement of minority carrier traps, illustratively in the base(s) of bipolar transistors or the well of a CMOS transistor pair. The minority carrier traps include adjacent n and p regions which may be connected by a conductor. | 08-20-2015 |
20150229782 | NOTIFICATION VOLUME ADJUSTMENT BASED ON DISTANCE FROM PAIRED DEVICE - System and method for adjusting a sound notification volume a mobile device are disclosed. Accordingly, the transmission signal strength is measured at the mobile device for a transmission link between the mobile device and a smart companion device that is paired with the mobile device. Subsequently, using a calibration data and the measured signal strength, a distance between the mobile device and the smart companion device is estimated. Then, using a configuration that is preset in the mobile device and the estimated distance, the sound notification volume of the mobile device is adjusted. | 08-13-2015 |
20150229271 | CURRENT DRIVEN FLOATING DRIVER CIRCUIT - A circuit for generating a modulated signal is disclosed. The circuit includes a constant current source. The circuit further includes a first switch that is coupled to the constant current source. The circuit also includes a second switch that is coupled to the first switch and a ground. The first switch and the second switch are coupled to a third switch. The third switch is coupled to a first integrated circuit pad. The first integrated circuit pad is defined to be used for coupling the third switch to a resonance circuit. | 08-13-2015 |
20150210288 | SYSTEM FOR USING SHORT TEXT MESSAGING FOR REMOTE DIAGNOSTIC - A system incorporated in a vehicle is disclosed. The system includes a communication system including a text messaging communication hardware to receive a message via a text messaging service. The message includes a command. The system also includes a microcontroller, coupled to the communication system and a machine control system, to execute the command through the machine control system. The machine control system is configured to control components of the vehicle. The microcontroller is configured to determine if a configuration allows execution of the received command and to return a response to the communication system. | 07-30-2015 |
20150207414 | SYSTEM AND METHOD FOR SUPPLYING A SYNCHRONOUS RECTIFIER DRIVER CIRCUIT - Methods for supplying a synchronous rectifier (SR) driver circuit and supply voltage generation circuits for a SR driver circuit are described. In one embodiment, a method for supplying a SR driver circuit involves receiving a converted voltage from a secondary winding of a transformer and generating a supply voltage for the SR driver circuit based on the converted voltage, where the supply voltage is higher than an output voltage of the transformer that is generated using the secondary winding. Other embodiments are also described. | 07-23-2015 |
20150194421 | SEMICONDUCTOR DIE, INTEGRATED CIRCUITS AND DRIVER CIRCUITS, AND METHODS OF MAUFACTURING THE SAME - A semiconductor die is disclosed comprising a lateral semiconductor device on an upper major surface of a substrate, the integrated circuit comprising a silicon layer over the substrate, a recess in the silicon layer, a layer of LOCOS silicon oxide within the recess and having a grown upper surface which is coplanar with the surface of an un-recessed portion of the silicon layer, wherein the silicon layer beneath the recess has a non-uniform lateral doping profile, and is comprised in a drift region of the lateral semiconductor device. A method of making such a die is also disclosed, as is an integrated circuit and a driver circuit. | 07-09-2015 |
20150189165 | GRAPHICAL USER INTERFACE FOR VIDEO RECORDING DEVICE - A computer-implemented method for assisting in recording video content on a video recording device. The method involves displaying a cross which comprises two orthogonal intersecting lines, displaying an indicator token, and changing the state of at least one of the cross and the indicator token in response to a control signal from the video recording device to provide visual notification to a user of the video recording device. | 07-02-2015 |
20150188713 | METHOD TO REDUCE THE LATENCY OF ECDSA SIGNATURE GENERATION USING PRECOMPUTATION - In order to reduce latency of elliptical curve digital signature generation a portion of the digital signature is pre-calculated before receipt of the message hash using an unmodified ECDSA computing engine. After the message hash is received, the digital signature is completed without using the ECDSA computing engine. Applications include generating digital signatures for the safety messages in Intelligent Transport Systems. | 07-02-2015 |
20150188712 | FLEXIBLE DATA AUTHENTICATION - Various exemplary embodiments relate to a method, device, and storage medium including: receiving an NDEF message by an NFC device including a payload and at least one of a digital signature and a reference to a digital signature; stripping data from the payload to produce a stripped payload; verifying the payload using the digital signature and the stripped payload; and conditionally interpreting the payload based on whether the payload is verified. Various embodiments are described wherein: the payload includes a URI including a fragment denoted by a pound character; and stripping data includes stripping the fragment from the URI. Various embodiments are described wherein the payload is verified, the fragment comprises fragment data, and interpreting the payload comprises: transmitting a message requesting a resource identified by the URI, wherein the request omits the fragment data; executing a received script to transmit the fragment data to a device. | 07-02-2015 |
20150186627 | SECURE SOFTWARE COMPNENTS ANTI-REVERSE-ENGINEERING BY TABLE INTERLEAVING - A method of securely implementing functions in a secure software application, including: determining, by a processor, two functions to be implemented by the secure software application; generating a first function lookup table; encrypting the first function lookup table; sorting the first function lookup table by encrypted operand; generating a second function lookup table; encrypting the second function lookup table; sorting the second function lookup table by encrypted operand; generating a flattened lookup table from a combination of the encrypted first and second function lookup tables; permutating the flattened table indices e.g. by use of public key cryptography encryption; and sorting the flattened table by the permutated flattened table indices. | 07-02-2015 |
20150186541 | NFC PRODUCT IDENTIFICATION AND ORDER REQUEST REDIRECTION - Various exemplary embodiments relate to a product assembly including: a product; and a code tag that carries a uniform resource identifier (URI) that includes an identifier for the product, wherein the code tag is configured to be read by a user device to read the URI, wherein the URI points to a lead distribution server and is configured to cause the lead distribution server to redirect the user device to a web page. Various embodiments relate to a method and related user device including: reading information from a code tag associated with a product, wherein the information includes a URI, wherein the URI points to a server and includes an identification of the product; transmitting an access request to the server based on the URI; and communicating, in response to transmitting the access request, with a device to place an order. | 07-02-2015 |
20150181422 | BINDING MOBILE DEVICE SECURE SOFTWARE COMPONENTS TO THE SIM - A mobile device, including: a wireless communication interface; a memory storing a secure software application; and a processor in communication with the memory, the processor being configured to: transmit an authentication challenge to the SIM card; receive an authentication response from the SIM card; verify the authentication response from the SIM card; and enable the secure software application when the authentication response from the SIM card is verified. | 06-25-2015 |
20150180687 | RF REPEATER CIRCUIT - RF repeater circuits may be used to regenerate an RF signal. A method and apparatus is described for regenerating a received RF signal the RF signal comprising a plurality of channels, each channel comprising a plurality of channel symbols, the method comprising producing a digitized RF signal from the received RF signal, extracting spectral information of each of the channels from the digitized RF signal, recovering one or more channel symbols from each of the plurality of channels, remodulating the channel symbols, and converting the remodulated channel symbols to an analog signal resulting in a regenerated RF signal. | 06-25-2015 |
20150180665 | OPTIMIZED HARDWARE ARCHITECTURE AND METHOD FOR ECC POINT DOUBLING USING JACOBIAN COORDINATES OVER SHORT WEIERSTRASS CURVES - An optimized hardware architecture and method introducing a simple arithmetic processor that allows efficient implementation of an Elliptical Curve Cryptography point doubling algorithm for Jacobian coordinates. The optimized architecture additionally reduces the required storage for intermediate values. | 06-25-2015 |
20150180664 | OPTIMIZED HARDWARD ARCHITECTURE AND METHOD FOR ECC POINT ADDITION USING MIXED AFFINE-JACOBIAN COORDINATES OVER SHORT WEIERSTRASS CURVES - An optimized hardware architecture and method introducing a simple arithmetic processor that allows efficient implementation of an Elliptic Curve Cryptography point addition algorithm for mixed Affine-Jacobian coordinates. The optimized architecture additionally reduces the required storage for intermediate values. | 06-25-2015 |
20150180469 | CIRCUIT AND METHOD FOR BODY BIASING - Various example embodiments are directed to methods and circuits for mitigation of on-resistance variation and signal attenuation in transistors due to body effects. In some embodiments, an apparatus includes a transistor configured to provide a data signal from a first one of the source or the drain to the other one of the source or the drain in response to a control signal provided to the gate. A body bias circuit is configured to bias the body of the transistor based on a voltage of the data signal to reduce variation in the on-resistance exhibited by the first transistor. In an embodiment, the apparatus includes body bias transistors and switches and the gates of the body bias transistors are connected to protect the body bias transistors from the effects of electrostatic discharge (ESD) events. | 06-25-2015 |
20150180464 | CIRCUIT AND METHOD FOR BODY BIASING - Various example embodiments are directed to methods and circuits for mitigation of on-resistance variation and signal attenuation in transistors due to body effects. In some embodiments, an apparatus includes a transistor configured to provide a data signal from a first one of the source or the drain to the other one of the source or the drain in response to a control signal provided to the gate. A body bias circuit is configured to bias the body of the transistor based on a voltage of the data signal to reduce variation in the on-resistance exhibited by the first transistor. As a result of the reduced variation in the on resistance, attenuation of the data signal is reduced. | 06-25-2015 |
20150180460 | HIGH SPEED SWITCHING - Switching circuits are implemented in a manner that facilitates fast switching, which can be effected while also maintaining relatively low power dissipation. As may be implemented in connection with one or more embodiments, an apparatus includes a transistor connected between an input port and an output port, and a gate that switches between on and off states. A charge storage circuit stores a charge, and a switching circuit operates by switching the transistor between the on and off states as follows. In a first charging mode, a voltage is coupled across the charge storage circuit and a charge is stored therein, while decoupling the transistor from the charge storage circuit. In a second discharge mode, the transistor is switched from the off state to the on state, while coupling the stored charge across the gate and one of the source and drain of the transistor. | 06-25-2015 |
20150180458 | METHOD AND SYSTEM FOR CONTROLLING A CHARGE PUMP - Embodiments of a method for controlling a charge pump and a control device for a charge pump are described. In one embodiment, a method for controlling a charge pump involves monitoring a power-on status of the charge pump, calculating a duty cycle of the charge pump within a time period based on the power-on status of the charge pump, and adjusting at least one of a clock frequency setting and a capacitance setting of the charge pump in based on the duty cycle of the charge pump. Other embodiments are also described. | 06-25-2015 |
20150178503 | OPTIMIZED HARDWARE ARCHITECTURE AND METHOD FOR ECC POINT DOUBLING USING JACOBIAN COORDINATES OVER SHORT WEIERSTRASS CURVES - An optimized hardware architecture and method introducing a simple arithmetic processor that allows efficient implementation of an Elliptical Curve Cryptography point doubling algorithm for Jacobian coordinates. The optimized architecture additionally reduces the required storage for intermediate values to one intermediate value. | 06-25-2015 |
20150162298 | PACKAGED SEMICONDUCTOR DEVICE WITH INTERIOR POLYGONAL PADS - Embodiments of a packaged semiconductor device with interior polygon pads are disclosed. One embodiment includes a semiconductor chip and a package structure defining a rectangular boundary and having a bottom surface that includes interior polygonal pads exposed at the bottom surface of the package structure and located on a centerline of the bottom surface of the package structure and edge polygonal pads exposed at the bottom surface of the package structure, located at an edge of the rectangular boundary, and including one edge polygonal pad in the vicinity of each corner of the rectangular boundary. The interior polygonal pads are configured such that a line running between at least one vertex of each of the interior polygonal pads is parallel to an edge of the rectangular boundary of the package structure. | 06-11-2015 |
20150156032 | COMPARATOR CIRCUIT - Various aspects are directed to communications, as may be implemented in an automotive network. An input transistor has a gate coupled to an input port and to a voltage-limiting circuit, connected between the gate and a power rail. The voltage-limiting circuit presents a voltage to the gate corresponding to a voltage on the input port and less than the supply voltage level, and clamps a gate-source voltage of the transistor. In a power-saving mode, current is blocked on the current path when the input port is at the supply or ground voltage levels. When the input port transitions away from the threshold voltage, the apparatus transitions to a wake-up mode in which current is no longer blocked in the current path and in which a wake-up signal is provided based on the voltage at the input port and a bias voltage. | 06-04-2015 |
20150153754 | POWER CONTROL - As may be implemented in accordance with one or more embodiments, an event manager provides control of a battery-powered internal power supply. The power supply has a control port that receives a control signal for activating and deactivating the internal power supply, and one or more output ports for providing a power signal. The event manager includes a plurality of system-event circuits that detect activity signals corresponding to a respective one of a plurality of system events. An event validation circuit, which is powered by the power signal, provides a validation signal that is based upon an activity signal detected by the event manager circuit and that indicates that the internal power supply should provide the power signal in a non-sleep power-operation mode. | 06-04-2015 |
20150145471 | BANK CARD PRESENCE DETECTION TO AVOID A WIRELESS CHARGER DEMAGNETIZING A BANK CARD - Various embodiments relate to a method, machine-readable medium, and a system for preventing demagnetization of a magnetically sensitive object comprising detecting, by a first identification sensor at a wireless charging transceiver, a foreign object; determining, by a processor using information from the first identification sensor, whether the foreign object is magnetically sensitive; and responsive to a determination that the foreign object is magnetically sensitive, preventing the wireless charging transceiver from operating. | 05-28-2015 |
20150143551 | ELECTRONIC TAMPER DETECTION - An apparatus, method and package for electronic tamper detection. In one example, an apparatus, device or package for electronic tamper detection includes: a first inductor positioned at a first distance from a first conductive surface; a first oscillator generating a first frequency in dependence upon the first inductor; and a comparator setting a tamper detected status if the generated first frequency is not within an error tolerance to a pre-stored first frequency. One example of a method for fabricating an electronic tamper detection apparatus, device, or package is also provided. | 05-21-2015 |
20150143141 | SHARED INTERRUPT MULTI-CORE ARCHITECTURE FOR LOW POWER APPLICATIONS - A multicore architecture is configured to exploit explicit task parallelism to save power by sharing interrupt sources that trigger independent tasks. | 05-21-2015 |
20150142653 | WIRELESS POWER SUPPLY TO ENABLE PAYMENT TRANSACTION - A method for completing a transaction at a terminal between a terminal and a mobile device including: initiating a transaction at the terminal; initiating communication with the mobile device; determining that the mobile device is without power; transmitting a wireless power signal to power the mobile device; sending a transaction authentication request message to the mobile device after transmitting the wireless power signal; receiving an authentication message from the mobile device; and completing the transaction after receiving the authentication message from the mobile device. | 05-21-2015 |
20150137942 | Security Token, Control System and Control Method - According to an aspect of the invention, a security token is conceived, in particular a smart card, comprising a tactile sensing user interface, wherein said tactile sensing user interface is adapted to capture a stream of authentication data corresponding to a sequence of positions of a finger engaging with said tactile sensing user interface and representing a user-specific credential for accessing at least one function of a controllable object, said security token being adapted to transmit said stream of authentication data to the controllable object in order to access said function. | 05-21-2015 |
20150137856 | INPUT CIRCUIT WITH MIRRORING - Various aspects are directed to providing an output/state based upon an input value. Consistent with one or more embodiments, an apparatus includes a bias circuit that is connected between power and common rails and includes first and second current paths that provide first and second reference currents. A current-mirroring circuit provides a first mirrored current in response to a voltage input transitioning in a first direction between voltage levels, and a second mirrored current in response to a voltage input transitioning in an opposite direction. A logic circuit operates in a first state based upon the first mirrored current and the first reference current, and operates in a second state based upon the second mirrored current and the second reference current. | 05-21-2015 |
20150137380 | ELECTRONIC DEVICE INCORPORATING A RANDOMIZED INTERCONNECTION LAYER - An electronic device incorporating a randomized interconnection layer. In one example, the device includes a randomized interconnection layer having a randomized conductive pattern formed by etching of a heterogeneous layer; and a sensing circuit, electrically coupled to the randomized interconnection layer to detect the randomized conductive pattern. In another example, a method of fabricating the device includes forming a set of electrodes proximate to a silicon substrate; depositing a heterogeneous layer of elements onto the substrate; etching the heterogeneous layer to form a randomized conductive pattern; and electrically coupling the electrodes to a sensing circuit and the randomized conductive pattern. | 05-21-2015 |
20150130677 | UHF-RFID ANTENNA FOR POINT OF SALES APPLICATION - A UHF-RFID antenna having a central segmented loop surrounded by passive dipole structures provides shaping of the electric and magnetic fields to reduce the number of false positive reads by a UHF-RFID reader at a point of sale. | 05-14-2015 |
20150123723 | REDUNDANT CLOCK TRANSISTION TOLERANT LATCH CIRCUIT - Embodiments of a latch circuit and a method of operating a latch circuit are described. In one embodiment, a latch circuit includes an input terminal configured to receive an input data signal, a switching unit configured to control application of the input data signal, a first inverter circuit connected to the switching unit, where the first inverter circuit includes a first cross-coupled pair of inverters, and a second inverter circuit connected to the first inverter circuit through the switching unit. The second inverter circuit includes a second cross-coupled pair of inverters and two transistor devices. Each inverter of the second cross-coupled pair of inverters is connected to a voltage rail through a corresponding transistor device. Each of the two transistor devices is connected to a node that is between the switching unit and the first inverter circuit or the second inverter circuit. Other embodiments are also described. | 05-07-2015 |
20150116081 | SYSTEM AND METHOD FOR AUTHENTICATING COMPONENTS OF A VEHICLE - System and method for authenticating components of a vehicle are described. In an embodiment, a method for authenticating components of a vehicle involves transmitting an interrogation signal to tags attached to the components of the vehicle from an authentication base station in response to a trigger event, comparing an authentication code received from each of responding tags with an authentication code key at the authentication base station to authenticate the responding tags, and transmitting a disengage signal to an immobilizer installed in the vehicle from the authentication base station to enable the vehicle if all the tags have been authenticated. Other embodiments are also described. | 04-30-2015 |
20150108848 | ANTENNA RESONANCE FREQUENCY CONTROL DRIVER - An antenna control circuit including: an H-bridge circuit including three half-bridge circuits; and a controller configured to control the H-bridge circuit; wherein a first half-bridge circuit and a second half-bridge circuit of the three half-bridge circuits are configured to electrically connect across a resonant antenna with a first resonant frequency and a second resonant frequency; wherein a third half-bridge circuit is configured to electrically connect to a first capacitance connected to the resonant antenna, wherein the controller is configured to control the third half-bridge circuit to switch the connection of the first capacitance to the resonant antenna to a first position that changes the resonant frequency of the resonant antenna to the first resonant frequency. | 04-23-2015 |
20150104931 | APPARATUS, DEVICE AND METHOD FOR WAFER DICING - An apparatus, device and method for wafer dicing is disclosed. In one example, the apparatus discloses: a wafer holding device having a first temperature; a die separation bar moveably coupled to the wafer holding device; and a cooling device coupled to the apparatus and having a second temperature which enables the die separation bar to fracture an attachment material in response to movement with respect to the wafer holding device. In another example, the method discloses: receiving a wafer having an attachment material applied to one side of the wafer; placing the wafer in a holding device having a first temperature; urging a die separation bar toward the wafer; and cooling the attachment material to a second temperature, which is lower than the first temperature, until the attachment material fractures in response to the urging. | 04-16-2015 |
20150100497 | ARTICLE AND METHOD FOR TRANSACTION IRREGULARITY DETECTION - Articles and methods for transaction irregularity detection are disclosed. In one example, the article discloses: a memory including a record of a last-reported security-device transaction with the security-device, and including a last-reported transaction counter value associated with the last-reported security-device transaction; a previous device identifier; a record of the previous security-device transaction with the security-device, and including the previous device identifier associated with the previous security-device transaction; a record of a current security-device transaction with the security-device, and including a currently-reported transaction counter value associated with the current security-device transaction; and a back-end device tagging the previous device with fraud if the current transaction counter value differs from the last-reported transaction counter value by other than an increment. In one example, the method discloses: a transaction irregularity detection process based on the article. | 04-09-2015 |
20150098163 | SENSOR CONTROLLED TRANSISTOR PROTECTION - A circuit for protecting a transistor is enclosed. The circuit includes a temperature sensing device coupled to the transistor and a tunable clamping circuit connected between transistor terminals, wherein the tunable clamping circuit is configured to provide an adjustable clamping voltage. A temperature controller coupled to the temperature sensing device and the tunable clamping circuit is also included. The temperature controller is configured to trigger a change in a clamping voltage of the tunable clamping circuit based on a feedback from the temperature sensing device. | 04-09-2015 |
20150097516 | SAWTOOTH OSCILLATOR AND APPARATUSES - Various aspects of the disclosure are directed to methods and apparatuses involving providing a clock signal. As consistent with one or more embodiments herein, a sawtooth waveform signal is generated in a manner that facilitates low power operation. In some implementations, the sawtooth waveform signal is generated using an oscillator that operates without necessarily employing R-C circuits and/or without rail-to-rail voltage supply, such as via a nonlinear oscillator. The sawtooth waveform signal is used to generate a trapezoidal waveform signal, and a clock signal is generated using the trapeziodal waveform signal. | 04-09-2015 |
20150095711 | CONTROLLER AREA NETWORK (CAN) DEVICE AND METHOD FOR EMULATING CLASSIC CAN ERROR MANAGEMENT - Embodiments of a device and method are disclosed. In an embodiment, a CAN device is disclosed. The CAN device includes a transmit data (TXD) input interface, a TXD output interface, a receive data (RXD) input interface, an RXD output interface and a traffic control system connected between the TXD input and output interfaces and between the RXD input and output interfaces. The traffic control system is configured to detect the presence of classic CAN traffic on the RXD input interface and if the presence of classic CAN traffic is detected on the RXD input interface, emulate an error management protocol of a classic CAN controller in response to signals received on the TXD input interface. | 04-02-2015 |
20150095532 | CONTROLLER AREA NETWORK (CAN) DEVICE AND METHOD FOR CONTROLLING CAN TRAFFIC - Embodiments of a device and method are disclosed. In an embodiment, a CAN device is disclosed. The CAN device includes a TXD input interface, a TXD output interface, an RXD input interface, an RXD output interface, and a traffic control system connected between the TXD input and output interfaces and between the RXD input and output interfaces. The traffic control system is configured to detect the presence of CAN Flexible Data-rate (FD) traffic on the RXD input interface and if the traffic control system detects the presence of CAN FD traffic on the RXD input interface, disconnect the RXD input interface from the RXD output interface and disconnect the TXD input interface from the TXD output interface. | 04-02-2015 |
20150092315 | TUNABLE MEMS CAPACITOR - A capacitive MEMS structure comprising first and second opposing capacitor electrode arrangements, wherein at least one of the electrode arrangements is movable, and a dielectric material located adjacent to the second electrode arrangement, wherein the second electrode arrangement is patterned such that it includes electrode areas and spaces adjacent to the electrode areas, and wherein the dielectric material extends at least partially in or over the spaces. | 04-02-2015 |
20150082023 | Aggregator Node, Method for Aggregating Data, and Computer Program Product - According to an aspect of the invention, an aggregator node is conceived for use in a network, wherein said aggregator node is arranged to aggregate encrypted data, and wherein said aggregator node comprises a secure element which is arranged to perform the aggregation of the encrypted data in a secure manner. | 03-19-2015 |
20150078562 | PLAYING AUDIO IN TRICK-MODES - A method of playing a digital audio signal at a speed different from that at which it was recorded. The method comprises: playing a first segment of the signal; skipping to a second segment that is not contiguous with the first segment; and playing the second segment, wherein at least one of the first and second segment is played at a rate different from the rate at which it was recorded. | 03-19-2015 |
20150077887 | STATIC CURRENT IN IO FOR ULTRA-LOW POWER APPLICATIONS - An input/output (IO) circuit including: an IO driver circuit; an electrostatic discharge (ESD) protection semiconductor switch with a first input configured to receive an ESD, a second input connected to an ESD rail, and a switch control input; an ESD trigger circuit connected to the switch control input, wherein the ESD trigger circuit is configured to produce a trigger signal to close the protection semiconductor switch when the ESD detection circuit detects an ESD; and a bias circuit configured to provide a back bias signal to an isolated well of the ESD protection semiconductor switch when IO circuit is in normal operation. | 03-19-2015 |
20150074631 | DATA ERROR SUSCEPTIBLE BIT IDENTIFICATION - As consistent with one or more embodiments, electronic circuitry is characterized to provide an indication of susceptibility of the circuitry to error. As consistent with one or more embodiments, bits corresponding to a circuit component of a circuit design are evaluated using a software program that characterizes a hardware description language representing the circuit components and their interconnectivity. A noise power value is calculated for each bit, and bits are identified as being susceptible to data error based upon the noise power value and a signal-to-noise (SNR) ratio reference value. A characterization of the circuit components (e.g., a quality factor) is provided based upon a number of bits susceptible to data errors. | 03-12-2015 |
20150072617 | WIRELESS POWER AND DATA APPARATUS, SYSTEM AND METHOD - Wireless data communication is implemented using respective carrier frequencies. As may be implemented in accordance with one or more embodiments and apparatuses herein, wireless communications are effected using a resonant circuit having a resonant frequency susceptible to detuning. Radio frequency power is transmitted to a remote transponder circuit, and wireless communications are effected with the remote transponder circuit via at least one of first and second different carrier frequencies, using the resonant circuit and the radio frequency power. The first and second carrier frequencies are respectively sufficiently proximate to the resonant frequency, such that signals communicated based on the resonant frequency can be acquired by demodulating based on the resonant frequency. One of the first and second carrier frequencies is selected based upon a signal sent from the transponder circuit. | 03-12-2015 |
20150071444 | SECURE WIRELESS CHARGING - A wireless charging apparatus and method utilizing a secure element is disclosed. Illustratively, a receiver containing a secure element securely communicates with a charging pad also equipped with a secure element. The communication can be used to establish the identity of the receiver and facilitate billing for the wireless charging. The charging pad may further communicate in a secure manner with a server to authenticate the identity and other information about the receiver before providing wireless charging. Direct communication between the receiver and server is also contemplated. | 03-12-2015 |
20150070804 | BIGFET ESD PROTECTION THAT IS ROBUST AGAINST THE FIRST PEAK OF A SYSTEM-LEVEL PULSE - Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, an ESD protection device includes a bigFET configured to conduct an ESD pulse during an ESD event. The bigFET includes a backgate terminal, a source terminal, and a current distributor connected to the backgate terminal and the source terminal and configured to homogeneously activate a parasitic bipolar junction transistor of the bigFET in response to a current that is generated in the bigFET during the ESD pulse. Other embodiments are also described. | 03-12-2015 |
20150069578 | COMBINATION GRINDING AFTER LASER (GAL) AND LASER ON-OFF FUNCTION TO INCREASE DIE STRENGTH - Consistent with an example embodiment, there is a method for preparing integrated circuit (IC) device die from a wafer substrate having a front-side with active devices and a back-side. The method comprises pre-grinding the backside of a wafer substrate to a thickness. The front-side of the wafer is mounted onto a protective foil. A laser is applied to the backside of the wafer, at first focus depth to define a secondary modification zone in saw lanes. To the backside of the wafer, a second laser process is applied, at a second focus depth shallower than that of the first focus depth, in the saw lanes to define a main modification zone, the secondary modification defined at a pre-determined location within active device boundaries, the active device boundaries defining an active device area. The backside of the wafer is ground down to a depth so as to remove the main modification zone. The IC device die are separated from one another by stretching the protective foil. | 03-12-2015 |
20150063517 | CLOCK SYNCHRONIZER FOR ALIGNING REMOTE DEVICES - Various aspects of the present disclosure are directed apparatuses and methods including a first phase locked loop (PLL) circuit and a second PLL circuit. The first PLL circuit receives a carrier signal that is transmitted over a communications channel from a non-synchronous device, and generates a PLL-PLL control signal. The second PLL circuit receives a stable reference-oscillation signal, and, in response to the PLL-PLL control signal indicating a frequency offset, adjusts a fractional divider ratio of the second PLL circuit. The first PLL circuit and the second PLL circuit are configured to produce an output frequency signal that is synchronous to the carrier signal. | 03-05-2015 |
20150052340 | TASK EXECUTION DETERMINISM IMPROVEMENT FOR AN EVENT-DRIVEN PROCESSOR - Embodiments of a method for operating an event-driven processor and an event-driven processor are described. In one embodiment, a method for operating an event-driven processor involves configuring a heartbeat timer of the event-driven processor and handling an event using the event-driven processor based on the heartbeat timer. Using a heartbeat timer built into the event-driven processor, the task execution determinism of the event-driven processor is improved and the power consumption of the event-driven processor is reduced. Other embodiments are also described. | 02-19-2015 |
20150049403 | BIAS-INSENSITIVE TRIGGER CIRCUIT FOR BIGFET ESD SUPPLY PROTECTION - Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, an ESD protection device for an integrated circuit (IC) device includes a bigFET configured to conduct an ESD current during an ESD event and a trigger device configured to trigger the bigFET during the ESD event. The trigger device includes a slew rate detector configured to detect the ESD event, a driver stage configured to drive the bigFET, and a keep-on latch configured to keep the driver stage turned on to drive a gate terminal of the bigFET with a driving voltage that is insensitive to a pre-bias on a drain terminal or a source terminal of the bigFET. Other embodiments are also described. | 02-19-2015 |
20150041862 | METHOD OF MANUFACTURING IC COMPRISING A BIPOLAR TRANSISTOR AND IC - Disclosed is a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate ( | 02-12-2015 |
20140380452 | SECURITY TOKEN AND TRANSACTION AUTHORIZATION SYSTEM - A security token is conceived, in particular a smart card, being adapted to support multi-factor user authentication, said security token comprising: a tactile sensing user interface being adapted to capture a stream of input data corresponding to a sequence of positions of a finger engaging with said tactile sensing user interface and representing a user-specific credential for authorizing a transaction; a conversion unit being adapted to convert said stream of input data into a machine-readable credential; a computation unit being adapted to compute a machine-readable authentication code based on the machine-readable credential; a contact-bound interface being adapted to transmit said machine-readable authentication code to a first transaction device; a contactless interface being adapted to transmit said machine-readable authentication code to a second transaction device. | 12-25-2014 |
20140375377 | THYRISTOR, A METHOD OF TRIGGERING A THYRISTOR, AND THYRISTOR CIRCUITS - A thyristor is disclosed comprising: a first region of a first conductivity type; a second region of a second conductivity type and adjoining the first region; a third region of the first conductivity type and adjoining the second region; a fourth region of the second conductivity type and comprising a first segment and a second segment separate from the first segment, the first segment and second segment each adjoining the third region; a first contact adjoining the first region; a second contact adjoining the first segment; and a trigger contact adjoining the second segment and separate from the second contact. | 12-25-2014 |
20140368270 | MARCHAND BALUN AND POWER AMPLIFIER USING THE SAME - A Marchand balun has a primary transmission line with a width smaller than the two secondary transmission lines. The two secondary transmission lines also have different widths and lengths. This arrangement provides an imbalance between the widths and lengths of the transmission lines. It has been found that this imbalance can enable improved amplitude unbalance and phase unbalance. | 12-18-2014 |
20140367815 | MANUFACTURING MAGNETIC SENSOR ELEMENTS MONOLITHICALLY INTEGRATED AT A SEMICONDUCTOR CHIP COMPRISING AN INTEGRATED CIRCUIT - A method is described for manufacturing a magnetic sensor module ( | 12-18-2014 |
20140361394 | Integrated Sensor Chip Package with Directional Light Sensor, Apparatus including such a package and method of manufacturing such an Integrated Sensor Chip package - Disclosed is an integrated sensor chip package comprising an integrated sensor chip enveloped in a packaging layer ( | 12-11-2014 |
20140359788 | PROCESSING SYSTEM - A processing system is disclosed. The system comprises: a processing unit; a memory adapted to store firmware code and application code for execution by the processor; and a memory access control unit adapted to control access of the processing unit to firmware code and application code stored in the memory. The memory access control unit is adapted to disable access to firmware code when access to application code is enabled, and to disable access to application code when access to firmware code is enabled. | 12-04-2014 |
20140350848 | Vehicle Positioning System - A vehicle positioning system ( | 11-27-2014 |
20140348276 | SYSTEM AND METHOD FOR OPERATING A FILTER FOR ECHO CANCELLATION - Systems and methods for operating a filter for echo cancellation are described. In one embodiment, a method for operating a filter for echo cancellation involves monitoring at least one of a filter coefficient of the filter and an echo cancellation error to generate a monitoring result and, in response to the monitoring result, adjusting at least one of delay elements and filter taps of the filter to vary an impulse response of the filter. Other embodiments are also described. | 11-27-2014 |
20140347231 | Vehicle Antenna - The invention provides an antenna which has two feed ports and two conductor areas. Where the two areas face each other, there is a set of interdigitated arms and slots. These define a shape with two open slots (one on each side) extending from the two feed points, and a central closed slot. | 11-27-2014 |
20140347135 | BIPOLAR TRANSISTORS WITH CONTROL OF ELECTRIC FIELD - The invention provides a bipolar transistor circuit and a method of controlling a bipolar transistor, in which the bipolar transistor has a gate terminal for controlling the electric field in a collector region of the transistor. The bias voltage applied to the gate terminal is controlled to achieve different transistor characteristics. | 11-27-2014 |
20140347133 | DOHERTY AMPLIFIER - A Doherty amplifier has different drain voltages applied to the power transistors of the main and peaking stages. The impedance inverter comprises at least one first series phase shifting element between the output of the main amplifier and the Doherty amplifier output and at least one second series phase shifting element between the output of the peaking amplifier and the Doherty amplifier output. This provides a wideband combiner. The combination of this wideband combiner and different drain drive levels provides an improved combination of efficiency and bandwidth. | 11-27-2014 |
20140347131 | SEMICONDUCTOR DEVICE AND CIRCUIT WITH DYNAMIC CONTROL OF ELECTRIC FIELD - A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit. | 11-27-2014 |
20140347115 | VOLTAGE LEVEL TRANSLATOR - A voltage level translator includes an inverter circuit configured to switch an output of the inverter circuit between a first voltage level and a second voltage level. The voltage level translator also includes a capacitor connected to the output of the inverter circuit. The voltage level translator also includes a load connected to the capacitor. The capacitance of the capacitor is approximately 10 times larger than a capacitance of the load. An output signal of the voltage level translator has at least one of a different voltage swing and a different voltage domain than an input signal to the inverter circuit. | 11-27-2014 |
20140347111 | SLEW RATE CONTROL FOR MULTIPLE VOLTAGE DOMAINS - A reference output device includes a low side selector configured to select a first voltage level as an output signal. The output signal is a reference voltage. The reference output device also includes a high side selector configured to select a second voltage level as the output signal. The reference output device also includes a slew rate control configured to switch the output signal between the first voltage level and the second voltage level at a constant slew rate. | 11-27-2014 |
20140347026 | CIRCUIT FOR VOLTAGE REGULATION - A voltage regulator circuit is provided that includes a pass circuit including a field effect transistor (FET) having a gate coupled to the output of a comparison circuit. The comparison circuit is configured to provide a signal to the pass circuit that is based on a comparison of a first input coupled to a reference voltage and a second input. The voltage regulator includes a feedback path configured and arranged to provide feedback from an output of the pass circuit to a second input of the comparison circuit. The voltage regulator also includes a current adjustment circuit configured and arranged to adjust current consumed by the comparison circuit based on a current passed by the pass circuit. | 11-27-2014 |
20140340195 | ELECTRONIC LOCK, LOCKING SYSTEM, METHOD OF OPERATING AN ELECTRONIC LOCK, COMPUTER PROGRAM PRODUCT - According to an aspect of the invention, an electronic lock is conceived, being adapted to harvest energy from a radio frequency (RF) connection established between a mobile device and said electronic lock, further being adapted to use the harvested energy for processing an authorization token received via said RF connection from the mobile device, and further being adapted to use the harvested energy for controlling an unlocking switch in dependence on a result of said processing. | 11-20-2014 |
20140340151 | Transconductance Amplifier - A transconductance amplifier comprises a set of amplifier stages. The last stage of the amplifier is split with a certain ratio whereby one part is used to deliver output current and other part to deliver feedback current to the input. | 11-20-2014 |
20140340147 | AMPLIFIER CIRCUIT AND AMPLIFICATION METHOD - A true ground amplifier circuit in which a voltage sensor senses the output voltage and generates a binary output which indicates whether the output is above or below a threshold. A variable gain feedback system generates a feedback signal for combination with the digital input, thereby to provide offset cancellation. The variable gain is reduced over time to provide offset cancellation during an initial period of time of operation of the amplifier circuit. This provides offset cancellation during a start-up period, for example. | 11-20-2014 |
20140338459 | Differential Pressure Sensor - A differential pressure sensor comprises a cavity having a base including a base electrode and a membrane suspended above the base which includes a membrane electrode, wherein the first membrane is sealed with the cavity defined beneath the first membrane. A first pressure input port is coupled to the space above the sealed first membrane. A capacitive read out system is used to measure the capacitance between the base electrode and membrane electrode. An interconnecting channel is between the cavity and a second pressure input port, so that the sensor is responsive to the differential pressure applied to opposite sides of the membrane by the two input ports. | 11-20-2014 |
20140337553 | METHOD AND SYSTEM FOR INTERRUPT SIGNALING IN AN INTER-INTEGRATED CIRCUIT (I2C) BUS SYSTEM - Embodiments of a method and system are disclosed. One embodiment of a method for signaling an interrupt in an I2C system that includes a master I2C device and at least one slave I2C device that are connected by an SDA line and an SCL line is disclosed. The method involves, at the slave I2C device, pulling the SDA line low to signal an interrupt and at the slave I2C device, releasing the SDA line in response to either the SCL line having been pulled low or the expiration of a predetermined time period, whichever occurs first. In an embodiment, the predetermined time period is 1 ms. | 11-13-2014 |
20140335806 | MANAGING WIRELESSLY TRANSMITTED USE-DATA IN A WIRELESS DATA TRANSMISSION ENVIRONMENT - A method of managing wirelessly transmitted use-data in a wireless data transmission environment, the method comprising: Receiving the wirelessly transmitted use-data by a first receiver and estimating a reception quality of the use-data received by the first receiver by applying a quality criterion. In case the reception quality meets the quality criterion, the method moreover comprises using a second receiver for background scanning the wireless data transmission environment, and in case the reception quality does not meet the quality criterion, the method moreover comprises using the second receiver additionally for reception of the use-data, thus providing both receivers for a diversity reception of the use-data. | 11-13-2014 |
20140335784 | NFC Architecture - Disclosed is an integrated circuit, system or architecture suitable for NFC functionality and including an NFC companion block connectible to a power source and capable to providing a non-continuous power boost to NFC signals, inter alia, thereby facilitating use of a broader range of antennas, multiple antennas, and thereby providing greater | 11-13-2014 |
20140334647 | Dual Bridge Amplifier Configuration - An amplifier has a dual bridge design with two bridge amplifiers. A mode switch enables them to be configured in a series amplification mode. The switching of the mode switch is dynamic and enables re-use of signal current thereby improving overall system efficiency. A delay to the mode switch closure is provided in the event of clipping of one of the amplifier outputs. This prevents large cross currents from flowing. | 11-13-2014 |
20140333462 | Sigma-Delta Modulator - A sigma-delta modulator ( | 11-13-2014 |
20140333385 | DUAL-BAND SEMICONDUCTOR RF AMPLIFIER DEVICE - There is described a dual-band semiconductor RF amplifier device. The device comprises (a) a transistor ( | 11-13-2014 |
20140330996 | DEVICES AND METHODS FOR AN ENHANCED DRIVER MODE FOR A SHARED BUS - A device includes a transmission circuit that is configured and arranged to transmit data in accordance with a signal bus protocol that uses passive bias to set a signal bus to a recessive value in the absence of an actively-driven signal value. The transmission circuit includes a first driver circuit that is configured and arranged to actively drive the signal bus to a dominant value that is different from the recessive value. The transmission circuit also includes a second driver circuit that is configured and arranged to actively drive the signal bus to the recessive value. A control circuit is configured and arranged to disable the second driver circuit in response to the device operating in a first data transmission mode, and to enable the second driver circuit in response to the device entering a second transmission mode. | 11-06-2014 |
20140327475 | POWER ARBITRATION METHOD AND APPARATUS HAVING A CONTROL LOGIC CIRCUIT FOR ASSESSING AND SELECTING POWER SUPPLIES - A power selector for switching power supplies is implemented using a variety of methods and devices. According to an example embodiment of the present disclosure, an arrangement provides power to a circuit by selecting between a first supply and a second supply. The first power circuit provides a regulated level of power to the integrated circuit (IC) having an operating power level specified as a circuit operating level for providing power to the IC. The second power circuit provides power to the IC. A power-signal arbitration circuit for assessing V | 11-06-2014 |
20140327110 | METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR, BIPOLAR TRANSISTOR AND INTEGRATED CIRCUIT - Consistent with an example embodiment, a bipolar transistor comprises an emitter region vertically separated from a collector region in a substrate by a base region. The bipolar transistor further comprises a field plate electrically connected to the emitter region; the field plate extends from the emitter region along the base region into the collector region and the field plate is laterally electrically insulated from the base region and the collector region by a spacer. The spacer comprises an electrically isolating material that includes a silicon nitride layer and is vertically electrically isolated from the substrate by a further electrically isolating material. | 11-06-2014 |
20140323350 | ELECTRONIC LATERAL FLOW TEST ARRANGEMENT AND METHOD - A lateral test flow arrangement for a test molecule is disclosed, comprising: a test strip for transporting an analyte away from a sampling region and towards an absorbing region, the test strip having therein and remote from the sampling region, a test region for functionalization with a molecule which binds to the test molecule or to a conjugate of the test molecule; a sensing test capacitor having electrodes extending across the test strip at least partially aligned with the test region and being physically isolated therefrom; a reference test capacitor having electrodes extending across the test strip and being physically isolated therefrom; and an electronic circuit configured to measure a time-dependant capacitance difference between the sensing test capacitor and the reference test capacitor. A method for carrying out that lateral flow tests is also disclosed, as are test systems and in particular pregnancy test systems | 10-30-2014 |
20140320204 | ADJUSTABLE MOS RESISTOR - A variety of circuits, methods and devices are implemented for providing an adjustable resistance. According to one such implementation an adjustable resistive device includes a metal-oxide semiconductor (MOS) transistor having a gate, a drain, a source, and a body. First circuitry controls a resistance from drain to source by applying a gate voltage that is a function of a variable control input. Second circuitry adjusts a voltage at the body according to a drain voltage and a source voltage, whereby the resistance from drain to source is substantially linear for a given value of the variable control input and over a voltage range. | 10-30-2014 |
20140320197 | GATE DRIVER CIRCUIT - In High Voltage CMOS technologies the supply voltage is typically higher than the maximum allowed gate voltage. In a switching output stage of amplifiers such class-D amplifiers and DC-DC converters the gates of the power field effect transistors need to be charged quickly. This requires a gate driver that is capable of delivering large currents without exceeding the maximum allowed voltage on the gate of the power field effect transistors. | 10-30-2014 |
20140320096 | Voltage Generator - The disclosure relates to a voltage generator for providing an output voltage in accordance with a received target signal, the voltage generator comprising: a resonant converter configured to receive an input voltage, the resonant converter comprising: a first switch; a second switch connected in series with the first switch between the input voltage and ground (GND); a resonant tank associated with the second switch; an output capacitor coupled to the resonant tank and configured to provide an output voltage; and a rectifier configured to allow charge to flow in a single direction between the resonant tank and the output capacitor; and a controller configured to receive the target signal and to set an operating parameter of the resonant converter in accordance with a difference between an output value which is related to the output voltage and the target signal. | 10-30-2014 |
20140318854 | ELECTRICAL COMPONENT PACKAGING - The invention provides an air cavity package for a component. The package has a connection lead structure in which the or each connection lead has a connection zone within the package for receiving a wire connector. A region of no connection lead material is provided directly between the connection zone and the neighbouring outer edge of the cavity. This provides a trap for flowing interconnect material. | 10-30-2014 |
20140317433 | CLOCK CONTROL CIRCUIT AND METHOD - This invention provides a clock control circuit, which can be added to any pipeline-processor to solve timing problems arising from variations due to process outcome and environmental conditions. Critical instructions are detected (instructions that exercise critical paths) in conjunction with environmental sensing (such as process, temperature and voltage). This information is used to control cycle stealing. | 10-23-2014 |
20140315485 | SECURE NEAR FIELD COMMUNICATION SOLUTIONS AND CIRCUITS - A device includes a near field communication (NFC) circuit ( | 10-23-2014 |
20140312965 | VARIABLE ADMITTANCE CIRCUIT - A programmable variable admittance circuit may be used in a programmable filter or a variable gain amplifier in a number of different applications including tuners and other RF receiver circuits. A variable admittance circuit and operation is described including a number of switchable admittance elements arranged in parallel branches. The variable admittance circuit requires fewer transitions to change between successive admittance values than a binary weighted circuit and fewer branches for implementation then a thermometry admittance circuit. | 10-23-2014 |
20140312963 | SWITCHABLE CURRENT SOURCE CIRCUIT AND METHOD - a switchable current source in which a reference voltage value to be used in driving the gate of an output transistor is sampled and stored. The reference voltage is derived using a reference current source which feeds a current sensing transistor. The current sensing transistor is turned off when the output transistor is turned off, so that the reference current source then does not consume power. A large reference current Iref can then be used for a short time. | 10-23-2014 |
20140312787 | DIMMABLE LED LIGHTING CIRCUITS, CONTROLLERS THEREFOR AND A METHOD OF CONTROLLING A DIMMABLE LED LIGHTING CIRCUIT - Controllers ( | 10-23-2014 |
20140312356 | Semiconductor Device - A semiconductor device and a method of making the same. The device includes a semiconductor substrate. The device also includes a bipolar transistor on the semiconductor substrate. The bipolar transistor includes an emitter. The bipolar transistor also includes a base located above the emitter. The bipolar transistor further includes a laterally extending collector located above the base. The collector includes a portion that extends past an edge of the base. | 10-23-2014 |
20140312205 | MOS-transistor structure as light sensor - Described is an arrangement for registering light, comprising: a MOS-transistor structure ( | 10-23-2014 |
20140310436 | METHOD AND SYSTEM FOR SINGLE-LINE INTER-INTEGRATED CIRCUIT (I2C) BUS - Embodiments of a system and method are disclosed. One embodiment is an I2C compatible device. The I2C compatible device includes an SDA interface for connection to an SDA line and a single-line I2C module configured to transmit a sync word from the SDA interface over the SDA line and following the sync word, to transmit I2C data from the SDA interface over the SDA line such that digital data is communicated via a single line. In an embodiment, the sync word is a sync byte+NACK. | 10-16-2014 |
20140306232 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD - Disclosed is a semiconductor device comprising at least one active layer ( | 10-16-2014 |
20140300410 | CASCODED SEMICONDUCTOR DEVICES - The invention provides a cascode transistor circuit with a depletion mode transistor and a switching device. A gate bias circuit is connected between the gate of the depletion mode transistor and the low power line. The gate bias circuit is adapted to compensate the forward voltage of a diode function of the switching device. The depletion mode transistor and the gate bias circuit are formed as part of an integrated circuit. | 10-09-2014 |
20140300289 | METHOD AND CIRCUIT FOR DRIVING AN LED LOAD WITH PHASE-CUT DIMMERS - Embodiments of a dimmable driver circuit for a light-emitting diode (LED) load and a method for driving an LED load are described. In one embodiment, a dimmable driver circuit for an LED load includes an alternating current (AC)-direct current (DC) rectifier configured to convert an AC input voltage into a DC voltage, a damper and filter circuit configured to provide a latching current to a phase-cut dimmer and to suppress an inrush current caused by phase-cut dimming, and to filter electromagnetic interference (EMI) noise from the DC voltage, and a switching converter circuit connected to the damper and filter circuit and configured to operate in a boundary conduction mode (BCM) with a constant on-time to generate DC power for the LED load in response to the DC voltage. Other embodiments are also described. | 10-09-2014 |
20140295756 | NFC DEVICE FOR CONTACTLESS COMMUNICATION - A Near Field Communication (NFC) device for contactless communication includes a transmitter being adapted to generate an electromagnetic carrier signal and to modulate the carrier signal according to transmitting data, an antenna having an inductor, which antenna is connected to and driven by the transmitter with the modulated carrier signal, and wherein connection points of the antenna are further connected to inputs of switches, the outputs of these switches being switchable between ground potential and inputs of a rectifier, the outputs of the rectifier being fed to power supply rails of the NFC device. | 10-02-2014 |
20140292287 | CASCODE SEMICONDUCTOR DEVICE - A semiconductor device, comprising first and second field effect transistors arranged in a cascode configuration: wherein the first field effect transistor is a depletion mode transistor; and wherein the second field effect transistor comprises a first source to gate capacitance and a second additional source to gate capacitance connected in parallel to the first source to gate capacitance. A power factor correction (PFC) circuit comprising the semiconductor device. A power supply comprising the PFC circuit. | 10-02-2014 |
20140291392 | DIGITAL WALLET BRIDGE - A smartcard communicating simultaneously with a smart phone and a point of sale, thereby allowing the smartcard to act as a bridge between the point of sale and the smart phone. The smart card is typically powered by the point of sale and typically communicates with the smart phone using BLUETOOTH Low Energy (BLE). | 10-02-2014 |
20140289845 | Security Token, Data Processing System and Method of Processing Data - According to an aspect of the invention, a security token is conceived, in particular a smart card, comprising a tactile sensing user interface, wherein said tactile sensing user interface is adapted to capture a stream of position data corresponding to a sequence of positions of a finger engaging with said tactile sensing user interface and representing a stream of input data for a data processing device, said security token being adapted to transmit said stream of position data to a host system for further processing. | 09-25-2014 |
20140289844 | Smartcard, Smartcard System and Method for Configuring a Smartcard - According to an aspect of the invention, a smartcard is conceived that comprises at least two pre-installed applications and an application user interface selector, wherein said application user interface selector is arranged to select and configure a specific authentication user interface corresponding to a specific one of the pre-installed applications in dependence on encoded information received from a host application. | 09-25-2014 |
20140289565 | Process and System for Verifying Computer Program on a Smart Card - According to an aspect of the invention, a process for verifying a computer program on a smart card is conceived, the process comprising: identifying, within said computer program, one or more instruction sequences that have a single start point and one or more end points in the program flow; identifying, in each instruction sequence, one or more basic blocks that have a single start point and a single end point in the program flow; and verifying the instruction sequences by verifying each basic block identified in said instruction sequences. | 09-25-2014 |
20140285098 | MULTI-CHANNEL LED DRIVER ARRANGEMENTS - LED driver arrangements are disclosed comprising: an input; a plurality of switched mode boost converters, each connected to the input; and a plurality of outputs, each output having a different voltage and being for driving at least one LED string; wherein each of the plurality of switched mode boost converters is configurable to output of any one of the plurality of outputs. Controllers for such arrangements are also disclosed. | 09-25-2014 |
20140269075 | 2T AND FLASH MEMORY ARRAY - Flash memory arrays are described. In one embodiment, a flash memory array includes memory sectors of Two-Transistor (2T) AND memory cells. Within each of the memory sectors, a row of sector selection transistors is configured such that writing data onto a memory column within the memory sector is controlled by applying a voltage to a bit line, independent from the row of sector selection transistors. Other embodiments are also described. | 09-18-2014 |
20140268445 | CROSS TALK MITIGATION - Cross-talk is mitigated in a switching circuit. In accordance with one or more embodiments, an apparatus includes a multi-pin connector having signal-carrying electrodes that communicate with a device external to the apparatus, and respective field-effect switches that couple the signal-carrying electrodes to respective communication channels in the apparatus. The switches include a first field-effect semiconductor switch having a gate electrode adjacent a channel region that connects electrodes (e.g., source and drain regions) when a threshold switching voltage is applied to the gate, in which the electrodes are connected between one of the signal-carrying electrodes and a first channel coupled to an electrostatic discharge (ESD) circuit. A bias circuit mitigates cross-talk between the communication channels by biasing the channel region of the first field-effect semiconductor switch (in an off state) to boost the threshold switching voltage over a threshold discharge voltage of the ESD circuit. | 09-18-2014 |
20140266611 | CLOCK SYNCHRONIZATION IN AN RFID EQUIPPED DEVICE - Embodiments of a method for clock synchronization in a radio frequency identification (RFID) equipped device, an RFID equipped device, and a hand-held communications device are described. In one embodiment, a method for clock synchronization in an RFID equipped device involves measuring a difference between a field clock frequency generated from an external clock and an internal clock frequency generated from an internal clock and generating outgoing bits in the RFID equipped device in response to the measured difference. Generating the outgoing bits involves adjusting the bit length of at least one of the outgoing bits in response to the measured difference. Other embodiments are also described. | 09-18-2014 |
20140265887 | VOLTAGE TO CURRENT ARCHITECTURE TO IMPROVE PWM PERFORMANCE OF OUTPUT DRIVERS - Various aspects of the present disclosure include a controlled current path having a load that draws current from the controlled current path. In response to a modulating voltage signal, current is controlled through the load which causes a transistor circuit, including a transistor, to switch between two current modes. Switching will subject the transistor to voltage stresses due to current in the controlled current path spiking towards a breakdown threshold of the transistor. In response to a first aspect of the modulating voltage signal and in one of the current modes, the current in the controlled current path is directed through the first current branch. In response to a second aspect of the modulating voltage signal and in the other current mode, the current in the controlled current path is diverted from the first current branch to a second current branch. | 09-18-2014 |
20140262781 | PH SENSOR AND MANUFACTURING METHOD - Disclosed is a pH sensor comprising a carrier ( | 09-18-2014 |
20140258686 | INTEGRATED CIRCUIT, ELECTRONIC DEVICE AND INSTRUCTION SCHEDULING METHOD - An integrated circuit comprising a set of data processing units including a first data processing unit and at least one second data processing unit operable at variable frequencies is disclosed. The integrated circuit further includes an instruction scheduler adapted to evaluate data dependencies between individual instructions in a received plurality of instructions and assign the instructions to the first data processing unit and the at least one second data processing unit for parallel execution in accordance with said data dependencies. The integrated circuit is operable in a first power mode and a second power mode. The second power mode is a reduced power mode compared to the first power mode and is adapted to adjust the operating frequency of the first data processing unit and the at least one second data processing unit in the second power mode as a function of the evaluated data dependencies. | 09-11-2014 |
20140256252 | Near-Field Communications and Routing - Near-field communications (NFC) with NFC reader devices are facilitated. In accordance with one or more embodiments, an apparatus includes a NFC circuit that wirelessly communicates with different types of local NFC readers using an NFC protocol, a host circuit having one or more modules that communicate with one of the types of local NFC readers via the NFC circuit, and second (e.g., secure) modules that respectively communicate with a specific one of the different types of local NFC readers, also via the NFC circuit, using secure data stored within the second module. A routing circuit is responsive to an NFC communication received from a specific one of the NFC readers, by identifying one of the first and second modules that communicates with the specific one of the NFC readers, and routing NFC communications between the specific one of the NFC readers and the identified one of the modules. | 09-11-2014 |
20140247720 | SIGNAL PATH ISOLATION FOR CONDUCTIVE CIRCUIT PATHS AND MULTIPURPOSE INTERFACES - A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths. | 09-04-2014 |
20140247029 | BOOST CONVERTER - A boost converter for converting between an input voltage and an output voltage is disclosed. The boost converter includes an inductor connected to the input voltage a switching arrangement for controlling the switching of the inductor current to an output load at the output voltage and a controller for controlling the switching arrangement to provide duty cycle control. The duty cycle control switching takes place when the inductor current reaches a peak current level which varies over time with a peak current level function. The peak current level function includes the combination of a target peak value derived from a target average inductor current and a slope compensation function which periodically varies with a period corresponding to the converter switching period. | 09-04-2014 |
20140245406 | Method for Personalizing a Secure Element, Method for Enabling a Service, Secure Element and Computer Program Product - According to an aspect of the invention, a method for personalizing a secure element for a mobile device is conceived, wherein an application is stored in the secure element and wherein the application is pre-provisioned by loading secure credentials into the application without tying said secure credentials to a specific user of the secure element. | 08-28-2014 |
20140243032 | Site Scan for Mobile Base Stations - A method of determining interconnections between at least two components in a base station. The at least two components connected to each other and any further components by one or more ports and the method comprising the steps of; in response to receipt of an interrogation message at a port of one of the components, replying to said interrogation message with a response message, said response message including identification information of said component in receipt of the interrogation message. | 08-28-2014 |
20140241463 | PHASED ARRAY ANTENNA AND ASSOCIATED METHODS - A phased array transmitter is disclosed comprising a vector modulator, a true time delay block coupled to the vector modulator, a local oscillator phase shifter and RF-converter block coupled to the true time delay block, and an antenna. The vector modulator applies vector modulation to a baseband signal and provides an intermediate frequency signal to the true time delay block. The true time delay block applies a true time delay to the intermediate frequency signal and provides a delayed intermediate frequency signal to the local oscillator phase shifter and RF-converter block. The local oscillator phase shifter and RF-converter block multiplies the delayed intermediate frequency signal by a local oscillator signal and applies a phase shift to the delayed intermediate frequency signal to provide a radio frequency signal to the antenna for onwards transmission. | 08-28-2014 |
20140240157 | ANALOGUE TO DIGITAL CONVERTER - An Analogue to Digital Converter (ADC) having a Gated Ring Voltage Controlled Oscillator, GRVCO, to generate a phase signal according to an input voltage; and a quantization circuit to generate a quantized phase output signal according. The GRVCO operates in either a first or second mode of operation according to a gating control signal. In the first mode of operation, the GRVCO operates in a VCO mode with gating disabled. In the second mode of operation, the GRVCO operates in a GRVCO mode wherein gating is enabled or disabled according to a gating signal. | 08-28-2014 |
20140239822 | Lighting Control Method, Computer Program Product and Lighting Control System - According to an aspect of the invention, a lighting control method is conceived for controlling the illumination of a working area, wherein an RFID-enabled light sensor attached to said working area measures incident light on the working area, and wherein an RFID-enabled luminary periodically reads the measured incident light from said RFID-enabled light sensor and adapts its light level in dependence on the measured incident light, such that a predefined illumination level on the working area is maintained. | 08-28-2014 |
20140239471 | IC PACKAGE WITH STAINLESS STEEL LEADFRAME - Various aspects of the disclosure are directed to integrated circuit (IC) die leadframe packages. In accordance with one or more embodiments, a stainless steel leadframe apparatus has a polymer-based layer that adheres to both stainless steel and IC die encapsulation, with the stainless steel conducting signals/data between respective surfaces for communicating with the packaged IC die. In some embodiments, the apparatus includes the IC die adhered to the polymer-based layer via an adhesive, wire bonds coupled to the stainless steel leadframe for passing the signals/data, and an encapsulation epoxy that encapsulates the IC die and wire bonds. | 08-28-2014 |