# Patent application title: MINIMIZING MAGNETIC INTERFERENCE IN A VARIABLE RELUCTANCE RESOLVER

##
Inventors:
Cheon Soo Park (Seoul, KR)

IPC8 Class: AH03M148FI

USPC Class:
341116

Class name: Phase or time of phase change synchro or resolver signal analog resolver or synchro signal to digital signal

Publication date: 2011-03-24

Patent application number: 20110068960

## Abstract:

A resolver apparatus and method are provided. The apparatus comprises a
source generation unit for generating a uni-phase source signal to excite
a resolver, wherein said source generation unit comprises a low
distortion oscillator, a variable phase shifter, and a capacitive
resolver driving network; and a signal output unit for generating a
two-phase output signal, wherein said signal output unit comprises the
resolver, a signal detector and level adjuster, an angular position
measurement unit, and an angular position compensation unit. The method
comprises generating a source signal to excite a resolver; transmitting
the source signal through a variable phase shifter; transmitting the
source signal through at least one capacitive passive element serially
connected to each coil winding of the resolver; outputting a displacement
signal generated by the resolver to a resolver-to-digital converter; and
converting said displacement signal into a digital position using the
resolver-to-digital converter.## Claims:

**1.**A method for minimizing magnetic interference in a resolver, the method comprising:generating a uni-phase source signal to excite a variable reluctance (VR) resolver,wherein the source signal is transmitted through at least one capacitive passive element serially connected to each coil winding of the VR resolver,wherein a two-phase displacement signal generated by the VR resolver is outputted to a resolver-to-digital converter, andwherein the displacement signal is converted into a digital position using the resolver-to-digital converter.

**2.**The method of claim 1, wherein amplitude and phase of the source signal is controlled by connecting at least one resistive passive element in parallel with said capacitive passive element.

**3.**The method of claim 1, wherein the source signal is phase shifted using a variable phase shifter.

**4.**An apparatus for minimizing magnetic interference in a resolver, the apparatus comprising:a source generation unit for generating a uni-phase source signal to excite a variable reluctance (VR) resolver, said source generation unit comprising a low distortion oscillator, a variable phase shifter, and a capacitive resolver driving network comprising at least one capacitive passive element connected to each coil winding of the VR resolver; anda signal output unit for generating a two-phase output signal, said signal output unit comprising the VR resolver, a signal detector and level adjuster, an angular position measurement unit, and an angular position compensation unit.

**5.**The apparatus of claim 4, wherein at least one resistive passive element is connected in parallel with said capacitive passive element in order to reduce angle displacement measurement error by controlling amplitude and phase of the source signal.

**6.**The apparatus of claim 4, wherein the capacitive passive element is serially connected to each coil winding of the VR resolver.

**7.**The apparatus of claim 6, wherein at least one resistive passive element is connected in parallel with the capacitive passive element.

## Description:

**CROSS**-REFERENCE TO RELATED APPLICATIONS

**[0001]**This application is a continuation of U.S. patent application Ser. No. 12/484,207, filed on Jun. 13, 2009, which claims the benefit of earlier filing date and right of priority to Korean Patent Application No. 10-2008-00127309, filed on Dec. 15, 2008, the contents of which are hereby incorporated by reference in their entirety.

**TECHNICAL FIELD**

**[0002]**The claimed subject matter relates generally to electromechanical systems and, more particularly, to resolver apparatus and methods for measuring the angular position of a shaft.

**BACKGROUND**

**[0003]**In motor applications, an optical encoder or a resolver may be used to determine the angular position of a shaft.

**[0004]**An optical encoder is a device comprising a rotating disk, a light source, and a photodetector (i.e., a light sensor). The disk, which is mounted on the shaft, has coded patterns of opaque and transparent sectors. As the disk rotates, these patterns interrupt the light projected onto the photodetector and generate a digital or pulse signal output that is used to determine the angular position of an object.

**[0005]**A resolver is a rotary transformer comprising a rotor and a stator with one or more windings (i.e., a coil). In response to excitation by one or more source signals, the windings output one or more sine or cosine signals (i.e., output voltages). The magnitude of the sine and cosine signals can be used to determine the angular position of a shaft inserted into the rotor.

**[0006]**Typically, a basic resolver is used for low resolution applications, and a multi-pole resolver is used for high resolution applications. A basic resolver houses two polarity windings in the stator such that the angular position of the shaft is equivalent to the mechanical angle of the stator. A multi-pole resolver houses more than two pole windings in the stator and thus provides more accuracy than a basic resolver.

**[0007]**Unfortunately, existing multi-pole resolvers fail to provide the same accuracy as an optical encoder. In existing multi-pole resolvers, as the rotation of the rotor increases in speed, the magnetic flux around the rotor and the windings distorts the sine and cosine output signals, which decreases the accuracy of angular position measurements.

**SUMMARY**

**[0008]**The present disclosure is directed to minimizing magnetic interference in a variable reluctance resolver.

**[0009]**For purposes of summarizing, certain aspects, advantages, and novel features have been described herein. It is to be understood that not all such advantages may be achieved in accordance with any one particular embodiment. Thus, the claimed subject matter may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages without achieving all advantages as may be taught or suggested herein.

**[0010]**In accordance with one embodiment, a resolver apparatus is provided. The apparatus comprises a source generation unit for generating a uni-phase source signal to excite a resolver, wherein said source generation unit comprises a low distortion oscillator, a variable phase shifter, and a capacitive resolver driving network; and a signal output unit for generating a two-phase output signal, wherein said signal output unit comprises the resolver, a signal detector and level adjuster, an angular position measurement unit, and an angular position compensation unit.

**[0011]**In accordance with another embodiment, a resolver signal processing method is provided. The method comprises generating a source signal to excite a resolver; transmitting the source signal through a variable phase shifter; transmitting the source signal through at least one capacitive passive element serially connected to each coil winding of the resolver; outputting a displacement signal generated by the resolver to a resolver-to-digital converter; and converting said displacement signal into a digital position using the resolver-to-digital converter.

**[0012]**One or more of the above-disclosed embodiments in addition to certain alternatives are provided in further detail below with reference to the attached figures. The claimed subject matter is not, however, limited to any particular embodiment disclosed.

**BRIEF DESCRIPTION OF THE DRAWINGS**

**[0013]**Embodiments of the claimed subject matter are understood by referring to the figures in the attached drawings, as provided below.

**[0014]**FIG. 1 illustrates an exemplary multi-pole resolver, in accordance with one or more embodiments.

**[0015]**FIG. 2 is a circuit diagram of an exemplary two-phase excitation, uni-phase output resolver.

**[0016]**FIG. 3 is a circuit diagram that is electrically equivalent to the circuit diagram provided in FIG. 2.

**[0017]**FIG. 4 illustrates the distortion caused by magnetic interference.

**[0018]**FIG. 5 is a circuit diagram of an exemplary uni-phase excitation, two-phase output resolver.

**[0019]**FIG. 6 is a block diagram of an exemplary apparatus comprising a uni-phase excitation, two-phase output multi-pole resolver, in accordance with one embodiment.

**[0020]**FIGS. 7(a) and 7(b) are circuit diagrams of an exemplary resolver driving network, in accordance with one embodiment.

**[0021]**FIG. 7(c) is a circuit diagram of an exemplary resolver signal level detector and adjuster, in accordance with one embodiment.

**[0022]**FIG. 8 is a circuit diagram of an exemplary resolver output signal stabilizer including a capacitive resolver driving network (C-network), in accordance with one embodiment.

**[0023]**FIG. 9 is a circuit diagram that is electrically equivalent to the circuit diagram provided in FIG. 8, in accordance with one embodiment.

**[0024]**FIGS. 10(a) and 10(b) are graphs comparing the waveforms for cosine and sine signals, respectively, outputted by an ideal resolver, an existing resolver, an exemplary resolver, in accordance with one embodiment.

**[0025]**FIGS. 11(a) and 11(b) are Lissajous graphs of output waveforms before installing a capacitive resolver driving network and after installing a capacitive resolver driving network, in accordance with one embodiment.

**[0026]**Features, elements, and aspects that are referenced by the same numerals in different figures represent the same, equivalent, or similar features, elements, or aspects, in accordance with one or more embodiments.

**DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS**

**[0027]**In the following, numerous specific details are set forth to provide a thorough description of various embodiments of the claimed subject matter. Certain embodiments may be practiced without these specific details or with some variations in detail. In some instances, certain features are described in less detail so as not to obscure other aspects of the disclosed embodiments. The level of detail associated with each of the elements or features should not be construed to qualify the novelty or importance of one feature over the others.

**[0028]**Referring to FIG. 1, in accordance with one embodiment, an exemplary multi-pole resolver comprises a rotor, a stator, and a coil with two or more stator windings. In one implementation, the resolver may be a variable reluctance (VR) resolver. Each stator winding in the resolver 100 in FIG. 6 is associated with one or more sine or cosine signals (e.g., Sin θ, Sin(θ+180), Cos θ, Cos(θ+180)). Excitation by a uni-phase or two-phase source signal may induce current to flow through the stator windings and cause the resolver to output a two-phase or uni-phase signal, respectively.

**[0029]**Referring to FIG. 2, a circuit diagram of an exemplary two-phase excitation, uni-phase output multi-pole resolver. The waveform of the signal outputted by the resolver may be expressed as follows:

**( V sin ω t × Sin θ ) - ( V sin ω t × sin ( θ + 180 ) ) = 2 V sin ω t × Sin θ ( V cos ω t × Cos θ ) - ( V cos ω t × Cos ( θ + 180 ) ) = 2 V cos ω t × Cos θ ##EQU00001## Vout = 2 V sin ω t × Sin θ + 2 V cos ω t × Cos θ = 2 V Cos ( ω t - θ ) = 2 V Sin ( ω t - θ + 90 ) ##EQU00001.2##**

**[0030]**However, the uni-phase sinusoidal signal waveform sin(wt-θ+90) of the output signal prevents the use of a general purpose resolver-to-digital (R/D) converter since a general purpose R/D converter needs both sine and cosine reference phases to process the displacement signal θ. To measure the phase rotation accurately from the uni-phase sinusoidal signal, a very sensitive phase discriminator is required to track the phase of the output signals. The other drawback in angular position measurement from the uni-phase sinusoidal signal arises from the inherently existing non-linearity of the uni-phase sinusoidal signal itself, which essentially leads to increased measurement error even for a very fine displacement. The non-linearity of coil inductance also contributes to increased error when the resolver rotates at high speed.

**[0031]**Referring to FIG. 3, a circuit diagram that electrically equivalent to the circuit diagram shown in FIG. 2 is provided to explain the two-phase excitation, uni-phase output resolver in more detail. As the shaft rotates with θ, two fundamental components are considered: the inductance component (Ls) which varies sinusoidally and the dependent current source component (Is) which is proportional to the multiplication of inductance component (Ls) and the applied voltage (Ve). The dependent current source (Im) induced by the magnetic flux Fm(θ) that varies with the magnetic interference is also considered.

**[0032]**The resulting electrical characteristic of uni-phase sinusoidal wave resolver is also a function of driving source (Ve) frequency and non-linearly dependent on time-varying inductance which includes the magnetic interference. The output current (Ie) shown in FIG. 3 may be expressed as provided in Equations (1) through (3) below:

**Ie**= Is + Im + 1 ( R 2 + ω 2 Ls 2 ) Sin ( ω t + Φ ) , ( 1 ) Ls = Lo ( 1 + m Sin θ ) = Lo ( 1 + m Sin Ω t ) , ( 2 ) Φ = arc tan ( - ω Ls / R ) , Ω : Angular Speed of Reolver Rotation Angle θ , ( rad / sec ) ( 3 ) ##EQU00002##

**[0033]**Ls denotes the inductance of resolver coil, Lo denotes the intrinsic inductance of resolver coil, Im denotes the sum of all currents induced by interference flux, Ie denotes the resolver driving current (output voltage for the case of VR type), m denotes the ratio between the intrinsic inductance and the flux changes, R denotes the resistance to detect the output voltage, θ denotes the rotation angle of resolver, Fm(θ) denotes the induced current, and Ve denotes the applied voltage to resolver.

**[0034]**Equations (1), (2), and (3) show that even though the dependency of amplitude variation of the source signal is minimized by increasing (R

^{2}+ω

^{2}Ls

^{2}), the amplitude and phase of the source signal varies as the resolver inductance varies, especially due to the time varying nature of magnetic interference.

**[0035]**FIG. 4 illustrates the distortion caused by magnetic interference. As described above, the complicated and non-linear characteristic of magnetic interference in a resolver excited by a uni-phase sinusoidal wave may be attributed to two factors: self interference within the same poles and the cross interference between orthogonal poles. Mechanical distortion may also be added on top of magnetic interference.

**[0036]**Self interference comprises: the interference between Sin θ pole and Sin(θ+180) pole, which is a function of K

^{2}*Sin θ*Sin(θ+180); the interference between Cos θ pole and Cos(θ+180) pole, which is a function of K

^{2}* Cos θ*Cos(θ+180). Cross-interference comprises: the interference between Sin θ pole and Cos θ pole, which is a function of K

^{2}*Sin θ*Cos θ; the interference between Sin(θ+180) pole and Cos(θ+180) pole, which is a function of (K

^{2}*Sin(θ+180)*Cos(θ+180)); the interference between Sin θ pole and Cos(θ+180) pole, which is a function of K

^{2}*Sin θ*Cos(θ+180); and the interference between Sin(θ+180) pole and Cosθ pole, which is a function of K

^{2}*Sin(θ+180)*Cos θ.

**[0037]**The above analysis is based on up to 2nd harmonics, however, and, depending on the direction of windings, higher order harmonics may be involved in practice. Therefore, the generalized form of interference current due to the magnetic flux interference (Im) is expressed as follows as provided below. K=ζ*m(ζ is the magnetic flux coupling ratio; m is the coil inductance change ratio).

**[0038]**Interference current through Sin θ and Sin(θ+180) pole may be expressed as follows:

**Im**=2nd harmonic interference+3rd harmonic interference+ . . . =(K

^{2}*Sin

^{2}θ)+(K

^{2}*Sin θ*Cos θ)+(K

^{3}*Sin

^{3}θ)+ . . . (4)

**[0039]**Interference current through Cos θ and Cos(θ+180) pole may be expressed as follows:

**Im**=(K

^{2}*Cos

^{2}θ)+(K

^{2}*Sin θ*Cos θ)+(K

^{3}*Cos

^{3}θ)+ . . . , (5)

**[0040]**In Equations (4) and (5), K is the rate of flux change as the resolver rotates, which is in the usual range of 0.1˜0.3, so that terms beyond 2nd order of K can be neglected. If the windings are wired in such a way as to minimize the interference between orthogonal poles, the interference induced current by sine winding and cosine winding respectively may be simplified as follows:

**Im**=(K

^{2}*Sin

^{2}θ), (6)

**Im**=(K

^{2}*Cos

^{2}θ), (7)

**[0041]**Assuming magnetic flux coupling between poles of 100% (no leakage inductance), K becomes m. In this case, the interference induced current by sine winding and cosine winding respectively may be expressed as follows:

**Im**=(m

^{2}*Sin

^{2}θ), (8)

**Im**=(m

^{2}*Cos

^{2}θ), (9)

**[0042]**Above Equation (1) applies when resolver is not rotating, however, as resolver rotates with angular speed of Ω, the resolver inductance (Ls) becomes a time varying function, and the phase of the source signal, φ, becomes a non-linear time varying function. Especially when R≦Ls, this phenomenon is more significant so that resolver output voltage is heavily dependent on Ω, thereby phase rotation measurement error will grow.

**[0043]**Referring to FIG. 5, an exemplary uni-phase excitation, two-phase output resolver is provided in accordance with one embodiment, in which driving waveforms are wired in such a way as to minimize the magnetic induction between orthogonal poles while maximizing the magnetic induction between the same poles. The currents i1, i2, i3, and i4 through each pole, Sin θ, Sin(θ+180), Cos θ, and Cos(θ+180), respectively, may be determined using Equation (1) as provided below in Equations (10) through (13).

**[0044]**The current through Sin θ may be expressed as follows:

**i**1 = [ Lo ( 1 + m Sin θ ) + m 2 Sin 2 θ + 1 ( R 2 + ω 2 Ls 2 ) ] Sin ( ω t + Φ ) , ( 10 ) ##EQU00003##

**[0045]**Applying Sin(θ+180)=-Sin θ, the current through Sin(θ+180) may be express as follows:

**i**2 = [ Lo ( 1 - m Sin θ ) - m 2 Sin 2 θ - 1 ( R 2 + ω 2 Ls 2 ) ] Sin ( ω t + Φ ) , ( 11 ) ##EQU00004##

**[0046]**The current through Cos θ may be expressed as follows:

**i**3 = [ Lo ( 1 + m Cos θ ) + m 2 Cos 2 θ + 1 ( R 2 + ω 2 Lc 2 ) ] Sin ( ω t + Φ ) , ( 12 ) ##EQU00005##

**[0047]**Applying Cos(θ+180)=-Cos θ, the current through Cos(θ+180) may be expressed as follows:

**i**14 = [ Lo ( 1 - m Cos θ ) - m 2 Cos 2 θ - 1 ( R 2 + ω 2 Lc 2 ) ] Sin ( ω t + Φ ) , ( 13 ) ##EQU00006##

**[0048]**The Sin θ and Cos θ waveform of a uni-phase excitation, two-phase output resolver is distorted significantly compared to the ideal waveform. For this reason, many existing resolvers are two-phase excitation, uni-phase output resolvers, as shown in FIG. 3. However, the magnetic interference in a uni-phase excitation, two-phase output multi-pole variable reluctance resolver may be minimized such that a general purpose R/D converter can be readily and economically utilized to process a two-phase output signal.

**[0049]**Systems and methods for obtaining near-ideal Sin θ and Cos θ waveforms in a uni-phase excitation, two-phase output multi-pole variable reluctance resolver are provided below.

**[0050]**Referring to FIG. 6, an exemplary uni-phase excitation, two-phase output resolver apparatus is provided in accordance with one embodiment. A voltage oscillator 200 may provide a source signal to excite the stator windings in a resolver 600 attached onto a motor. The signal may be processed by the variable phase shifter 300 and the amplifier 400 prior to arriving at the output signal stabilizer 1000. Once the signal arrives at the output signal stabilizer 1000, the signal may pass through the capacitive resolver driving network 500 prior to reaching the resolver 600.

**[0051]**The capacitive resolver driving network 500 may be implemented as a capacitor (C) network or a resistor-capacitor (R-C) network as shown in FIGS. 7(a) and 7(b), respectively. A network including variable resistors to implement a resolver signal detector and adjuster 700 may be added to the output signal stabilizer 1000, as shown in FIG. 7(c). The resolver signal detector and adjuster 700 may output sine and cosine signals to a resolver-to-digital (R/D) converter 100. The R/D converter 100 may be implemented using commercially available monolithic integrated circuits (ICs).

**[0052]**Referring to FIG. 7(a), in accordance with one embodiment, a capacitive passive element (e.g., a capacitor) may be serially connected to each coil winding of the resolver 600. Inserting the capacitive passive element, however, may cause phase shift between the R/D converter 100 phase reference and the R/D converter 100 input signal. In accordance with one embodiment, the variable phase shifter 300 may be implemented to compensate for the above phase shift.

**[0053]**Referring to FIG. 7(b), in accordance with one embodiment, a resistive passive element (e.g., a resistor) may be connected in parallel to a capacitive passive element to control the amplitude of an output signal in an effort to improve overall performance.

**[0054]**Referring back to FIG. 6, in accordance with one embodiment, the R/D converter 100 may measure angular position from output signals provided by the resolver 600 and make more reliable position data using an encoder signal generator 800 and angular position compensator 900 and a buffer amplifier. The encoder signal generator 800 may be implemented using a general purpose processor or a digital signal processor.

**[0055]**The angular position compensator 900 may compensate for angular position measurement error as well as any additional mechanical/electrical error by applying a linear interpolation or a direct addition or subtraction method. The position error reference data used by the angular position compensator 900 may be stored in Flash memory, ROM, or EEPROM, or other type of memory.

**[0056]**Referring to FIG. 8, a circuit diagram of an exemplary resolver output signal stabilizer 1000 is provided in accordance with one embodiment. The resolver output signal stabilizer implements a capacitive resolver driving network using a C network, but it is possible to implement the capacitive resolver driving network using an R-C network as provided earlier.

**[0057]**An output signal may processed by the resolver output signal stabilizer according to the electrically equivalent circuit shown in FIG. 9. The following equations may respectively be derived from Equations (1), (2), and (3):

**Ie**= Is + Im + 1 R 2 + ( ω Ls - 1 / ω C ) 2 Sin ( ω t + Φ c ) ( 14 ) Ls = Lo ( 1 + m Sin θ ) = Lo ( 1 + m Sin Ω t ) ( 15 ) Φ c = arc tan ( - ω Ls - 1 / ω C R ) Ω : Angular Speed of Reolver Rotation Angle θ , ( rad / sec ) ( 16 ) ##EQU00007##

**[0058]**Ls denotes the inductance of the coil, Lo denotes the intrinsic inductance of the coil, Im denotes the sum of all currents induced by interference flux, Ie denotes the resolver driving current (resolver output voltage for VR type resolver), m denotes the ratio between the intrinsic inductance and the flux changes, R denotes the resistance to detect the output voltage, θ denotes the rotation angle of resolver, Fm(θ) denotes the induced current, Ve denotes the applied voltage to resolver, and C denotes the capacitance of the passive capacitive element in the capacitive resolver driving network.

**[0059]**Equations (3), (4), and (5) and Equations (14), (15), and (16) express the steady state response for a sinusoidal AC current, in which (ωLs-(1/ωC)) in Equations (14) and (16) is the non-linear and time-varying component as the resolver rotates at angular speed ω. The angular speed ω of the source signal is in the range of 10 kHz, while the rotating angular speed Ω is in the range of a few hundred Hz even for high speed applications. Therefore Ω<<ω, ωLs-(1/ωC) in Equations (14), (16) may be respectively rewritten in terms of the angular speed of ω and Ω as follows:

ωLs-1/ωC≈ωLs, (17)

ΩLs-1/ΩC≈-(1/ΩC), (18)

**[0060]**If ωLs-(1/ωC) in Equation (14) and (16) is replaced by Equations (17) and (18), then Equations (14) and (16) may have the same form as Equations (1) and (3), respectively, however 90° phase difference in angular speed variation exists due to the capacitive passive element C.

**[0061]**The 90° phase difference calculated from the above derivation indicates that there is 90° phase difference between the inductance variation by resolver rotation and current variation by driving source signal. Since the current induced by the interference flux is caused by the current of driving signal, the interference current will be the sum of currents having 90° phase difference. Therefore, when capacitive passive element C is inserted, Equations (8) and (9) may be expressed as provided below in Equations (19) and (20).

**[0062]**The interference induced current by sine winding and cosine winding may be respectively expressed as follows:

**Im**=(m

^{2}*Sin θ*Sin(θ+90)), (19)

**Im**=(m

^{2}*Cos θ*Cos(θ+90)), (20)

**[0063]**Using the above equations, the currents i1, i2, i3, and i4 through each pole, Sin θ, Sin(θ+180), Cos θ, and Cos(θ+180) as shown in Equations (10), (11), (12), and (13), respectively, may be simplified as provided below in Equations (21) through (24).

**[0064]**The current through Sin θ may be expressed as follows:

**i**1=Lo(1+m Sin θ)+m

^{2}Sin θ*Sin(θ+180), (21)

**[0065]**The current through Sin(θ+180) may be expressed as follows:

**i**2=Lo(1m Sin θ)+m

^{2}Sin(180+θ)* Sin θ (22)

**[0066]**The current through Cos θ may be expressed as follows:

**i**3=Lo(1+m Cos θ)+m

^{2}Cos θ*Cos(θ+180), (23)

**[0067]**The current through Cos(θ+180) may be expressed as follows:

**i**4=Lo(1-m Cos θ)+m

^{2}Cos(θ+180)*Cos θ, (24)

**[0068]**When capacitive passive element C is inserted, in accordance with one embodiment, Equations (21), (22), (23), and (24) may be rewritten as provided below in Equations (25) through (28).

**[0069]**The current through Sin θ when capacitive passive element C is inserted may be expressed as follows:

**i**1=Lo(1+m Sin θ)+m

^{2}Sin θ*Sin(θ+180+90), (25)

**[0070]**The current through Sin(θ+180) when capacitive passive element C is inserted may be expressed as follows:

**i**2=Lo(1-m Sin θ)+m

^{2}Sin(180+θ)*Sin(θ+90), (26)

**[0071]**The current through Cos θ when capacitive passive element C is inserted may be expressed as follows:

**i**3=Lo(1+m Cos θ)+m

^{2}Cos θ*Cos(θ+180+90), (27)

**[0072]**The current through Cos(θ+180) when capacitive passive element C is inserted may be expressed as follows:

**i**4=Lo(1-m Cos θ)+m

^{2}Cos(θ+180)*Cos(θ+90), (28)

**[0073]**FIGS. 10(a) and 10(b) compare the waveforms of one embodiment with ideal waveforms and waveforms from output of an existing resolver. FIGS. 10(a) and 10(b) show graphs of sinusoidal waveforms (solid sharp line) both for Sin θ and Cos θ when Lo=1 and m=0.15 in above equation on top of the ideal sinusoidal waveform (solid bold line), in which the dotted line waveform is the one obtained by the conventional method of without capacitive passive element. It can be clearly seen that the Sin θ or Cos θ waveform (solid sharp line) obtained after connecting capacitive passive element in accordance with the claimed subject matter is very close to the corresponding ideal waveform (solid bold line), while conventional Sin θ or Cos θ waveform (dotted line) is distorted from the ideal waveform.

**[0074]**In FIGS. 11(a) and 11(b), Lissajous graphs are provided to illustrate the effectiveness of the claimed subject matter. FIG. 11(a) shows the output of a uni-phase excitation, two-phase output resolver apparatus without an R-C driving network (i.e., an existing resolver apparatus), while FIG. 11(b) shows the output of a uni-phase excitation, two-phase output multi-pole resolver apparatus comprising an R-C driving network (i.e., a resolver apparatus in accordance with the claimed subject matter).

**[0075]**In FIG. 11(a), the path traced by Sin θ and Cos θ along the x-axis and y-axis, respectively, is severely distorted. In FIG. 11(b), however, the distortion is almost entirely removed while the orthogonality between Sin θ and Cos θ still holds. Therefore, FIGS. 11(a) and 11(b) show that the resolver apparatus in accordance with the claimed subject matter is a significant improvement over the existing resolver apparatus.

**[0076]**Advantageously, the resolver apparatus and methods provided in accordance with one or more embodiments of the claimed subject matter significantly reduce magnetic interference by directly connecting capacitive passive elements to each winding of a resolver. This is possible, in part, because the angular speed ω of the source signal is much bigger than the rotator angular speed SI Additionally, the capacitance of the passive capacitive element in resolver driving network and the intrinsic inductance Lo of resolver coil react at different angular speeds; that is, Lo reacts dominantly at co, while C reacts dominantly at SI Moreover, the phase of the current at C is 90° apart from that of the current at Lo, such that magnetic interference is orthogonal. Due to this orthogonal property, the magnetic interference in the resolver is greatly reduced as shown in FIGS. 10(a), 10(b), and 11(b). Even the minor phase error shown in FIG. 10(a) or 10(b) may be easily compensated by the angular position compensator 900 provided above with reference to FIG. 6.

**[0077]**In addition to achieving high accuracy, the resolver apparatus and methods provided in accordance with one or more embodiments of the claimed subject matter also achieve high resolution. For example, a resolver with 100 poles, in accordance with one embodiment, may achieve as many as 6,553,600 divisions per revolution using the methods provided above, which is more than 65,000 times the number of poles. That is, the resolver may achieve a multiplication factor of more than 65,000. Compared with the less than 5,000 multiplication factor achieved by existing practical interpolation conversion methods, the resolver in accordance with the claimed subject matter improves resolution by at least more than an order of magnitude.

**[0078]**Further, the resolver apparatus and methods provided in accordance with one or more embodiments of the claimed subject matter achieve improved performance at an economic cost. For example, a resolver apparatus may be implemented using a cost-effective general purpose R/D converter that is configured for high-speed hardware processing, which may reduce the amount of software processing time required to determine a digital position.

**[0079]**The claimed subject matter has been described above with reference to one or more features or embodiments. Those skilled in the art will recognize, however, that changes and modifications may be made to these embodiments without departing from the scope of the claimed subject matter. These and various other adaptations and combinations of the embodiments disclosed are within the scope of the claimed subject matter as defined by the claims and their full scope of equivalents.

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