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ZAGORIN O'BRIEN GRAHAM LLP
AUSTIN, TX US
1. 20110029244 TECHNIQUES FOR SURFACE EXPLORATION AND MONITORING 02-03-20112. 20100284765 PROVIDING A COUNTER TORQUE FORCE WITHIN A FASTENING 11-11-2010
3. 20100284759 MONITORING FASTENING LOADING - retrofit system for providing a load indicator on a foundation bolt 11-11-2010
4. 20100245250 Adjustable Ergonomic Keyboard - includes keyboard segments coupled by a joint allowing the keyboard segments to pivot relative to one another 09-30-2010
5. 20100201346 RF POWER DETECTOR - Real power delivered to a load in an RF transmit path is measured 08-12-2010
6. 20100117450 INTEGRATED MULTIPLE OUTPUT POWER CONVERSION SYSTEM 05-13-2010
7. 20100060257 CURRENT SENSOR FOR POWER CONVERSION - technique for determining an output current of a power converter circuit samples a voltage of a switch node 03-11-2010
8. 20100059795 VERTICAL CURRENT TRANSPORT IN A POWER CONVERTER CIRCUIT 03-11-2010
9. 20100053169 SYSTEM AND METHOD FOR COMMUNICATION BETWEEN MOBILE DEVICES USING DIGITAL/ACOUSTIC TECHNIQUES 03-04-2010
10. 20100045395 FREQUENCY ADJUSTMENT FOR CLOCK GENERATOR 02-25-2010
11. 20090284248 METHOD AND APPARATUS FOR HIGH CURRENT MEASUREMENT 11-19-2009
12. 20090157708 DELAY TECHNIQUE IN E-MAIL FILTERING SYSTEM 06-18-2009
13. 20090144472 METHOD AND APPARATUS FOR MAKING A PROCESSOR SIDEBAND INTERFACE ADHERE TO SECURE MODE RESTRICTIONS 06-04-2009
14. 20090144332 SIDEBAND ACCESS BASED METHOD AND APPARATUS FOR DETERMINING SOFTWARE INTEGRITY 06-04-2009
15. 20090096533 ADAPTIVELY TUNED RF POWER AMPLIFIER - includes at least one power amplifier stage that has one or more active elements 04-16-2009
16. 20090089529 METHOD AND APPARATUS TO CONTROL ACCESS TO DEVICE ENABLE FEATURES 04-02-2009
17. 20090039968 DUAL LOOP ARCHITECTURE USEFUL FOR A PROGRAMMABLE CLOCK SOURCE AND CLOCK MULTIPLIER APPLICATIONS 02-12-2009
18. 20090031042 SPREAD IDENTITY COMMUNICATIONS ARCHITECTURE 01-29-2009
19. 20090016355 COMMUNICATION NETWORK INITIALIZATION USING GRAPH ISOMORPHISM 01-15-2009
20. 20090015338 DIVIDERLESS PLL ARCHITECTURE - phase-locked loop achieves initial lock using a course fractional-N divider driving a binary phase detector 01-15-2009
21. 20090001962 CURRENT SENSOR WITH RESET CIRCUIT - current sensor includes a coils located within the integrated circuit die and inductively coupled to a conductor 01-01-2009
22. 20080315963 DIRECT DIGITAL INTERPOLATIVE SYNTHESIS - clock synthesis circuit includes a delta sigma modulator that receives a divide ratio and generates an integer 12-25-2008
23. 20080315925 ISOLATOR CIRCUIT INCLUDING A VOLTAGE REGULATOR 12-25-2008
24. 20080314430 Line-Voltage-Powered Thermoelectric Device 12-25-2008
25. 20080309420 FRACTIONAL DIVIDER - divider control circuit includes a first and a second delta sigma modulator configured to generate a divider control signal for a 12-18-2008
26. 20080298017 COUNTERFLOW MICROCHANNEL COOLER FOR INTEGRATED CIRCUITS 12-04-2008
27. 20080297216 TEST TECHNIQUES FOR A DELAY-LOCKED LOOP RECEIVER INTERFACE 12-04-2008
28. 20080276294 LEGAL INTERCEPT OF COMMUNICATION TRAFFIC PARTICULARLY USEFUL IN A MOBILE ENVIRONMENT 11-06-2008
29. 20080273528 PHASE SELECT CIRCUIT WITH REDUCED HYSTERESIS EFFECT 11-06-2008
30. 20080272814 PARALLEL MULTIPLEXING DUTY CYCLE ADJUSTMENT CIRCUIT WITH PROGRAMMABLE RANGE CONTROL 11-06-2008
31. 20080270789 METHOD AND SYSTEM FOR MESSAGING SECURITY 10-30-2008
32. 20080266734 RADIATION-TRIGGERED SEMICONDUCTOR SHUTDOWN DEVICE 10-30-2008
33. 20080250503 METHOD AND SYSTEM FOR FILTERING COMMUNICATION 10-09-2008
34. 20080239672 Cooling of High Power Density Devices Using Electrically Conducting Fluids 10-02-2008
35. 20080229174 ERROR DETECTION IN A COMMUNICATIONS LINK 09-18-2008
36. 20080211588 Phase Error Cancellation - noise cancellation signal is generated for a fractional-N phase-locked loop 09-04-2008
37. 20080204088 HIGH-SPEED DIVIDER WITH REDUCED POWER CONSUMPTION 08-28-2008