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Lawrence J. Merkel;Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
AUSTIN, TX US
1. 20100122062 Using an IOMMU to Create Memory Archetypes 05-13-20102. 20100042665 Subnormal Number Handling in Floating Point Adder Without Detection of Subnormal Numbers Before Exponent Subtraction 02-18-2010
3. 20090313447 Remote, Granular Restore from Full Virtual Machine Backup 12-17-2009
4. 20090177846 Retry Mechanism - interface unit may comprise a buffer configured to store requests that are to be transmitted on an interconnect and a control unit 07-09-2009
5. 20090119531 Digital Phase Relationship Lock Loop - In one embodiment, an apparatus comprises a first clocked storage device operable in a first clock domain 05-07-2009
6. 20090119488 Prefetch Unit - In one embodiment, a processor comprises a prefetch unit coupled to a data cache 05-07-2009
7. 20090080268 Integrated Circuit with Separate Supply Voltage for Memory That is Different from Logic Circuit Supply Voltage 03-26-2009
8. 20090077560 Strongly-Ordered Processor with Early Store Retirement 03-19-2009
9. 20080300992 Interface Controller that has Flexible Configurability and Low Cost 12-04-2008
10. 20080298383 Buffer Minimization in Interface Controller 12-04-2008
11. 20080271014 Lightweight World Switch - In one embodiment, a processor comprises one or more registers coupled to an execution core 10-30-2008
12. 20080250275 Program Counter (PC) Trace - In one embodiment an integrated circuit comprises a first processor configured to output program counter trace records 10-09-2008
13. 20080243739 Remote Hit Predictor - In one embodiment, a first node comprises at least one memory request source and a node controller coupled to the memory request 10-02-2008
14. 20080222317 Data Flow Control Within and Between DMA Channels 09-11-2008
15. 20080198671 Enqueue Event First-In, First-Out Buffer (FIFO) 08-21-2008