[ Usenet FAQs | Web FAQs | Documents | RFC Index ]
    Search the FAQ Archives

Part1 - Part2 - Part3 - Single Page

Top Document: x86 Assembly Language FAQ - General Part 2/3
Previous Document: 16. What Is Available at developer.intel.com
Next Document: 18. ASM Books Available


17. Interrupts and Exceptions


    "(with interrupts) the processor doesn't waste its time looking for
    work - when there is something to be done, the work comes looking
    for the processor."
                - Peter Norton

INTERRUPTS AND EXCEPTIONS

Interrupts and exceptions both alter the program flow. The difference
between the two is that interrupts are used to handle external events
(serial ports, keyboard) and exceptions are used to handle instruction
faults, (division by zero, undefined opcode).

Interrupts are handled by the processor after finishing the current
instruction. If it finds a signal on its interrupt pin, it will look up
the address of the interrupt handler in the interrupt table and pass
that routine control.  After returning from the interrupt handler
routine, it will resume program execution at the instruction after the
interrupted instruction.

Exceptions on the other hand are divided into three kinds.  These are
Faults, Traps and Aborts.  Faults are detected and serviced by the
processor before the faulting instructions.  Traps are serviced after
the instruction causing the trap.  User defined interrupts go into this
category and can be said to be traps; this includes the MS-DOS INT 21h
software interrupt, for example.  Aborts are used only to signal severe
system problems, when operation is no longer possible.

See the below table for information on interrupt assignments in the
Intel 386, 486 SX/DX processors, and the Pentium processor.  Type
specifies the type of exception.

    ------------------------------
    Vector number   Description
    ------------------------------
           0        Divide Error (Division by zero)
           1        Debug Interrupt (Single step)
           2        NMI Interrupt
           3        Breakpoint
           4        Interrupt on overflow
           5        BOUND range exceeded
           6        Invalid Opcode
           7        Device not available (1)
           8        Double fault
           9        Not used in DX models and Pentium (2)
          10        Invalid TSS
          11        Segment not present
          12        Stack exception
          13        General protection fault
          14        Page fault
          15        Reserved
          16        Floating point exception (3)
          17        Alignment check (4)
     18 – 31        Reserved on 3/486, See (5) for Pentium
    32 – 255        Maskable, user defined interrupts
    ------------------------------
    (1) Exception 7 is used to signal that a floating point processor is
        not present in the SX model. Exception 7 is used for programs
        and OSs that have floating point emulation. In addition, the DX
        chips can be set to trap floating point instructions by setting
        bit 2 of CR0.
    (2) Exception 9 is Reserved in the DX models and the Pentium, and is
        only used in the 3/486 SX models to signal Coprocessor segment
        overrun.  This will cause an Abort type exception on the SX.
    (3) In the SX models this exception is called 'Coprocessor error'.
    (4) Alignment check is only defined in 486 and Pentiums.  Reserved
        on any other Intel processor.
    (5) For Pentiums Exception 18 is used to signal what is called an
        'Machine check exception'.
    The other interrupts, (32-255) are user defined.  They differ in use
    from one OS to another.

For a list of MS-DOS interrupts, see 'Obtaining HELPPC' (Subject #6) or
Ralf Browns Interrupt List (Subject #11)

Contributor: Patrik Ohman, patrik@astrakan.hgs.se
Last changed: 10 Jan 95



Top Document: x86 Assembly Language FAQ - General Part 2/3
Previous Document: 16. What Is Available at developer.intel.com
Next Document: 18. ASM Books Available

Part1 - Part2 - Part3 - Single Page


[ Usenet FAQs | Web FAQs | Documents | RFC Index ]

Send corrections/additions to the FAQ Maintainer:
raymoon@moonware.dgsys.com

Last Update October 22 2009 @ 05:22 AM

Some parts © 2009 Advameg, Inc.