118Chapter4 • Using GNU make
Now let us clean the files we have created using the following rule.
clean:
rm -f $(TARGETS) $(OBJS)
The result of running the command
make clean
will be as follows:
[root@rr2 test]# make clean
rm -f ftp tftp dnsresolver ftp.o tftp.o dnsresolver.o common.o
[root@rr2 test]#
As you can see from the above output,
make
has replaced variables with values present in
the variables before running the
rm
command. This is what is done every time
make
invokes a
command.
4.2.4Explicit Rules
There are two types of rules:
explicit
rules and
implicit
rules. All of the rules that we have
been using in this chapter until now are explicit rules. An explicit rule has three parts: target,
dependencies and commands. Explicit rules are defined in detail and they perform exactly as
they are written. In general, all rules present in a makefile are explicit rules.
4.2.5Implicit Rules
Implicit rules are used by
make
to build certain targets by itself. These rules are usually
language-specific and operate depending upon file extension. For example,
make
can build
.o
files from
.c
files using an implicit rule for C language compilation. Consider the basic make-
file we used earlier in this chapter as shown below:
# Variable definition
OBJS = ftp.o common.o
HDRS = ftp.h common.h
CFLAGS = -g -O2
TARGETS = ftp
CC = gcc
# Default Target
ftp: $(OBJS) $(HDRS)
$(CC) $(OBJS) -o ftp
ftp.o: ftp.c $(HDRS)
$(CC) $(CFLAGS) -c ftp.c
common.o: common.c common.h
$(CC) $(CFLAGS) -c common.c
clean:
rm -f $(TARGETS) $(OBJS)