The make Rules115
•ftp.o
•common.o
•ftp.h
•
common.h
We have another rule to build object files from source files. This rule is as follows:
$(OBJS): $(SRCS)
$(CC) $(CFLAGS) -c $(@:.o=.c)
It will build any of the
.o
object file, which is not up-to-date from its corresponding
.c
source code file. The
@
sign is used to substitute the name of the target by replacing
.o
with
.c
so that if we want to build the target
common.o
, the
@
symbol will replace
.o
with
.c
in the
target, making it
common.c
. This way the compiler gets the correct argument after the
-c
switch in the command line. This technique is especially useful if you are dealing with files with
different extensions. For example, if the source code files are C++ files ending with
.cpp
, the
above rule may be written as follows:
$(OBJS): $(SRCS)
$(CC) $(CFLAGS) -c $(@:.o=.cpp)
Now the
@
will replace
.o
with
.cpp
for each file in the target.
The
clean
rule will delete all of the object and executable files. The install rule will copy
files into the /root directory. Both of these rules have no dependency. This means that the com-
mands in these rules don't depend on anything and will always be executed whenever this rule is
invoked.
The last part of the makefile lists some additional dependencies not covered by earlier rules.
Note that these three rules in the end have no command to execute. You can have as many rules to
build a target as you like, but only one of these rules should contain commands to build it.
Now you can see how the use of variables is useful in this Makefile. If you add or remove
some files or dependencies, you need to modify only the upper part of the makefile where vari-
ables are defined, without worrying about the rest of the
makefile
. For example, if you add a
new header file to the dependency list of ftp, you just need to modify the variable
FTPHDRS
.
Similarly to add a new source code file
common.c
that is being used by ftp, you need to add it
to the following two variables:
1.
FTPOBJS
2.
OBJS
By modifying these two variables, this will automatically be used by
ftp
,
$(OBJS)
and
clean
rules.
Now is the time to use this makefile and see how the
make
program executes different
commands. The output of the
make
command is shown below that needs some attention to
understand how the
make
program checks dependencies and builds different targets.