Article Abstract:
Supercomputer-aided design tools are essential for development of the million component very large scale integrated circuits which are now possible. Number crunching programs for the CRAY-1 computer perform process simulation, device simulation, and circuit simulation. The process steps include thermal processing and doping, etching and deposition, and lithography. The algorithms used for this simulation affect the efficiency and numerical robustness of the simulation. Device simulation programs such as DEVICE and ATLAS solve the system of semiconductor equations over a spatial grid. DEVICE consists of a finite- difference code and a finite-element code for dealing with two- dimensional device structures. ATLAS uses Gummels' method and the Newton method to simulate bipolar devices with the vector processor of the CRAY-1. The ADVICE circuit simulation program at Bell Laboratories predicts the electrical characteristics of a circuit. Diagrams illustrate routes of integrated circuit development and processing steps. Algorithmic equations and results of simulations also are shown.
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Article Abstract:
A variety of direct and relaxation-based approaches to circuit simulation on parallel-processing supercomputers are extensively described, evaluated and compared. A hierarchical waveform relaxation-based approach is being developed for implementation on the University of Illinois (Urbana, IL) Center for Supercomputing Research and Development CEDAR multiprocessor. Circuit simulation is vital to the successful computer-aided design of very-large-scale integration integrated circuits, but the process is computationally intense and time-consuming. Supercomputers can provide the computational power required for rapid solution of the circuit simulation equations. The parallel direct and relaxation algorithms described have been developed for implementation on general-purpose multiprocessor architectures with a limited number of processors and shared-memory.
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Article Abstract:
Array processor supercomputers consist of a single instruction multiple data (SIMD) architecture of large numbers of very simple processing elements (PEs). Current implementations may contain up to 64,000 PEs and execute up to 4 billion operations per second. Common characteristics of array processor SIMD machines include synchronous operation, massive parallelism, 'corner turning' conversion of data from word-serial bit-parallel to bit-serial word-parallel form and very high input/output rates. Array processor designs are differentiated by interprocessor communication, PE-to-memory configuration, corner-turning methods and host-to-array control path. SIMD array processors are shown to be effective in the solution of computationally intensive image convolution problems, real-time database management (air traffic control), and graph algorithm problems.
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