150 nm copper process for SRAMs

Article Abstract:

Motorola of Austin, TX, has developed a CMOS RAM process utilizing enhanced contacts, copper metalization and a feature size of 150 nm. Details of the process, which has produced a fully functional 4 Mb SRAMs, were featured at the 1998 Symposium on VLSI Technology in Honolulu, Hawaii, from Jun. 9, 1998 to Jun. 11, 1998. Motorola believes that the technology will allow a new class of solutions for advanced computer servers and workstation applications. The first SRAM product employing the technology is anticipated to start sampling in the fourth quarter of 1998.

Comment:

Develops a CMOS RAM process utilizing enhanced contacts, copper metalization & a feature size of 150 nm

C-MOS Integrated Circuits, Motorola Inc., Complementary metal oxide semiconductors, Article

On-line analysis of organic additives in damascene copper processes

Article Abstract:

An online monitoring and control of the additive components in damascene copper methods is essential to avoid defects in the filling of the trenches and properties of the electroplated copper. This becomes a major consideration as copper electroplating becomes more popular in the manufacture of semiconductor devices. Cyclic Voltametric Stripping analysis and a modified version, the Cyclic Step Voltammetric Stripping analysis are primary considerations for the damascene process.

How to reduce plasma damage in sputtering processes

Article Abstract:

The impact of plasma damage caused during the sputter etch step before second-level aluminum metalization is examined. The sputter etch step is crucial in eliminating the insulating the aluminum oxide from the surface. The influence of important etching parameters on plasma charging was also studied. Researchers were able to develop a new process that boosted device output through an examination of the results.